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* utils: rename struct mem_region_t to struct mem_regionMasahiro Yamada2018-01-161-1/+1
* Merge pull request #1219 from antonio-nino-diaz-arm/an/mm-versiondavidcunado-arm2018-01-162-17/+38
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| * SPM: Fix version header definitionsAntonio Nino Diaz2018-01-102-17/+38
* | Merge pull request #1215 from vwadekar/tlkd-ns-dram-rangesdavidcunado-arm2018-01-161-1/+2
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| * | spd: tlkd: support for "NS memory ranges" function IDVarun Wadekar2018-01-081-1/+2
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* | Merge pull request #1197 from dp-arm/dp/amudavidcunado-arm2018-01-127-1/+116
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| * | Add hooks to save/restore AMU context for Cortex A75Dimitris Papastamos2018-01-111-0/+12
| * | AMU: Add hooks to save/restore AMU contextDimitris Papastamos2018-01-111-0/+5
| * | AMU: Add configuration helpers for aarch64Dimitris Papastamos2018-01-114-0/+72
| * | AMU: Add plat interface to select which group 1 counters to enableDimitris Papastamos2018-01-111-1/+20
| * | Add PubSub events for CPU powerdown/powerupDimitris Papastamos2018-01-111-0/+7
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* | Merge pull request #1214 from dp-arm/dp/cve_2017_5715davidcunado-arm2018-01-113-11/+43
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| * | Use PFR0 to identify need for mitigation of CVE-2017-5915Dimitris Papastamos2018-01-111-0/+3
| * | Workaround for CVE-2017-5715 on Cortex A73 and A75Dimitris Papastamos2018-01-112-1/+30
| * | Workaround for CVE-2017-5715 on Cortex A57 and A72Dimitris Papastamos2018-01-111-10/+10
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* / Increase BL31 memory space by 2 pagesDimitris Papastamos2018-01-111-1/+1
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* Move TSP to TZC secured DRAMDimitris Papastamos2018-01-031-1/+1
* ARM platforms: Allow platforms to define SDEI eventsJeenu Viswambharan2017-12-191-0/+11
* Merge pull request #1178 from davidcunado-arm/dc/enable_svedavidcunado-arm2017-12-114-3/+35
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| * Enable SVE for Non-secure worldDavid Cunado2017-11-304-3/+35
* | Merge pull request #1187 from antonio-nino-diaz-arm/an/spm-xlat-dramdavidcunado-arm2017-12-104-12/+21
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| * | SPM: Move S-EL1/S-EL0 xlat tables to TZC DRAMAntonio Nino Diaz2017-12-064-12/+21
* | | Merge pull request #1182 from soby-mathew/sm/opt_tbbr_flushdavidcunado-arm2017-12-091-1/+0
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| * | | Unify cache flush code path after image loadSoby Mathew2017-12-051-1/+0
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* | | Merge pull request #1180 from sandrine-bailleux-arm/sb/spm-renamedavidcunado-arm2017-12-091-14/+14
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| * | | SPM: Rename SP_COMMUNICATE macrosSandrine Bailleux2017-12-051-2/+2
| * | | SPM: Rename SP_MEM_ATTR*** definesAntonio Nino Diaz2017-12-051-12/+12
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* | | Merge pull request #1174 from antonio-nino-diaz-arm/an/page-sizedavidcunado-arm2017-12-081-3/+5
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| * | Replace magic numbers in linkerscripts by PAGE_SIZEAntonio Nino Diaz2017-11-291-3/+5
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* / ARM platforms: Fixup AArch32 buildsSoby Mathew2017-11-292-46/+71
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* AMU: Implement support for aarch32Dimitris Papastamos2017-11-292-0/+37
* AMU: Implement support for aarch64Dimitris Papastamos2017-11-293-0/+49
* Implement support for the Activity Monitor Unit on Cortex A75Dimitris Papastamos2017-11-291-0/+34
* Merge pull request #1145 from etienne-lms/rfc-armv7-2davidcunado-arm2017-11-2312-3/+256
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| * ARMv7: GICv2 driver can manage GICv1 with security extensionEtienne Carriere2017-11-081-0/+2
| * aarch32: add missing dmb() macroEtienne Carriere2017-11-081-0/+1
| * ARMv7 may not support Virtualization ExtensionsEtienne Carriere2017-11-082-1/+89
| * ARMv7: introduce Cortex-A12Etienne Carriere2017-11-081-0/+20
| * ARMv7: introduce Cortex-A17Etienne Carriere2017-11-081-0/+20
| * ARMv7: introduce Cortex-A7Etienne Carriere2017-11-081-0/+20
| * ARMv7: introduce Cortex-A5Etienne Carriere2017-11-081-0/+20
| * ARMv7: introduce Cortex-A9Etienne Carriere2017-11-081-0/+31
| * ARMv7: introduce Cortex-A15Etienne Carriere2017-11-081-0/+20
| * ARMv7 architecture have specific system registersEtienne Carriere2017-11-082-2/+22
| * ARMv7 does not support SDCREtienne Carriere2017-11-081-0/+2
| * ARMv7 does not support STL instructionEtienne Carriere2017-11-081-0/+9
* | Merge pull request #1163 from antonio-nino-diaz-arm/an/parangedavidcunado-arm2017-11-231-0/+1
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| * | Add ARMv8.2 ID_AA64MMFR0_EL1.PARange valueAntonio Nino Diaz2017-11-171-0/+1
* | | Merge pull request #1165 from geesun/qx/support-sha512davidcunado-arm2017-11-221-0/+10
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| * | | tbbr: Add build flag HASH_ALG to let the user to select the SHAQixiang Xu2017-11-211-0/+10
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