aboutsummaryrefslogtreecommitdiffstats
path: root/docs
Commit message (Collapse)AuthorAgeFilesLines
* Merge "Cortex A9: Fix typo in errata 794073 workaround" into integrationAntonio Niño Díaz2019-04-231-1/+1
|\
| * Cortex A9: Fix typo in errata 794073 workaroundLouis Mayencourt2019-04-181-1/+1
| | | | | | | | | | Change-Id: I22568caf83b9846cd7b59241fcec34a395825399 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
* | stm32mp1: add OP-TEE supportYann Gautier2019-04-231-1/+11
|/ | | | | | | | | | | | | | | | Support booting OP-TEE as BL32 boot stage and secure runtime service. OP-TEE executes in internal RAM and uses a secure DDR area to store the pager pagestore. Memory mapping and TZC are configured accordingly prior OP-TEE boot. OP-TEE image is expected in OP-TEE v2 format where a header file describes the effective boot images. This change post processes header file content to get OP-TEE load addresses and set OP-TEE boot arguments. Change-Id: I02ef8b915e4be3e95b27029357d799d70e01cd44 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
* DSU: Implement workaround for errata 798953Louis Mayencourt2019-04-171-0/+5
| | | | | | | | | Under certain near idle conditions, DSU may miss response transfers on the ACE master or Peripheral port, leading to deadlock. This workaround disables high-level clock gating of the DSU to prevent this. Change-Id: I820911d61570bacb38dd325b3519bc8d12caa14b Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
* Cortex-A35: Implement workaround for errata 855472Louis Mayencourt2019-04-171-0/+5
| | | | | | | | | Under specific conditions, the processor might issue an eviction and an L2 cache clean operation to the interconnect in the wrong order. Set the CPUACTLR.ENDCCASCI bit to 1 to avoid this. Change-Id: Ide7393adeae04581fa70eb9173b742049fc3e050 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
* Merge "Cortex A9:errata 794073 workaround" into integrationAntonio Niño Díaz2019-04-121-1/+6
|\
| * Cortex A9:errata 794073 workaroundJoel Hutton2019-04-121-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | On Cortex A9 an errata can cause the processor to violate the rules for speculative fetches when the MMU is off but branch prediction has not been disabled. The workaround for this is to execute an Invalidate Entire Branch Prediction Array (BPIALL) followed by a DSB. see:http://arminfo.emea.arm.com/help/topic/com.arm.doc.uan0009d/UAN0009_cortex_a9_errata_r4.pdf for more details. Change-Id: I9146c1fa7563a79f4e15b6251617b9620a587c93 Signed-off-by: Joel Hutton <Joel.Hutton@arm.com>
* | Merge changes from topic "av/tls-heap" into integrationAntonio Niño Díaz2019-04-121-23/+27
|\ \ | | | | | | | | | | | | | | | * changes: Mbed TLS: Remove weak heap implementation sgm: Fix bl2 sources
| * | Mbed TLS: Remove weak heap implementationAmbroise Vincent2019-04-121-23/+27
| |/ | | | | | | | | | | | | | | | | | | | | | | The implementation of the heap function plat_get_mbedtls_heap() becomes mandatory for platforms supporting TRUSTED_BOARD_BOOT. The shared Mbed TLS heap default weak function implementation is converted to a helper function get_mbedtls_heap_helper() which can be used by the platforms for their own function implementation. Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* / doc: Clarify cert_create build when USE_TBBR_DEFS=0Paul Beesley2019-04-111-2/+4
|/ | | | | | | | | | The user guide documentation for the cert_create tool needs to mention that a platform must have a platform_oid.h header file in order to successfully build the cert_create tool when USE_TBBR_DEFS is 0. Change-Id: I77f86a022d207e88a79c97741be3eafbfa0c86f1 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* Merge "Add support for Cortex-A76AE CPU" into integrationAntonio Niño Díaz2019-04-091-0/+2
|\
| * Add support for Cortex-A76AE CPUAlexei Fedorov2019-04-081-0/+2
| | | | | | | | | | Change-Id: I0a81f4ea94d41245cd5150de341b51fc70babffe Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
* | Document changes to auth-frameworkJoel Hutton2019-04-081-117/+147
| | | | | | | | | | | | | | | | The data structures in the auth-framework were changed by the previous patch, and need to be updated. Change-Id: Icfad2ac688d03d32aa93e45f930a375abbc164a9 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
* | doc: Fix heading levels for changelogPaul Beesley2019-04-051-66/+66
|/ | | | | | | | | | | | The change-log.rst file does not use the same symbols as the other documents when organising its headings, sub-headings and so on. In order to compile these documents together with Sphinx, forming a top-level index and a consistent structure, it is necessary to normalise these. Change-Id: Ib4620ff03a9e76fec9e36e95549016c7b3fe12bb Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* Merge pull request #1918 from lmayencourt/lm/contrib_guidelinesAntonio Niño Díaz2019-04-032-70/+59
|\ | | | | doc: Update contribution guidelines
| * doc: Update contribution guidelinesLouis Mayencourt2019-04-022-70/+59
| | | | | | | | | | | | | | Update the documentation for trustedfirmware.org migration Change-Id: Ibb7052b0becbec3326164f1503806ca2c2fd4dcc Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
* | plat: gxl: Add documentation on building GXL imageRemi Pommarel2019-04-021-0/+27
|/ | | | | | Also adds a maintainer for GXL. Signed-off-by: Remi Pommarel <repk@triplefau.lt>
* Merge pull request #1911 from lmayencourt/lm/update_gccSoby Mathew2019-03-291-5/+7
|\ | | | | doc: Suggest to use the latest version of GCC 8.2
| * doc: Suggest to use the latest version of GCC 8.2Louis Mayencourt2019-03-291-5/+7
| | | | | | | | | | | | | | | | | | | | The latest version of GCC are required to use the new features of TF-A. Suggest to use the latest version available on developer.arm.com instead of the version specified on the Linaro Release notes. At the time of writing, GCC 8.2-2019.01 is the latest version available. Change-Id: Idd5c00749e39ca9dc8b7c5623b5d64356c9ce6e5 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
* | doc: Clarify draft status of SPCI and SPRT specsPaul Beesley2019-03-291-8/+7
|/ | | | | | | | | These SPM-related specifications are mentioned in the readme and the change log. Update references to these specs to make it clear that they are in draft form and are expected to change. Change-Id: Ia2791c48c371a828246d96f102a402747cd69f96 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* Merge pull request #1910 from soby-mathew/sm/mb_ver_docSoby Mathew2019-03-281-0/+5
|\ | | | | docs: List MB version dependancy for Juno FWU as known issue
| * docs: List MB version dependency for Juno FWU as known issueSoby Mathew2019-03-281-0/+5
| | | | | | | | | | Change-Id: Ib37215ca4c9b515e54054290952eed5034582ba4 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* | Documentation: update tested platformsAmbroise Vincent2019-03-281-0/+6
|/ | | | | | | | Update both the readme and user guide on their shared "platform" section. Change-Id: Ia1f30acda45ac8facdcb7d540800191cdf6cdacf Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* Merge pull request #1906 from pbeesley-arm/pb/readmeSoby Mathew2019-03-271-0/+165
|\ | | | | doc: Prepare readme for 2.1 release
| * doc: Add contents.rst to link to pagesPaul Beesley2019-03-261-0/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the temporary contents page that links to all other documents (except platform ports). This page is needed during the trustedfirmware.org migration, before we have a Sphinx rendering pipeline set up, because cgit doesn't offer a good way to view rendered docs while browsing the tree. We need to have a links page that can be opened from the cgit 'about' view. Change-Id: I3ad87a9fa8a14dc8e371aac7ee473575fed316bf Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* | Merge pull request #1907 from pbeesley-arm/pb/changelogSoby Mathew2019-03-271-0/+442
|\ \ | | | | | | doc: Update change log for v2.1
| * | doc: Update change log for v2.1Paul Beesley2019-03-271-0/+442
| |/ | | | | | | | | Change-Id: Ib6a20ffdddad11b9629d7dca7f841182299bf860 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* / docs: Update user guideAmbroise Vincent2019-03-261-28/+31
|/ | | | | | | | Make sure the steps in the user guide are up to date and can be performed out of the box. Change-Id: Ib4d959aa771cf515f74e150aaee2fbad24c18c38 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* Merge pull request #1902 from jts-arm/romlibDimitris Papastamos2019-03-211-4/+12
|\ | | | | ROMLIB bug fixes
| * ROMLIB bug fixesJohn Tsichritzis2019-03-211-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed the below bugs: 1) Bug related to build flag V=1: if the flag was V=0, building with ROMLIB would fail. 2) Due to a syntax bug in genwrappers.sh, index file entries marked as "patch" or "reserved" were ignored. 3) Added a prepending hash to constants that genwrappers is generating. 4) Due to broken dependencies, currently the inclusion functionality is intentionally not utilised. This is why the contents of romlib/jmptbl.i have been copied to platform specific jmptbl.i files. As a result of the broken dependencies, when changing the index files, e.g. patching functions, a clean build is always required. This is a known issue that will be fixed in the future. Change-Id: I9d92aa9724e86d8f90fcd3e9f66a27aa3cab7aaa Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
* | Merge pull request #1899 from jts-arm/docsDimitris Papastamos2019-03-201-0/+6
|\ \ | |/ |/| Add USE_ROMLIB build option to user guide
| * Add USE_ROMLIB build option to user guideJohn Tsichritzis2019-03-191-0/+6
| | | | | | | | | | Change-Id: I4261fec500184383980b7fc9475620a485cf6c28 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
* | Declare PAuth for Secure world as experimentalAlexei Fedorov2019-03-182-12/+18
|/ | | | | | | | | | | | Declare ENABLE_PAUTH and CTX_INCLUDE_PAUTH_REGS build options as experimental. Pointer Authentication is enabled for Non-secure world irrespective of the value of these build flags if the CPU supports it. The patch also fixes the description of fiptool 'help' command. Change-Id: I46de3228fbcce774a2624cd387798680d8504c38 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
* Merge pull request #1890 from jts-arm/mbedtlsDimitris Papastamos2019-03-151-1/+1
|\ | | | | Update documentation for mbed TLS v2.16
| * Update documentation for mbed TLS v2.16John Tsichritzis2019-03-141-1/+1
| | | | | | | | | | Change-Id: I1854b5830dbd48e909a4ce1b931c13fb3e997600 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
* | Merge pull request #1859 from JackyBai/masterSoby Mathew2019-03-131-0/+1
|\ \ | |/ |/| refact the imx8m common code and add the imx8mm support
| * plat: imx8m: Add the basic support for imx8mmJacky Bai2019-03-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX8M Mini is new SOC of the i.MX8M family. it is focused on delivering the latest and greatest video and audio experience combining state-of-the-art media-specific features with high-performance processing while optimized for lowest power consumption. The i.MX 8M Mini Media Applications Processor is 14nm FinFET product of the growing i.MX8M family targeting the consumer & industrial market. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad Cortex-A53 cluster with video and graphics accelerators this patch add the basic support for i.MX8MM. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
* | Cortex-A17: Implement workaround for errata 852423Ambroise Vincent2019-03-131-0/+3
| | | | | | | | | | Change-Id: I3a101e540f0b134ecf9a51fa3d7d8e3d0369b297 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* | Cortex-A17: Implement workaround for errata 852421Ambroise Vincent2019-03-131-0/+5
| | | | | | | | | | Change-Id: Ic3004fc43229d63c5a59ca74c1837fb0604e1f33 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* | Merge pull request #1884 from AlexeiFedorov/af/set_march_to_arch_minorSoby Mathew2019-03-131-1/+5
|\ \ | | | | | | Allow setting compiler's target architecture
| * | Allow setting compiler's target architectureAlexei Fedorov2019-03-121-1/+5
| | | | | | | | | | | | | | | Change-Id: I56ea088f415bdb9077c385bd3450ff4b2cfa2eac Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
* | | Cortex-A15: Implement workaround for errata 827671Ambroise Vincent2019-03-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This erratum can only be worked around on revisions >= r3p0 because the register that needs to be accessed only exists in those revisions[1]. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438g/CIHEAAAD.html Change-Id: I5d773547d7a09b5bd01dabcd19ceeaf53c186faa Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* | | Cortex-A15: Implement workaround for errata 816470Ambroise Vincent2019-03-131-0/+5
|/ / | | | | | | | | Change-Id: I9755252725be25bfd0147839d7df56888424ff84 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* | doc: Add and correct headings for imported filesPaul Beesley2019-03-074-6/+24
| | | | | | | | | | | | | | | | Some files imported from the wiki are missing RST section headers and other files are using inconsistent characters for the same header level. Change-Id: I318c843f9bc8fb40074ef90827b9acac06463662 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* | doc: Add missing CVE links to advisoriesPaul Beesley2019-03-076-6/+12
| | | | | | | | | | | | | | | | Some security advisories did not contain a direct link to the CVE page on mitre.org. Change-Id: I80f8f27a25da3a76b564a3e49cafe5e253379f37 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* | doc: Update links within imported wiki contentJoel Hutton2019-03-074-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch covers two changes: - Links that refer to GitHub are updated to point to the relevant content on trustedfirmware.org - Internal links between documents have been updated, with the required .rst suffix being added or due to a change in the relative locations of the files. Change-Id: Ibf87da7d2ece726d1c94a9b33a2bbc3129de7779 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com> Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* | doc: Migrate a subset of the GitHub wiki contentJoel Hutton2019-03-0714-0/+1585
| | | | | | | | | | | | | | | | | | | | | | With the TF wiki being migrated from GitHub to trustedfirmware.org, some documents will be moved into the docs/ directory within the repository rather than remaining as external content. The appropriate action has been decided on a per-document basis. Change-Id: Id0f615f3418369256f30d2e34e354a115389d105 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com> Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* | Remove todo from example codePaul Beesley2019-03-061-1/+0
|/ | | | | | | Keeping that in the docs is a bit untidy Change-Id: Ia95246208cee48df1536b4317a8c896ab2c84fc2 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* Doc: Fix internal links in interrupt framework design guideSandrine Bailleux2019-03-011-49/+64
| | | | | | | | | | Some of the sections numbers have been incorrect since the document structure has changed. Using references to sections rather than hard-coded section numbers fixes the issue while making it more future-proof to updates. Change-Id: I80f5ab6a55a0073b1562a02ce2c9ec7d67cddfff Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
* Doc: Fix a formatting glitchSandrine Bailleux2019-03-011-4/+4
| | | | | | | | | | While converting the interrupt framework design document from Markdown to reStructuredText format, see commit 6f6257476754 ("Convert documentation to reStructuredText"), the structure of the document was changed and one of the titles got lost. Fix that. Change-Id: Ib3e6c1f9f01f16108fde3b89ceb624bd54049d2f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-14 20:59:54 +0000