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authorAmbroise Vincent <ambroise.vincent@arm.com>2019-02-21 16:27:34 +0000
committerAmbroise Vincent <ambroise.vincent@arm.com>2019-02-28 09:56:58 +0000
commit6ab87d29817846cd439afe42b3c216385b1b14dd (patch)
treee96134f677604ee1a080d1a2c4a55608eba353c9 /include
parenta6cc661016a32494f1bbe7b7377bc9a549f297b4 (diff)
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Cortex-A55: Implement workaround for erratum 798797
Change-Id: Ic42b37b8500d5e592af2b9fe130f35a0e2db4d14 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Diffstat (limited to 'include')
-rw-r--r--include/lib/cpus/aarch64/cortex_a55.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a55.h b/include/lib/cpus/aarch64/cortex_a55.h
index 13f209994..feac1d2f0 100644
--- a/include/lib/cpus/aarch64/cortex_a55.h
+++ b/include/lib/cpus/aarch64/cortex_a55.h
@@ -27,6 +27,7 @@
#define CORTEX_A55_CPUACTLR_EL1_DISABLE_WRITE_STREAMING (ULL(1) << 24)
#define CORTEX_A55_CPUACTLR_EL1_DISABLE_DUAL_ISSUE (ULL(1) << 31)
+#define CORTEX_A55_CPUACTLR_EL1_DISABLE_L1_PAGEWALKS (ULL(1) << 49)
/*******************************************************************************
* CPU Identification register specific definitions.