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| author | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
|---|---|---|
| committer | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
| commit | 1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch) | |
| tree | c607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-2.c | |
| parent | 283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff) | |
| download | toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.gz toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.bz2 toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.zip | |
Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-2.c')
| -rw-r--r-- | gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-2.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-2.c b/gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-2.c new file mode 100644 index 000000000..ea3f39607 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-2.c @@ -0,0 +1,17 @@ +/* { dg-options "-mgp32 -fpeephole2 -mtune=m14k (-mmicromips)" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ + +void MICROMIPS +foo (int *r4) +{ + int r5 = r4[0]; + int r6 = r4[1]; + r4[2] = r6 * r6; + { + register int r5asm asm ("$5") = r5; + register int r6asm asm ("$6") = r6; + asm ("#foo" : "=m" (r4[3]) : "d" (r5asm), "d" (r6asm)); + } +} + +/* { dg-final { scan-assembler "\tlwp\t\\\$5,0\\(\\\$4\\)" } }*/ |