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authorSteve Ellcey <Steve.Ellcey@imgtec.com>2014-07-03 13:28:53 -0700
committerSteve Ellcey <Steve.Ellcey@imgtec.com>2014-07-03 16:10:41 -0700
commite7af147f979e657fe2df00808e5b4319b0e088c6 (patch)
tree4f302235c4ef4c0dce52449576c1b65333433cd5 /gcc-4.9/gcc/testsuite/gcc.target/mips/madd-9.c
parent1610db7b1892fe4da05cf4b0f64d9653978507d8 (diff)
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Update GCC 4.9 to include mips32r6, mips64r6 and MSA changes.
Change-Id: I136290865b137531d55321987818fc954a65f5d6
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/mips/madd-9.c')
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/mips/madd-9.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/mips/madd-9.c b/gcc-4.9/gcc/testsuite/gcc.target/mips/madd-9.c
index 28681a910..d89a9fd3e 100644
--- a/gcc-4.9/gcc/testsuite/gcc.target/mips/madd-9.c
+++ b/gcc-4.9/gcc/testsuite/gcc.target/mips/madd-9.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "isa_rev>=1 -mgp32 -mtune=4kc" } */
+/* { dg-options "isa_rev>=1 -mgp32 -mtune=4kc forbid_cpu=mips.*r6" } */
/* References to X within the loop need to have a higher frequency than
references to X outside the loop, otherwise there is no reason
to prefer multiply/accumulator registers over GPRs. */