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| author | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
|---|---|---|
| committer | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
| commit | 1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch) | |
| tree | c607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/testsuite/gcc.target/mips/fpr-moves-6.c | |
| parent | 283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff) | |
| download | toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.gz toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.bz2 toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.zip | |
Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/mips/fpr-moves-6.c')
| -rw-r--r-- | gcc-4.9/gcc/testsuite/gcc.target/mips/fpr-moves-6.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/mips/fpr-moves-6.c b/gcc-4.9/gcc/testsuite/gcc.target/mips/fpr-moves-6.c new file mode 100644 index 000000000..30a83ec66 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/mips/fpr-moves-6.c @@ -0,0 +1,35 @@ +/* { dg-options "-mabi=64 -mhard-float -EB" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ +/* { dg-require-effective-target mips_newabi_large_long_double } */ + +NOMIPS16 void +foo (long double d, long double *x) +{ + *x = d; +} + +NOMIPS16 long double +bar (long double d, long double *x) +{ + register long double l1 asm ("$8") = d; + register long double l2 asm ("$10") = x[1]; + register long double l3 asm ("$f20") = 0.0; + asm ("#foo" : "=d" (l1) : "d" (l1)); + asm ("#foo" : "=d" (l2) : "d" (l2)); + asm volatile ("#foo" :: "f" (l3)); + x[1] = l1; + return l2; +} + +/* { dg-final { scan-assembler "\tsdc1\t\\\$f12,0\\\(\\\$6\\\)\n" } } */ +/* { dg-final { scan-assembler "\tsdc1\t\\\$f13,8\\\(\\\$6\\\)\n" } } */ +/* { dg-final { scan-assembler "\tdmfc1\t\\\$8,\\\$f12\n" } } */ +/* { dg-final { scan-assembler "\tdmfc1\t\\\$9,\\\$f13\n" } } */ +/* { dg-final { scan-assembler "\tld\t\\\$10,16\\\(\\\$6\\\)\n" } } */ +/* { dg-final { scan-assembler "\tld\t\\\$11,24\\\(\\\$6\\\)\n" } } */ +/* { dg-final { scan-assembler "\tdmtc1\t\\\$0,\\\$f20\n" } } */ +/* { dg-final { scan-assembler "\tdmtc1\t\\\$0,\\\$f21\n" } } */ +/* { dg-final { scan-assembler "\tsd\t\\\$8,16\\\(\\\$6\\\)\n" } } */ +/* { dg-final { scan-assembler "\tsd\t\\\$9,24\\\(\\\$6\\\)\n" } } */ +/* { dg-final { scan-assembler "\tdmtc1\t\\\$10,\\\$f0\n" } } */ +/* { dg-final { scan-assembler "\tdmtc1\t\\\$11,\\\$f2\n" } } */ |