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author | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
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committer | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
commit | 1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch) | |
tree | c607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c | |
parent | 283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff) | |
download | toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.gz toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.bz2 toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.zip |
Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c')
-rw-r--r-- | gcc-4.9/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c new file mode 100644 index 000000000..0672d48b6 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +long v = 0; + +long +atomic_fetch_add_RELAXED (long a) +{ + return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); +} + +long +atomic_fetch_sub_RELAXED (long a) +{ + return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); +} + +long +atomic_fetch_and_RELAXED (long a) +{ + return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); +} + +long +atomic_fetch_nand_RELAXED (long a) +{ + return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); +} + +long +atomic_fetch_xor_RELAXED (long a) +{ + return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); +} + +long +atomic_fetch_or_RELAXED (long a) +{ + return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); +} + +/* { dg-final { scan-assembler-times "ldxr\tx\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 {target lp64} } } */ +/* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 {target ilp32} } } */ +/* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, x\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 {target lp64} } } */ +/* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 {target ilp32} } } */ |