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-rw-r--r--test/CodeGen/X86/bmi.ll16
-rw-r--r--test/CodeGen/X86/clz.ll14
-rw-r--r--test/CodeGen/X86/lzcnt.ll16
-rw-r--r--test/CodeGen/X86/vec_ctbits.ll8
4 files changed, 27 insertions, 27 deletions
diff --git a/test/CodeGen/X86/bmi.ll b/test/CodeGen/X86/bmi.ll
index 69cf7365c5..cde9b4884d 100644
--- a/test/CodeGen/X86/bmi.ll
+++ b/test/CodeGen/X86/bmi.ll
@@ -1,40 +1,40 @@
; RUN: llc < %s -march=x86-64 -mattr=+bmi,+bmi2 | FileCheck %s
define i32 @t1(i32 %x) nounwind {
- %tmp = tail call i32 @llvm.cttz.i32( i32 %x )
+ %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 false )
ret i32 %tmp
; CHECK: t1:
; CHECK: tzcntl
}
-declare i32 @llvm.cttz.i32(i32) nounwind readnone
+declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
define i16 @t2(i16 %x) nounwind {
- %tmp = tail call i16 @llvm.cttz.i16( i16 %x )
+ %tmp = tail call i16 @llvm.cttz.i16( i16 %x, i1 false )
ret i16 %tmp
; CHECK: t2:
; CHECK: tzcntw
}
-declare i16 @llvm.cttz.i16(i16) nounwind readnone
+declare i16 @llvm.cttz.i16(i16, i1) nounwind readnone
define i64 @t3(i64 %x) nounwind {
- %tmp = tail call i64 @llvm.cttz.i64( i64 %x )
+ %tmp = tail call i64 @llvm.cttz.i64( i64 %x, i1 false )
ret i64 %tmp
; CHECK: t3:
; CHECK: tzcntq
}
-declare i64 @llvm.cttz.i64(i64) nounwind readnone
+declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone
define i8 @t4(i8 %x) nounwind {
- %tmp = tail call i8 @llvm.cttz.i8( i8 %x )
+ %tmp = tail call i8 @llvm.cttz.i8( i8 %x, i1 false )
ret i8 %tmp
; CHECK: t4:
; CHECK: tzcntw
}
-declare i8 @llvm.cttz.i8(i8) nounwind readnone
+declare i8 @llvm.cttz.i8(i8, i1) nounwind readnone
define i32 @andn32(i32 %x, i32 %y) nounwind readnone {
%tmp1 = xor i32 %x, -1
diff --git a/test/CodeGen/X86/clz.ll b/test/CodeGen/X86/clz.ll
index d76fab4123..9b26efd10d 100644
--- a/test/CodeGen/X86/clz.ll
+++ b/test/CodeGen/X86/clz.ll
@@ -1,36 +1,36 @@
; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
define i32 @t1(i32 %x) nounwind {
- %tmp = tail call i32 @llvm.ctlz.i32( i32 %x )
+ %tmp = tail call i32 @llvm.ctlz.i32( i32 %x, i1 true )
ret i32 %tmp
; CHECK: t1:
; CHECK: bsrl
; CHECK: cmov
}
-declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
define i32 @t2(i32 %x) nounwind {
- %tmp = tail call i32 @llvm.cttz.i32( i32 %x )
+ %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 true )
ret i32 %tmp
; CHECK: t2:
; CHECK: bsfl
; CHECK: cmov
}
-declare i32 @llvm.cttz.i32(i32) nounwind readnone
+declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
define i16 @t3(i16 %x, i16 %y) nounwind {
entry:
%tmp1 = add i16 %x, %y
- %tmp2 = tail call i16 @llvm.ctlz.i16( i16 %tmp1 ) ; <i16> [#uses=1]
+ %tmp2 = tail call i16 @llvm.ctlz.i16( i16 %tmp1, i1 true ) ; <i16> [#uses=1]
ret i16 %tmp2
; CHECK: t3:
; CHECK: bsrw
; CHECK: cmov
}
-declare i16 @llvm.ctlz.i16(i16) nounwind readnone
+declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
; Don't generate the cmovne when the source is known non-zero (and bsr would
; not set ZF).
@@ -43,6 +43,6 @@ entry:
; CHECK-NOT: cmov
; CHECK: ret
%or = or i32 %n, 1
- %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %or)
+ %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %or, i1 true)
ret i32 %tmp1
}
diff --git a/test/CodeGen/X86/lzcnt.ll b/test/CodeGen/X86/lzcnt.ll
index e5a55abf1a..adfc38b35e 100644
--- a/test/CodeGen/X86/lzcnt.ll
+++ b/test/CodeGen/X86/lzcnt.ll
@@ -1,38 +1,38 @@
; RUN: llc < %s -march=x86-64 -mattr=+lzcnt | FileCheck %s
define i32 @t1(i32 %x) nounwind {
- %tmp = tail call i32 @llvm.ctlz.i32( i32 %x )
+ %tmp = tail call i32 @llvm.ctlz.i32( i32 %x, i1 false )
ret i32 %tmp
; CHECK: t1:
; CHECK: lzcntl
}
-declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
define i16 @t2(i16 %x) nounwind {
- %tmp = tail call i16 @llvm.ctlz.i16( i16 %x )
+ %tmp = tail call i16 @llvm.ctlz.i16( i16 %x, i1 false )
ret i16 %tmp
; CHECK: t2:
; CHECK: lzcntw
}
-declare i16 @llvm.ctlz.i16(i16) nounwind readnone
+declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
define i64 @t3(i64 %x) nounwind {
- %tmp = tail call i64 @llvm.ctlz.i64( i64 %x )
+ %tmp = tail call i64 @llvm.ctlz.i64( i64 %x, i1 false )
ret i64 %tmp
; CHECK: t3:
; CHECK: lzcntq
}
-declare i64 @llvm.ctlz.i64(i64) nounwind readnone
+declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
define i8 @t4(i8 %x) nounwind {
- %tmp = tail call i8 @llvm.ctlz.i8( i8 %x )
+ %tmp = tail call i8 @llvm.ctlz.i8( i8 %x, i1 false )
ret i8 %tmp
; CHECK: t4:
; CHECK: lzcntw
}
-declare i8 @llvm.ctlz.i8(i8) nounwind readnone
+declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
diff --git a/test/CodeGen/X86/vec_ctbits.ll b/test/CodeGen/X86/vec_ctbits.ll
index f0158d643c..bddd535146 100644
--- a/test/CodeGen/X86/vec_ctbits.ll
+++ b/test/CodeGen/X86/vec_ctbits.ll
@@ -1,15 +1,15 @@
; RUN: llc < %s -march=x86-64
-declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
-declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
+declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1)
+declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
define <2 x i64> @footz(<2 x i64> %a) nounwind {
- %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a)
+ %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a, i1 true)
ret <2 x i64> %c
}
define <2 x i64> @foolz(<2 x i64> %a) nounwind {
- %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a)
+ %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
ret <2 x i64> %c
}
define <2 x i64> @foopop(<2 x i64> %a) nounwind {