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-rw-r--r--test/CodeGen/ARM/clz.ll4
-rw-r--r--test/CodeGen/ARM/ctz.ll4
-rw-r--r--test/CodeGen/ARM/fold-const.ll4
-rw-r--r--test/CodeGen/Generic/2008-02-04-Ctlz.ll8
-rw-r--r--test/CodeGen/Generic/llvm-ct-intrinsics.ll32
-rw-r--r--test/CodeGen/Mips/2008-08-08-ctlz.ll4
-rw-r--r--test/CodeGen/Mips/2010-11-09-CountLeading.ll10
-rw-r--r--test/CodeGen/Mips/mips64instrs.ll6
-rw-r--r--test/CodeGen/PowerPC/2007-03-24-cntlzd.ll4
-rw-r--r--test/CodeGen/PowerPC/cttz.ll4
-rw-r--r--test/CodeGen/Thumb2/thumb2-clz.ll4
-rw-r--r--test/CodeGen/X86/bmi.ll16
-rw-r--r--test/CodeGen/X86/clz.ll14
-rw-r--r--test/CodeGen/X86/lzcnt.ll16
-rw-r--r--test/CodeGen/X86/vec_ctbits.ll8
15 files changed, 69 insertions, 69 deletions
diff --git a/test/CodeGen/ARM/clz.ll b/test/CodeGen/ARM/clz.ll
index e381e00298..5b6a584bbe 100644
--- a/test/CodeGen/ARM/clz.ll
+++ b/test/CodeGen/ARM/clz.ll
@@ -1,10 +1,10 @@
; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s
-declare i32 @llvm.ctlz.i32(i32)
+declare i32 @llvm.ctlz.i32(i32, i1)
define i32 @test(i32 %x) {
; CHECK: test
; CHECK: clz r0, r0
- %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x )
+ %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x, i1 true )
ret i32 %tmp.1
}
diff --git a/test/CodeGen/ARM/ctz.ll b/test/CodeGen/ARM/ctz.ll
index 1d2ced37b0..5ebca53b46 100644
--- a/test/CodeGen/ARM/ctz.ll
+++ b/test/CodeGen/ARM/ctz.ll
@@ -1,11 +1,11 @@
; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
-declare i32 @llvm.cttz.i32(i32)
+declare i32 @llvm.cttz.i32(i32, i1)
define i32 @f1(i32 %a) {
; CHECK: f1:
; CHECK: rbit
; CHECK: clz
- %tmp = call i32 @llvm.cttz.i32( i32 %a )
+ %tmp = call i32 @llvm.cttz.i32( i32 %a, i1 true )
ret i32 %tmp
}
diff --git a/test/CodeGen/ARM/fold-const.ll b/test/CodeGen/ARM/fold-const.ll
index 227e4e8aaa..1ba561dd70 100644
--- a/test/CodeGen/ARM/fold-const.ll
+++ b/test/CodeGen/ARM/fold-const.ll
@@ -3,7 +3,7 @@
define i32 @f(i32 %a) nounwind readnone optsize ssp {
entry:
%conv = zext i32 %a to i64
- %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %conv)
+ %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %conv, i1 true)
; CHECK: clz
; CHECK-NOT: adds
%cast = trunc i64 %tmp1 to i32
@@ -11,4 +11,4 @@ entry:
ret i32 %sub
}
-declare i64 @llvm.ctlz.i64(i64) nounwind readnone
+declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
diff --git a/test/CodeGen/Generic/2008-02-04-Ctlz.ll b/test/CodeGen/Generic/2008-02-04-Ctlz.ll
index 288bfd245d..9f102066f2 100644
--- a/test/CodeGen/Generic/2008-02-04-Ctlz.ll
+++ b/test/CodeGen/Generic/2008-02-04-Ctlz.ll
@@ -4,8 +4,8 @@
define i32 @main(i64 %arg) nounwind {
entry:
- %tmp37 = tail call i64 @llvm.ctlz.i64( i64 %arg ) ; <i64> [#uses=1]
- %tmp47 = tail call i64 @llvm.cttz.i64( i64 %arg ) ; <i64> [#uses=1]
+ %tmp37 = tail call i64 @llvm.ctlz.i64( i64 %arg, i1 true ) ; <i64> [#uses=1]
+ %tmp47 = tail call i64 @llvm.cttz.i64( i64 %arg, i1 true ) ; <i64> [#uses=1]
%tmp57 = tail call i64 @llvm.ctpop.i64( i64 %arg ) ; <i64> [#uses=1]
%tmp38 = trunc i64 %tmp37 to i32 ; <i32>:0 [#uses=1]
%tmp48 = trunc i64 %tmp47 to i32 ; <i32>:0 [#uses=1]
@@ -16,6 +16,6 @@ entry:
declare i32 @printf(i8* noalias , ...) nounwind
-declare i64 @llvm.ctlz.i64(i64) nounwind readnone
-declare i64 @llvm.cttz.i64(i64) nounwind readnone
+declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
+declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone
declare i64 @llvm.ctpop.i64(i64) nounwind readnone
diff --git a/test/CodeGen/Generic/llvm-ct-intrinsics.ll b/test/CodeGen/Generic/llvm-ct-intrinsics.ll
index 1db7549759..abcdb9bbbc 100644
--- a/test/CodeGen/Generic/llvm-ct-intrinsics.ll
+++ b/test/CodeGen/Generic/llvm-ct-intrinsics.ll
@@ -21,19 +21,19 @@ define void @ctpoptest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %C
ret void
}
-declare i64 @llvm.ctlz.i64(i64)
+declare i64 @llvm.ctlz.i64(i64, i1)
-declare i32 @llvm.ctlz.i32(i32)
+declare i32 @llvm.ctlz.i32(i32, i1)
-declare i16 @llvm.ctlz.i16(i16)
+declare i16 @llvm.ctlz.i16(i16, i1)
-declare i8 @llvm.ctlz.i8(i8)
+declare i8 @llvm.ctlz.i8(i8, i1)
define void @ctlztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
- %a = call i8 @llvm.ctlz.i8( i8 %A ) ; <i8> [#uses=1]
- %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
- %c = call i32 @llvm.ctlz.i32( i32 %C ) ; <i32> [#uses=1]
- %d = call i64 @llvm.ctlz.i64( i64 %D ) ; <i64> [#uses=1]
+ %a = call i8 @llvm.ctlz.i8( i8 %A, i1 true ) ; <i8> [#uses=1]
+ %b = call i16 @llvm.ctlz.i16( i16 %B, i1 true ) ; <i16> [#uses=1]
+ %c = call i32 @llvm.ctlz.i32( i32 %C, i1 true ) ; <i32> [#uses=1]
+ %d = call i64 @llvm.ctlz.i64( i64 %D, i1 true ) ; <i64> [#uses=1]
store i8 %a, i8* %AP
store i16 %b, i16* %BP
store i32 %c, i32* %CP
@@ -41,19 +41,19 @@ define void @ctlztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP
ret void
}
-declare i64 @llvm.cttz.i64(i64)
+declare i64 @llvm.cttz.i64(i64, i1)
-declare i32 @llvm.cttz.i32(i32)
+declare i32 @llvm.cttz.i32(i32, i1)
-declare i16 @llvm.cttz.i16(i16)
+declare i16 @llvm.cttz.i16(i16, i1)
-declare i8 @llvm.cttz.i8(i8)
+declare i8 @llvm.cttz.i8(i8, i1)
define void @cttztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
- %a = call i8 @llvm.cttz.i8( i8 %A ) ; <i8> [#uses=1]
- %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
- %c = call i32 @llvm.cttz.i32( i32 %C ) ; <i32> [#uses=1]
- %d = call i64 @llvm.cttz.i64( i64 %D ) ; <i64> [#uses=1]
+ %a = call i8 @llvm.cttz.i8( i8 %A, i1 true ) ; <i8> [#uses=1]
+ %b = call i16 @llvm.cttz.i16( i16 %B, i1 true ) ; <i16> [#uses=1]
+ %c = call i32 @llvm.cttz.i32( i32 %C, i1 true ) ; <i32> [#uses=1]
+ %d = call i64 @llvm.cttz.i64( i64 %D, i1 true ) ; <i64> [#uses=1]
store i8 %a, i8* %AP
store i16 %b, i16* %BP
store i32 %c, i32* %CP
diff --git a/test/CodeGen/Mips/2008-08-08-ctlz.ll b/test/CodeGen/Mips/2008-08-08-ctlz.ll
index 5220183652..abd61de5a8 100644
--- a/test/CodeGen/Mips/2008-08-08-ctlz.ll
+++ b/test/CodeGen/Mips/2008-08-08-ctlz.ll
@@ -3,8 +3,8 @@
define i32 @A0(i32 %u) nounwind {
entry:
; CHECK: clz
- call i32 @llvm.ctlz.i32( i32 %u )
+ call i32 @llvm.ctlz.i32( i32 %u, i1 true )
ret i32 %0
}
-declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
diff --git a/test/CodeGen/Mips/2010-11-09-CountLeading.ll b/test/CodeGen/Mips/2010-11-09-CountLeading.ll
index c592b31178..6174500d3e 100644
--- a/test/CodeGen/Mips/2010-11-09-CountLeading.ll
+++ b/test/CodeGen/Mips/2010-11-09-CountLeading.ll
@@ -3,16 +3,16 @@
; CHECK: clz $2, $4
define i32 @t1(i32 %X) nounwind readnone {
entry:
- %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X)
+ %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X, i1 true)
ret i32 %tmp1
}
-declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
; CHECK: clz $2, $4
define i32 @t2(i32 %X) nounwind readnone {
entry:
- %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X)
+ %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X, i1 true)
ret i32 %tmp1
}
@@ -20,7 +20,7 @@ entry:
define i32 @t3(i32 %X) nounwind readnone {
entry:
%neg = xor i32 %X, -1
- %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg)
+ %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg, i1 true)
ret i32 %tmp1
}
@@ -28,6 +28,6 @@ entry:
define i32 @t4(i32 %X) nounwind readnone {
entry:
%neg = xor i32 %X, -1
- %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg)
+ %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg, i1 true)
ret i32 %tmp1
}
diff --git a/test/CodeGen/Mips/mips64instrs.ll b/test/CodeGen/Mips/mips64instrs.ll
index 9bc178c63d..0418311490 100644
--- a/test/CodeGen/Mips/mips64instrs.ll
+++ b/test/CodeGen/Mips/mips64instrs.ll
@@ -116,12 +116,12 @@ entry:
ret i64 %rem
}
-declare i64 @llvm.ctlz.i64(i64) nounwind readnone
+declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
define i64 @f18(i64 %X) nounwind readnone {
entry:
; CHECK: dclz $2, $4
- %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X)
+ %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X, i1 true)
ret i64 %tmp1
}
@@ -129,7 +129,7 @@ define i64 @f19(i64 %X) nounwind readnone {
entry:
; CHECK: dclo $2, $4
%neg = xor i64 %X, -1
- %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg)
+ %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg, i1 true)
ret i64 %tmp1
}
diff --git a/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll
index cca9e658ad..3620b0e634 100644
--- a/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll
+++ b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll
@@ -2,11 +2,11 @@
define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind {
%tmp19 = load i64* %t
- %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19 ) ; <i64> [#uses=1]
+ %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19, i1 true ) ; <i64> [#uses=1]
%tmp23 = trunc i64 %tmp22 to i32
%tmp89 = add i32 %tmp23, -64 ; <i32> [#uses=1]
%tmp90 = add i32 %tmp89, 0 ; <i32> [#uses=1]
ret i32 %tmp90
}
-declare i64 @llvm.ctlz.i64(i64)
+declare i64 @llvm.ctlz.i64(i64, i1)
diff --git a/test/CodeGen/PowerPC/cttz.ll b/test/CodeGen/PowerPC/cttz.ll
index ab493a068a..1d365d47a8 100644
--- a/test/CodeGen/PowerPC/cttz.ll
+++ b/test/CodeGen/PowerPC/cttz.ll
@@ -1,11 +1,11 @@
; Make sure this testcase does not use ctpop
; RUN: llc < %s -march=ppc32 | grep -i cntlzw
-declare i32 @llvm.cttz.i32(i32)
+declare i32 @llvm.cttz.i32(i32, i1)
define i32 @bar(i32 %x) {
entry:
- %tmp.1 = call i32 @llvm.cttz.i32( i32 %x ) ; <i32> [#uses=1]
+ %tmp.1 = call i32 @llvm.cttz.i32( i32 %x, i1 true ) ; <i32> [#uses=1]
ret i32 %tmp.1
}
diff --git a/test/CodeGen/Thumb2/thumb2-clz.ll b/test/CodeGen/Thumb2/thumb2-clz.ll
index 00a54a0f19..f7e966535d 100644
--- a/test/CodeGen/Thumb2/thumb2-clz.ll
+++ b/test/CodeGen/Thumb2/thumb2-clz.ll
@@ -3,8 +3,8 @@
define i32 @f1(i32 %a) {
; CHECK: f1:
; CHECK: clz r
- %tmp = tail call i32 @llvm.ctlz.i32(i32 %a)
+ %tmp = tail call i32 @llvm.ctlz.i32(i32 %a, i1 true)
ret i32 %tmp
}
-declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
diff --git a/test/CodeGen/X86/bmi.ll b/test/CodeGen/X86/bmi.ll
index 69cf7365c5..cde9b4884d 100644
--- a/test/CodeGen/X86/bmi.ll
+++ b/test/CodeGen/X86/bmi.ll
@@ -1,40 +1,40 @@
; RUN: llc < %s -march=x86-64 -mattr=+bmi,+bmi2 | FileCheck %s
define i32 @t1(i32 %x) nounwind {
- %tmp = tail call i32 @llvm.cttz.i32( i32 %x )
+ %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 false )
ret i32 %tmp
; CHECK: t1:
; CHECK: tzcntl
}
-declare i32 @llvm.cttz.i32(i32) nounwind readnone
+declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
define i16 @t2(i16 %x) nounwind {
- %tmp = tail call i16 @llvm.cttz.i16( i16 %x )
+ %tmp = tail call i16 @llvm.cttz.i16( i16 %x, i1 false )
ret i16 %tmp
; CHECK: t2:
; CHECK: tzcntw
}
-declare i16 @llvm.cttz.i16(i16) nounwind readnone
+declare i16 @llvm.cttz.i16(i16, i1) nounwind readnone
define i64 @t3(i64 %x) nounwind {
- %tmp = tail call i64 @llvm.cttz.i64( i64 %x )
+ %tmp = tail call i64 @llvm.cttz.i64( i64 %x, i1 false )
ret i64 %tmp
; CHECK: t3:
; CHECK: tzcntq
}
-declare i64 @llvm.cttz.i64(i64) nounwind readnone
+declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone
define i8 @t4(i8 %x) nounwind {
- %tmp = tail call i8 @llvm.cttz.i8( i8 %x )
+ %tmp = tail call i8 @llvm.cttz.i8( i8 %x, i1 false )
ret i8 %tmp
; CHECK: t4:
; CHECK: tzcntw
}
-declare i8 @llvm.cttz.i8(i8) nounwind readnone
+declare i8 @llvm.cttz.i8(i8, i1) nounwind readnone
define i32 @andn32(i32 %x, i32 %y) nounwind readnone {
%tmp1 = xor i32 %x, -1
diff --git a/test/CodeGen/X86/clz.ll b/test/CodeGen/X86/clz.ll
index d76fab4123..9b26efd10d 100644
--- a/test/CodeGen/X86/clz.ll
+++ b/test/CodeGen/X86/clz.ll
@@ -1,36 +1,36 @@
; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
define i32 @t1(i32 %x) nounwind {
- %tmp = tail call i32 @llvm.ctlz.i32( i32 %x )
+ %tmp = tail call i32 @llvm.ctlz.i32( i32 %x, i1 true )
ret i32 %tmp
; CHECK: t1:
; CHECK: bsrl
; CHECK: cmov
}
-declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
define i32 @t2(i32 %x) nounwind {
- %tmp = tail call i32 @llvm.cttz.i32( i32 %x )
+ %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 true )
ret i32 %tmp
; CHECK: t2:
; CHECK: bsfl
; CHECK: cmov
}
-declare i32 @llvm.cttz.i32(i32) nounwind readnone
+declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
define i16 @t3(i16 %x, i16 %y) nounwind {
entry:
%tmp1 = add i16 %x, %y
- %tmp2 = tail call i16 @llvm.ctlz.i16( i16 %tmp1 ) ; <i16> [#uses=1]
+ %tmp2 = tail call i16 @llvm.ctlz.i16( i16 %tmp1, i1 true ) ; <i16> [#uses=1]
ret i16 %tmp2
; CHECK: t3:
; CHECK: bsrw
; CHECK: cmov
}
-declare i16 @llvm.ctlz.i16(i16) nounwind readnone
+declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
; Don't generate the cmovne when the source is known non-zero (and bsr would
; not set ZF).
@@ -43,6 +43,6 @@ entry:
; CHECK-NOT: cmov
; CHECK: ret
%or = or i32 %n, 1
- %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %or)
+ %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %or, i1 true)
ret i32 %tmp1
}
diff --git a/test/CodeGen/X86/lzcnt.ll b/test/CodeGen/X86/lzcnt.ll
index e5a55abf1a..adfc38b35e 100644
--- a/test/CodeGen/X86/lzcnt.ll
+++ b/test/CodeGen/X86/lzcnt.ll
@@ -1,38 +1,38 @@
; RUN: llc < %s -march=x86-64 -mattr=+lzcnt | FileCheck %s
define i32 @t1(i32 %x) nounwind {
- %tmp = tail call i32 @llvm.ctlz.i32( i32 %x )
+ %tmp = tail call i32 @llvm.ctlz.i32( i32 %x, i1 false )
ret i32 %tmp
; CHECK: t1:
; CHECK: lzcntl
}
-declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
define i16 @t2(i16 %x) nounwind {
- %tmp = tail call i16 @llvm.ctlz.i16( i16 %x )
+ %tmp = tail call i16 @llvm.ctlz.i16( i16 %x, i1 false )
ret i16 %tmp
; CHECK: t2:
; CHECK: lzcntw
}
-declare i16 @llvm.ctlz.i16(i16) nounwind readnone
+declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
define i64 @t3(i64 %x) nounwind {
- %tmp = tail call i64 @llvm.ctlz.i64( i64 %x )
+ %tmp = tail call i64 @llvm.ctlz.i64( i64 %x, i1 false )
ret i64 %tmp
; CHECK: t3:
; CHECK: lzcntq
}
-declare i64 @llvm.ctlz.i64(i64) nounwind readnone
+declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
define i8 @t4(i8 %x) nounwind {
- %tmp = tail call i8 @llvm.ctlz.i8( i8 %x )
+ %tmp = tail call i8 @llvm.ctlz.i8( i8 %x, i1 false )
ret i8 %tmp
; CHECK: t4:
; CHECK: lzcntw
}
-declare i8 @llvm.ctlz.i8(i8) nounwind readnone
+declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
diff --git a/test/CodeGen/X86/vec_ctbits.ll b/test/CodeGen/X86/vec_ctbits.ll
index f0158d643c..bddd535146 100644
--- a/test/CodeGen/X86/vec_ctbits.ll
+++ b/test/CodeGen/X86/vec_ctbits.ll
@@ -1,15 +1,15 @@
; RUN: llc < %s -march=x86-64
-declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
-declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
+declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1)
+declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
define <2 x i64> @footz(<2 x i64> %a) nounwind {
- %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a)
+ %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a, i1 true)
ret <2 x i64> %c
}
define <2 x i64> @foolz(<2 x i64> %a) nounwind {
- %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a)
+ %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
ret <2 x i64> %c
}
define <2 x i64> @foopop(<2 x i64> %a) nounwind {
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-15 23:02:34 +0000