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-rw-r--r--include/llvm/Target/TargetMachine.h9
-rw-r--r--lib/CodeGen/LLVMTargetMachine.cpp4
2 files changed, 12 insertions, 1 deletions
diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h
index 5c721a685c..7c86a8d7db 100644
--- a/include/llvm/Target/TargetMachine.h
+++ b/include/llvm/Target/TargetMachine.h
@@ -280,7 +280,14 @@ public:
virtual bool addInstSelector(PassManagerBase &PM, bool Fast) {
return true;
}
-
+
+ /// addPreRegAllocPasses - This method may be implemented by targets that want
+ /// to run passes immediately before register allocation. This should return
+ /// true if -print-machineinstrs should print after these passes.
+ virtual bool addPreRegAlloc(PassManagerBase &PM, bool Fast) {
+ return false;
+ }
+
/// addPostRegAllocPasses - This method may be implemented by targets that
/// want to run passes after register allocation but before prolog-epilog
/// insertion. This should return true if -print-machineinstrs should print
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index c65a6b9a79..3927eee503 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -94,6 +94,10 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
if (EnableSinking)
PM.add(createMachineSinkingPass());
+ // Run pre-ra passes.
+ if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(cerr));
+
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());