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* ART: ARM64: Support DotProd SIMD idiom.Artem Serov2018-09-251-22/+112
* ART: Implement loop full unrolling.Artem Serov2018-07-041-2/+52
* ART: Refactor scalar loop optimizations.Artem Serov2018-07-041-58/+60
* Move instruction_set_ to CompilerOptions.Vladimir Marko2018-06-251-12/+12
* ART: Enable scalar loop peeling and unrolling.Artem Serov2018-05-151-10/+7
* Perform rudimentary check on graph size for no-change assertions.Aart Bik2018-05-031-0/+1
* Remove some SIMD recognition code.Aart Bik2018-05-011-282/+14
* Step 1 of 2: conditional passes.Aart Bik2018-04-261-5/+9
* Run GVN earlier.Aart Bik2018-04-171-0/+5
* ART: Implement scalar loop peeling.Artem Serov2018-04-171-29/+86
* Enabled nested min-max SIMDization for narrower operands.Aart Bik2018-04-031-0/+24
* Revert "Revert "Refined add/sub analysis vis-a-vis SIMD idioms.""Nicolas Geoffray2018-03-281-80/+82
* Revert "Refined add/sub analysis vis-a-vis SIMD idioms."Nicolas Geoffray2018-03-281-82/+80
* Refined add/sub analysis vis-a-vis SIMD idioms.Aart Bik2018-03-271-80/+82
* Merge "ART: Implement scalar loop unrolling."Aart Bik2018-03-261-40/+87
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| * ART: Implement scalar loop unrolling.Artem Serov2018-03-261-40/+87
* | Recognize signed saturation in single clipping.Aart Bik2018-03-191-28/+80
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* Minor cleanup of saturation arithmetic code.Aart Bik2018-03-151-35/+26
* Vectorization of saturation arithmetic.Aart Bik2018-03-151-5/+147
* Introduce MIN/MAX/ABS as HIR nodes.Aart Bik2018-03-071-129/+47
* Introduce ABS as HIR nodes (missing file).Aart Bik2018-03-051-43/+32
* Clean up signed/unsigned in vectorizer.Aart Bik2018-02-011-50/+18
* Fixed spilling bug (visible on ARM64): missed SIMD type.Aart Bik2017-12-071-1/+2
* Refactored optimization passes setup.Aart Bik2017-11-201-2/+3
* MIPS: Implement Sum-of-Abs-DifferencesLena Djokic2017-11-151-8/+8
* cpplint: Cleanup errorsIgor Murashkin2017-11-081-1/+1
* ART: Make InstructionSet an enum class and add kLast.Vladimir Marko2017-11-021-12/+12
* Merge "Alignment optimizations in vectorizer."Aart Bik2017-11-011-57/+198
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| * Alignment optimizations in vectorizer.Aart Bik2017-10-271-57/+198
* | MIPS: Basic SIMD reduction support.Lena Djokic2017-10-271-4/+4
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* Improve sign and zero extension analysis.Aart Bik2017-10-201-34/+19
* Fix min/max SIMD reductionGoran Jakovljevic2017-10-131-8/+19
* ARM: Support SIMD reduction for 32-bit backend.Artem Serov2017-10-121-2/+4
* ART: Use ScopedArenaAllocator for pass-local data.Vladimir Marko2017-10-061-14/+17
* Try to preserve dex pc better in vector code.Aart Bik2017-10-051-42/+49
* ART: Introduce Uint8 compiler data type.Vladimir Marko2017-10-031-59/+81
* Generalized zero/sign-ext analysis. Generalized SAD.Aart Bik2017-10-021-63/+73
* Added SAD test. Generalized vector analysis of narrow type.Aart Bik2017-09-271-9/+43
* ART: Introduce compiler data type.Vladimir Marko2017-09-251-112/+113
* Implement Sum-of-Abs-Differences idiom recognition.Aart Bik2017-09-211-95/+280
* No unrolling for large loop bodies.Aart Bik2017-09-111-8/+13
* ARM64: Tune SIMD loop unrolling factor heuristic.Artem Serov2017-09-071-11/+23
* Pass stats into the loop optimization phase.Aart Bik2017-09-061-2/+3
* Added vectorization stats.Aart Bik2017-09-061-0/+2
* Basic SIMD reduction support.Aart Bik2017-09-051-41/+175
* Revert "Basic SIMD reduction support."Nicolas Geoffray2017-09-021-175/+41
* Basic SIMD reduction support.Aart Bik2017-09-011-41/+175
* Revert "Basic SIMD reduction support."Aart Bik2017-08-301-175/+41
* Basic SIMD reduction support.Aart Bik2017-08-301-41/+175
* Fix performance regression.Aart Bik2017-08-101-5/+10