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authorDavid Srbecky <dsrbecky@google.com>2015-04-20 16:43:52 +0100
committerAndreas Gampe <agampe@google.com>2015-04-22 14:19:16 -0700
commit8a813f72d21dea87b9e94b686fb35868ad4a88c4 (patch)
treeb442306bde33fe6fb6afd7c8ee65a8ec95aeaf4a /compiler/elf_writer_debug.cc
parentbe52c68dca2f146a571ffa65624acf2e6c7adeb2 (diff)
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Do not mention x86 floating point numbers in CFI.
We have explicitly declared them as undefined, but libunwind does not seem to support them at all. Omit the initialization to make libunwind happy. Reasonable debugger should still default to undefined since they are not callee save registers. Bug: 20491296 Change-Id: Ibaa9595b977508e518bfe3f88b240e8959b1198f
Diffstat (limited to 'compiler/elf_writer_debug.cc')
-rw-r--r--compiler/elf_writer_debug.cc8
1 files changed, 6 insertions, 2 deletions
diff --git a/compiler/elf_writer_debug.cc b/compiler/elf_writer_debug.cc
index cf0adae525..28e6999472 100644
--- a/compiler/elf_writer_debug.cc
+++ b/compiler/elf_writer_debug.cc
@@ -99,6 +99,8 @@ static void WriteEhFrameCIE(InstructionSet isa,
return;
}
case kX86: {
+ // FIXME: Add fp registers once libunwind adds support for them. Bug: 20491296
+ constexpr bool generate_opcodes_for_x86_fp = false;
DebugFrameOpCodeWriter<> opcodes;
opcodes.DefCFA(Reg::X86Core(4), 4); // R4(ESP).
opcodes.Offset(Reg::X86Core(8), -4); // R8(EIP).
@@ -113,8 +115,10 @@ static void WriteEhFrameCIE(InstructionSet isa,
}
}
// fp registers.
- for (int reg = 0; reg < 8; reg++) {
- opcodes.Undefined(Reg::X86Fp(reg));
+ if (generate_opcodes_for_x86_fp) {
+ for (int reg = 0; reg < 8; reg++) {
+ opcodes.Undefined(Reg::X86Fp(reg));
+ }
}
auto return_reg = Reg::X86Core(8); // R8(EIP).
WriteEhFrameCIE(is64bit, addr_type, return_reg, opcodes, eh_frame);