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authorBen Cheng <bccheng@android.com>2010-02-04 16:15:59 -0800
committerBen Cheng <bccheng@android.com>2010-02-05 16:16:16 -0800
commit7b133ef7c84e68c3c4042176d830ea5b52e84139 (patch)
treec2a658e55e4a6140efa5781079fff65a6a829da7 /vm/compiler/codegen/arm/Assemble.c
parentdbcc7c432976ca3f71dc866b4f8125fdeecd7134 (diff)
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Enable JIT parameters to be initialized in an architecture dependent way.
The search for optimial value is still ongoing. The current settings are: v5 v7 JIT profile table 512 2048 JIT code cache 512K 1M JIT threshold 200 40
Diffstat (limited to 'vm/compiler/codegen/arm/Assemble.c')
-rw-r--r--vm/compiler/codegen/arm/Assemble.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/vm/compiler/codegen/arm/Assemble.c b/vm/compiler/codegen/arm/Assemble.c
index 826a3d24d..fd7c76b11 100644
--- a/vm/compiler/codegen/arm/Assemble.c
+++ b/vm/compiler/codegen/arm/Assemble.c
@@ -1216,7 +1216,7 @@ void dvmCompilerAssembleLIR(CompilationUnit *cUnit, JitTranslationInfo *info)
cUnit->totalSize = offset;
- if (gDvmJit.codeCacheByteUsed + cUnit->totalSize > CODE_CACHE_SIZE) {
+ if (gDvmJit.codeCacheByteUsed + cUnit->totalSize > gDvmJit.codeCacheSize) {
gDvmJit.codeCacheFull = true;
cUnit->baseAddr = NULL;
return;
@@ -1504,7 +1504,7 @@ void dvmCompilerPatchInlineCache(void)
/* Initialize the min/max address range */
minAddr = (PredictedChainingCell *)
- ((char *) gDvmJit.codeCache + CODE_CACHE_SIZE);
+ ((char *) gDvmJit.codeCache + gDvmJit.codeCacheSize);
maxAddr = (PredictedChainingCell *) gDvmJit.codeCache;
for (i = 0; i < gDvmJit.compilerICPatchIndex; i++) {