| Commit message (Expand) | Author | Age | Files | Lines |
* | intel: common: Fix non-MISRA compliant code v2 | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-27 | 3 | -76/+85 |
* | intel: mailbox: Fix non-MISRA compliant code | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-27 | 1 | -33/+46 |
* | intel: mailbox: Mailbox error recovery handling | Chee Hong Ang | 2020-10-27 | 2 | -3/+20 |
* | intel: mailbox: Enable sending large mailbox command | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-27 | 1 | -19/+91 |
* | intel: mailbox: Use retry count in mailbox poll | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-27 | 1 | -3/+8 |
* | intel: mailbox: Ensure time out duration is predictive | Chee Hong Ang | 2020-10-27 | 5 | -15/+26 |
* | intel: mailbox: Read mailbox response even there is an error | Chee Hong Ang | 2020-10-27 | 1 | -4/+19 |
* | intel: mailbox: Driver now handles larger response | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-27 | 2 | -43/+43 |
* | intel: common: Change how mailbox handles job id & buffer | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-27 | 4 | -59/+71 |
* | intel: common: Improve readability of mailbox read response | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-24 | 1 | -28/+31 |
* | intel: SIP: increase FPGA_CONFIG_SIZE to 32 MB | Richard Gong | 2020-10-24 | 1 | -1/+1 |
* | intel: common: Remove urgent from mailbox async | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-24 | 3 | -6/+3 |
* | intel: common: Improve mailbox driver readability | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-24 | 3 | -40/+42 |
* | intel: common: Clean up mailbox and sip header | Abdul Halim, Muhammad Hadi Asyrafi | 2020-10-24 | 2 | -62/+82 |
* | intel: clear 'PLAT_SEC_ENTRY' in early platform setup | Chee Hong Ang | 2020-10-24 | 3 | -4/+10 |
* | intel: platform: Include GICv2 makefile | Abdul Halim, Muhammad Hadi Asyrafi | 2020-08-19 | 2 | -8/+16 |
* | plat: intel: Additional instruction required to enable global timer | Tien Hock Loh | 2020-06-08 | 1 | -0/+4 |
* | plat: intel: Fix CCU initialization for Agilex | Tien Hock Loh | 2020-06-08 | 1 | -10/+5 |
* | plat: intel: Add FPGAINTF configuration to when configuring pinmux | Tien Hock Loh | 2020-06-08 | 2 | -0/+10 |
* | plat: intel: set DRVSEL and SMPLSEL for DWMMC | Tien Hock Loh | 2020-06-08 | 6 | -0/+31 |
* | plat: intel: Fix clock configuration bugs | Tien Hock Loh | 2020-06-08 | 1 | -34/+42 |
* | Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration | Sandrine Bailleux | 2020-02-28 | 8 | -10/+91 |
|\ |
|
| * | intel: Enable EMAC PHY in Intel FPGA platform | Tien Hock, Loh | 2020-02-25 | 8 | -10/+91 |
* | | Merge "intel: Fix argument type for mailbox driver" into integration | Sandrine Bailleux | 2020-02-28 | 4 | -15/+20 |
|\ \ |
|
| * | | intel: Fix argument type for mailbox driver | Abdul Halim, Muhammad Hadi Asyrafi | 2020-02-25 | 4 | -15/+20 |
| |/ |
|
* | | intel: Update RSU driver return code | Abdul Halim, Muhammad Hadi Asyrafi | 2020-02-27 | 2 | -4/+6 |
* | | 16550: Use generic console_t data structure | Andre Przywara | 2020-02-25 | 4 | -4/+4 |
|/ |
|
* | Merge "intel: Fix Coverity Scan Defects" into integration | Sandrine Bailleux | 2020-02-20 | 4 | -21/+21 |
|\ |
|
| * | intel: Fix Coverity Scan Defects | Abdul Halim, Muhammad Hadi Asyrafi | 2020-02-20 | 4 | -21/+21 |
* | | Merge "intel: Change boot source selection" into integration | Sandrine Bailleux | 2020-02-12 | 5 | -6/+5 |
|\ \
| |/
|/| |
|
| * | intel: Change boot source selection | Hadi Asyrafi | 2020-02-03 | 5 | -6/+5 |
* | | intel: Include address range check for SiP Mailbox | Abdul Halim, Muhammad Hadi Asyrafi | 2020-02-07 | 1 | -7/+15 |
* | | intel: Introduce SMC support for mailbox command | Hadi Asyrafi | 2020-02-05 | 2 | -0/+31 |
* | | intel: Extend SiP service to support mailbox's RSU | Hadi Asyrafi | 2020-02-05 | 6 | -8/+152 |
* | | Merge "intel: agilex: Enable uboot BL31 loading" into integration | Manish Pandey | 2020-02-04 | 1 | -8/+24 |
|\ \ |
|
| * | | intel: agilex: Enable uboot BL31 loading | Hadi Asyrafi | 2020-01-29 | 1 | -8/+24 |
| |/ |
|
* / | Enable -Wredundant-decls warning check | Madhukar Pappireddy | 2020-01-28 | 1 | -2/+1 |
|/ |
|
* | intel: Unify Platform specific defines for PSCI module | Deepika Bhavnani | 2020-01-24 | 1 | -5/+5 |
* | intel: Add function to check fpga readiness | Hadi Asyrafi | 2020-01-16 | 5 | -23/+28 |
* | intel: Add bridge control for FPGA reconfig | Hadi Asyrafi | 2020-01-16 | 3 | -0/+18 |
* | intel: FPGA config_isdone() status query | Hadi Asyrafi | 2020-01-16 | 1 | -3/+8 |
* | intel: System Manager refactoring | Hadi Asyrafi | 2020-01-16 | 16 | -410/+258 |
* | intel: Refactor reset manager driver | Hadi Asyrafi | 2020-01-16 | 15 | -507/+268 |
* | intel: Enable bridge access in Intel platform | Hadi Asyrafi | 2020-01-16 | 11 | -9/+175 |
* | intel: Modify non secure access function | Hadi Asyrafi | 2020-01-16 | 5 | -2/+31 |
* | Merge "plat: intel: Fix UEFI decompression issue" into integration | Manish Pandey | 2020-01-15 | 1 | -1/+1 |
|\ |
|
| * | plat: intel: Fix UEFI decompression issue | Tien Hock, Loh | 2020-01-15 | 1 | -1/+1 |
* | | intel: Change all global sip function to static | Hadi Asyrafi | 2020-01-15 | 1 | -5/+5 |
|/ |
|
* | Merge changes from topic "sip-svc" into integration | Manish Pandey | 2020-01-14 | 6 | -10/+200 |
|\ |
|
| * | intel: Implement platform specific system reset 2 | Hadi Asyrafi | 2019-12-30 | 5 | -0/+103 |