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* docs: marvell: Fix typo in file build.txtDing Tao2018-12-251-2/+2
| | | | | | Replace "SECURE=0" with "MARVELL_SECURE_BOOT=0". Signed-off-by: Ding Tao <miyatsu@qq.com>
* Merge pull request #1723 from soby-mathew/sm/reset_bl31_fixAntonio Niño Díaz2018-12-181-32/+35
|\ | | | | FVP: Fixes for RESET_TO_BL31
| * docs: User-guide corrections for RESET_TO_BL31Soby Mathew2018-12-171-32/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the user guide instructions for RESET_TO_SP_MIN and RESET_TO_BL31 cases. The load address for BL31 had to be updated because of increase in code size. Also, information about PIE support when RESET_TO_BL31=1 for FVP is added. In the case of RESET_TO_SP_MIN, the RVBAR address was wrong in the instruction. This is also corrected in the patch. Change-Id: I65fe6d28c5cf79bee0a11fbde320d49fcc1aacf5 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* | Merge pull request #1716 from miyatsu/marvell-doc-fix-20181210Antonio Niño Díaz2018-12-171-1/+1
|\ \ | |/ |/| docs: marvell: Fix typo in file build.txt
| * docs: marvell: Fix typo in file build.txtDing Tao2018-12-101-1/+1
| | | | | | | | | | | | Replace "Uboot" with "Ubuntu". Signed-off-by: Ding Tao <miyatsu@qq.com>
* | Merge pull request #1700 from jwerner-chromium/JW_crashfixSoby Mathew2018-12-101-43/+9
|\ \ | |/ |/| MULTI_CONSOLE_API fixes and cleanups
| * plat/common/crash_console_helpers.S: Fix MULTI_CONSOLE_API supportJulius Werner2018-12-061-43/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Crash reporting via the default consoles registered by MULTI_CONSOLE_API has been broken since commit d35cc34 (Console: Use callee-saved registers), which was introduced to allow console drivers written in C. It's not really possible with the current crash reporting framework to support console drivers in C, however we should make sure that the existing assembly drivers that do support crash reporting continue to work through the MULTI_CONSOLE_API. This patch fixes the problem by creating custom console_putc() and console_flush() implementations for the crash reporting case that do not use the stack. Platforms that want to use this feature will have to link plat/common/aarch64/crash_console_helpers.S explicitly. Also update the documentation to better reflect the new reality (of this being an option rather than the expected default for most platforms). Change-Id: Id0c761e5e2fddaf25c277bc7b8ab603946ca73cb Signed-off-by: Julius Werner <jwerner@chromium.org>
* | Merge pull request #1653 from JackyBai/masterAntonio Niño Díaz2018-12-051-0/+42
|\ \ | | | | | | Add NXP i.MX8MQ basic support
| * | plat: imx: Add i.MX8MQ basic supportBai Ping2018-12-051-0/+42
| |/ | | | | | | | | | | | | | | | | | | | | | | | | i.MX8MQ is new SOC of NXP's i.MX8M family based on A53. It can provide industry-leading audio, voice and video processing for applications that scale from consumer home audio to industrial building automation and mobile computers this patchset add the basic supoort to boot up the 4 X A53. more feature will be added later. Signed-off-by: Bai Ping <ping.bai@nxp.com>
* / doc: marvell: Update build manual with new memory layoutsKonstantin Porotchkin2018-12-041-1/+3
|/ | | | | | | | | | Add description for memory layouts used by EspressoBin v7 (DDR4) Change-Id: I199d8b52580b26e560f14b503a6e99d32de4f284 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/61279 Reviewed-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
* docs: Add RAS framework documentationJeenu Viswambharan2018-11-264-2/+263
| | | | | Change-Id: Ibf2b21b12ebc0af5815fc6643532a3be9100bf02 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
* docs: Add Exception Handling Framework documentationJeenu Viswambharan2018-11-265-1/+649
| | | | | Change-Id: I77d38758d18ba6dda1652b1b1e644fbfb14386cc Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
* rpi3: fix bad formatting in rpi3.rstPete Batard2018-11-201-4/+3
| | | | | d4fd0219 (pull request #1685) introduced unwanted formatting such as bold/italic in the description for RPI3_USE_UEFI_MAP.
* rpi3: add RPI3_USE_UEFI_MAP build optionPete Batard2018-11-191-0/+35
| | | | | | | | | | | | | | The default Raspberry Pi 3 memory mapping for ATF is geared towards the use of uboot + Linux. This creates issues when trying to use ATF with an UEFI payload and Windows on ARM64. We therefore introduce new build option RPI3_USE_UEFI_MAP, that enables the build process to use an alternate memory mapping that is compatible with UEFI + Windows (as well as UEFI + Linux). Fixes ARM-software/tf-issues#649 Signed-off-by: Pete Batard <pete@akeo.ie>
* Merge pull request #1680 from pbatard/rpi3-runtime-uartAntonio Niño Díaz2018-11-151-0/+4
|\ | | | | rpi3: add RPI3_RUNTIME_UART build option
| * rpi3: add RPI3_RUNTIME_UART build optionPete Batard2018-11-131-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some OSes (e.g. Ubuntu 18.04 LTS on Raspberry Pi 3) may disable the runtime UART in a manner that prevents the system from rebooting if ATF tries to send runtime messages there. Also, we don't want the firmware to share the UART with normal world, as this can be a DoS attack vector into the secure world. This patch fixes these 2 issues by introducing new build option RPI3_RUNTIME_UART, that disables the runtime UART by default. Fixes ARM-software/tf-issues#647 Signed-off-by: Pete Batard <pete@akeo.ie>
* | SPM: EHF: Build EHF module along with Secure Partition ManagerSughosh Ganu2018-11-141-2/+3
|/ | | | | | | | | | | | Add a dependency for building EL3 exception handling framework(EHF) module with the secure partition manager(SPM). The EHF module is needed for raising the core's running priority before the core enters the secure partition, and lowering it subsequently on exit from the secure partition. Change-Id: Icbe2d0a63f00b46dc593ff3d86b676c9333506c3 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
* Merge pull request #1605 from sivadur/integrationAntonio Niño Díaz2018-11-121-0/+33
|\ | | | | Add support new Xilinx Versal ACAP platform
| * arm64: versal: Add support for new Xilinx Versal ACAPsSiva Durga Prasad Paladugu2018-11-091-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. This patch adds Virtual QEMU platform support for this SoC "versal_virt". Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | plat/arm: Support direct Linux kernel boot in AArch32Manish Pandey2018-11-051-5/+6
|/ | | | | | | | | | | | This option allows the Trusted Firmware to directly jump to Linux kernel for aarch32 without the need of an intermediate loader such as U-Boot. Similar to AArch64 ARM_LINUX_KERNEL_AS_BL33 only available with RESET_TO_SP_MIN=1 as well as BL33 and DTB are preloaded in memory. Change-Id: I908bc1633696be1caad0ce2f099c34215c8e0633 Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
* Merge pull request #1623 from MISL-EBU-System-SW/a3700-supportAntonio Niño Díaz2018-11-011-0/+52
|\ | | | | Add support for Armada 3700 and COMPHY porting layer
| * mvebu: cp110: introduce COMPHY porting layerGrzegorz Jaszczyk2018-10-181-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of COMPHY parameters depends on the hw connection between the SoC and the PHY, which can vary on different boards e.g. due to different wires length. Define the "porting layer" with some defaults parameters. It ease updating static values which needs to be updated due to board differences, which are now grouped in one place. Example porting layer for a8k-db is under: plat/marvell/a8k/a80x0/board/phy-porting-layer.h If for some boards parameters are not defined (missing phy-porting-layer.h), the default values are used (drivers/marvell/comphy/phy-default-porting-layer.h) and the following compilation warning is show: "Using default comphy params - you may need to suit them to your board". The common COMPHY driver code is extracted in order to be shared with future COMPHY driver for A3700 SoC platforms Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* | Merge pull request #1649 from Yann-lms/stm32mp1_doc_updateAntonio Niño Díaz2018-10-301-0/+16
|\ \ | | | | | | docs: stm32mp1: complete compilation and flashing steps
| * | docs: stm32mp1: complete compilation and flashing stepsYann Gautier2018-10-241-0/+16
| |/ | | | | | | | | | | | | Add U-Boot compilation information. Add a chapter about how to populate SD-card. Signed-off-by: Yann Gautier <yann.gautier@st.com>
* | Merge pull request #1644 from soby-mathew/sm/pie_protoSoby Mathew2018-10-291-0/+4
|\ \ | | | | | | Position Indepedent Executable (PIE) Support
| * | Basic Makefile changes for PIESoby Mathew2018-10-291-0/+4
| | | | | | | | | | | | | | | Change-Id: I0b8ccba15024c55bb03927cdb50370913eb8010c Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* | | docs: gxbb: Add documentationAntonio Nino Diaz2018-10-261-0/+26
|/ / | | | | | | | | Change-Id: Ie2465c1ccc482bd8eb5e5a71c580543095e4ba94 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | Add sample crash console functionsAntonio Nino Diaz2018-10-251-17/+27
| | | | | | | | | | | | | | | | Platforms that wish to use the sample functions have to add the file to their Makefile. It is not included by default. Change-Id: I713617bb58dc218967199248f68da86241d7ec40 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | rpi3: Add mem reserve region to DTB if presentAntonio Nino Diaz2018-10-241-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a device tree blob is present at a known address, instead of, for example, relying on the user modifying the Linux command line to warn about the memory reserved for the Trusted Firmware, pass it on the DTB. The current code deletes the memory reserved for the default bootstrap of the Raspberry Pi and adds the region used by the Trusted Firmware. This system replaces the previous one consisting on adding ``memmap=16M$256M`` to the Linux command line. It's also meant to be used by U-Boot and any other bootloader that understands DTB files. Change-Id: I13ee528475fb043d6e8d9e9f24228e37ac3ac436 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | Merge pull request #1641 from jeenu-arm/ptrauthAntonio Niño Díaz2018-10-241-0/+6
|\ \ | |/ |/| AArch64: Enable lower ELs to use pointer authentication
| * AArch64: Enable lower ELs to use pointer authenticationJeenu Viswambharan2018-10-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pointer authentication is an Armv8.3 feature that introduces instructions that can be used to authenticate and verify pointers. Pointer authentication instructions are allowed to be accessed from all ELs but only when EL3 explicitly allows for it; otherwise, their usage will trap to EL3. Since EL3 doesn't have trap handling in place, this patch unconditionally disables all related traps to EL3 to avoid potential misconfiguration leading to an unhandled EL3 exception. Fixes ARM-software/tf-issues#629 Change-Id: I9bd2efe0dc714196f503713b721ffbf05672c14d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
* | rcar-gen3: initial commit for the rcar-gen3 boardsJorge Ramirez-Ortiz2018-10-171-0/+269
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reference code: ============== rar_gen3: IPL and Secure Monitor Rev1.0.22 https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3] Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com> Date: Thu Aug 30 21:26:41 2018 +0900 Update IPL and Secure Monitor Rev1.0.22 General Information: =================== This port has been tested on the Salvator-X Soc_id r8a7795 revision ES1.1 (uses an SPD). Build Tested: ------------- ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1" MBEDTLS_DIR=$mbedtls $ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed Other dependencies: ------------------ * mbed_tls: git@github.com:ARMmbed/mbedtls.git [devel] Merge: 68dbc94 f34a4c1 Author: Simon Butcher <simon.butcher@arm.com> Date: Thu Aug 30 00:57:28 2018 +0100 * optee_os: https://github.com/BayLibre/optee_os Until it gets merged into OP-TEE, the port requires Renesas' Trusted Environment with a modification to support power management. Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com> Date: Thu Aug 30 16:49:49 2018 +0200 plat-rcar: cpu-suspend: handle the power level Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com> * u-boot: The port has beent tested using mainline uboot. Author: Fabio Estevam <festevam@gmail.com> Date: Tue Sep 4 10:23:12 2018 -0300 *linux: The port has beent tested using mainline kernel. Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Sep 16 11:52:37 2018 -0700 Linux 4.19-rc4 Overview --------- BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered at this exception level (the Renesas' ATF reference tree [1] resets into EL1 before entering BL2 - see its bl2.ld.S) BL2 initializes DDR (and i2c to talk to the PMIC on some platforms) before determining the boot reason (cold or warm). During suspend all CPUs are switched off and the DDR is put in backup mode (some kind of self-refresh mode). This means that BL2 is always entered in a cold boot scenario. Once BL2 boots, it determines the boot reason, writes it to shared memory (BOOT_KIND_BASE) together with the BL31 parameters (PARAMS_BASE) and jumps to BL31. To all effects, BL31 is as if it is being entered in reset mode since it still needs to initialize the rest of the cores; this is the reason behind using direct shared memory access to BOOT_KIND_BASE and PARAMS_BASE instead of using registers to get to those locations (see el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use case). Depending on the boot reason BL31 initializes the rest of the cores: in case of suspend, it uses a MBOX memory region to recover the program counters. [1] https://github.com/renesas-rcar/arm-trusted-firmware Tests ----- * cpuidle ------- enable kernel's cpuidle arm_idle driver and boot * system suspend -------------- $ cat suspend.sh #!/bin/bash i2cset -f -y 7 0x30 0x20 0x0F read -p "Switch off SW23 and press return " foo echo mem > /sys/power/state * cpu hotplug: ------------ $ cat offline.sh #!/bin/bash nbr=$1 echo 0 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline $ cat online.sh #!/bin/bash nbr=$1 echo 1 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline Signed-off-by: ldts <jramirez@baylibre.com>
* Fix typos in changelogJohn Tsichritzis2018-10-101-6/+8
| | | | | Change-Id: Icc6fb03abb9b4ef85931b9e3d767b5a9c271b5f3 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
* docs: Clarify usage of LOG_LEVELJohn Tsichritzis2018-10-101-2/+2
| | | | | Change-Id: I1ce771a155e6e83885a00d2f05591bf98cd69854 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
* Merge pull request #1609 from MISL-EBU-System-SW/integration-bleSoby Mathew2018-10-041-9/+4
|\ | | | | plat/marvell: Move BLE into the platform tree, minor fix in tools.
| * marvell: Move BLE from external repo to the platform folderKonstantin Porotchkin2018-10-031-9/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The BLE is the pre-TF-A boot stage required by Marvell Armada BootROM for bringing up DRAM and allow the boot image copy to it. Since this is not a standard boot level and only uses the TF-A as a build environment, it was introduced out of source tree. However it turns out that such remote location introduces additional complexity to the upstream TF-A build process. In order to simplify the build environment the BLE source folder is relocated from the external repository to A8K platform directory. The build documentation is updated accordingly. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* | Introduce RECLAIM_INIT_CODE build flagDaniel Boulby2018-10-031-0/+23
|/ | | | | | | | | | This patch introduces a build flag "RECLAIM_INIT_CODE" to mark boot time code which allows platforms to place this memory in an appropriate section to be reclaimed later. This features is primarily targeted for BL31. Appropriate documentation updates are also done. Change-Id: If0ca062851614805d769c332c771083d46599194 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
* Merge pull request #1597 from antonio-nino-diaz-arm/an/optimiseSoby Mathew2018-10-031-8/+0
|\ | | | | plat/arm: Remove option ARM_BOARD_OPTIMISE_MEM
| * plat/arm: Remove option ARM_BOARD_OPTIMISE_MEMAntonio Nino Diaz2018-10-021-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option makes it hard to optimize the memory definitions of all Arm platforms because any change in the common defines must work in all of them. The best thing to do is to remove it and move the definition to each platform's header. FVP, SGI and SGM were using the definitions in board_arm_def.h. The definitions have been copied to each platform's platform_def.h. Juno was already using the ones in platform_def.h, so there have been no changes. Change-Id: I9aecd11bbc72a3d0d7aad1ef9934d8df21dcfaf2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | docs: Fixup filename and links to compatibility policySoby Mathew2018-10-022-2/+2
|/ | | | | Change-Id: I9d14faa7294578443233b84d5459fa7b62a30c07 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* Merge pull request #1601 from joannafarley-arm/jf/release-2.0-changelogSoby Mathew2018-10-021-1/+40
|\ | | | | Release docs updates for v2.0 release
| * Release docs updates for v2.0 releaseJoanna Farley2018-10-021-1/+40
| | | | | | | | | | Change-Id: Iaa5c586b65f0abdd4ddbdee4c73d07811a0aff49 Signed-off-by: Joanna Farley <joanna.farley@arm.com>
* | Merge pull request #1600 from soby-mathew/sm/compat_policy_docSoby Mathew2018-10-022-0/+49
|\ \ | | | | | | docs: Add platform compatibility policy document
| * | docs: Add platform compatibility policy documentSoby Mathew2018-10-022-0/+49
| |/ | | | | | | | | | | | | | | Information regarding platform compatibility policy is added to the documentation. Change-Id: If9f2a11160f81354ee2c678f0fca9d67fc7366e6 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* | Merge pull request #1598 from soby-mathew/sm/docs_update_deprecate_1Soby Mathew2018-10-023-386/+50
|\ \ | | | | | | docs: update for removal of deprecated interfaces.
| * | docs: update for removal of deprecated interfaces.Soby Mathew2018-10-013-386/+50
| |/ | | | | | | | | Change-Id: I69e2720f534583a0f8d0e44f2e7b6f393f6fd093 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* | zynqmp: Migrate to new interfacesAntonio Nino Diaz2018-09-281-2/+2
| | | | | | | | | | | | | | | | | | - Remove references to removed build options. - Migrate to bl31_early_platform_setup2(). Change-Id: Ibeb8982a0a841f55ce778c4f09f06b72b47b21d8 Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | xlat: Remove deprecated interfacesAntonio Nino Diaz2018-09-281-7/+0
| | | | | | | | | | Change-Id: I83de2ae3e0795e6fec3c1e5b37c441b64b0c9cb6 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | gic: Remove deprecated driver and interfacesAntonio Nino Diaz2018-09-282-45/+12
| | | | | | | | | | | | Change-Id: I567a406edb090ae9d109382f6874846a79dd7473 Co-authored-by: Roberto Vargas <roberto.vargas@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | tbbr: Use USE_TBBR_DEFS=1 by defaultAntonio Nino Diaz2018-09-281-3/+3
| | | | | | | | | | Change-Id: I2885b0d8cb9bb16da1fa96a30e46cccde434dc42 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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