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authorAntonio Nino Diaz <antonio.ninodiaz@arm.com>2018-09-24 17:23:24 +0100
committerAntonio Nino Diaz <antonio.ninodiaz@arm.com>2018-09-28 15:31:53 +0100
commitf9ed3cb62428d54cb941ad4673d24914c8456801 (patch)
treea7d59691a3c0c1e3f690c9e8061ef0358f44a226 /docs
parente23e057e772150124cbc533452ecf2e589da206c (diff)
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gic: Remove deprecated driver and interfaces
Change-Id: I567a406edb090ae9d109382f6874846a79dd7473 Co-authored-by: Roberto Vargas <roberto.vargas@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'docs')
-rw-r--r--docs/firmware-design.rst49
-rw-r--r--docs/user-guide.rst8
2 files changed, 12 insertions, 45 deletions
diff --git a/docs/firmware-design.rst b/docs/firmware-design.rst
index 9ad8f11f7..658b509ec 100644
--- a/docs/firmware-design.rst
+++ b/docs/firmware-design.rst
@@ -1274,47 +1274,22 @@ interrupts on the platform. To this end, the platform is expected to provide the
GIC driver (either GICv2 or GICv3, as selected by the platform) with the
interrupt configuration during the driver initialisation.
-There are two ways to specify secure interrupt configuration:
+Secure interrupt configuration are specified in an array of secure interrupt
+properties. In this scheme, in both GICv2 and GICv3 driver data structures, the
+``interrupt_props`` member points to an array of interrupt properties. Each
+element of the array specifies the interrupt number and its configuration, viz.
+priority, group, configuration. Each element of the array shall be populated by
+the macro ``INTR_PROP_DESC()``. The macro takes the following arguments:
-#. Array of secure interrupt properties: In this scheme, in both GICv2 and GICv3
- driver data structures, the ``interrupt_props`` member points to an array of
- interrupt properties. Each element of the array specifies the interrupt
- number and its configuration, viz. priority, group, configuration. Each
- element of the array shall be populated by the macro ``INTR_PROP_DESC()``.
- The macro takes the following arguments:
+- 10-bit interrupt number,
- - 10-bit interrupt number,
+- 8-bit interrupt priority,
- - 8-bit interrupt priority,
+- Interrupt type (one of ``INTR_TYPE_EL3``, ``INTR_TYPE_S_EL1``,
+ ``INTR_TYPE_NS``),
- - Interrupt type (one of ``INTR_TYPE_EL3``, ``INTR_TYPE_S_EL1``,
- ``INTR_TYPE_NS``),
-
- - Interrupt configuration (either ``GIC_INTR_CFG_LEVEL`` or
- ``GIC_INTR_CFG_EDGE``).
-
-#. Array of secure interrupts: In this scheme, the GIC driver is provided an
- array of secure interrupt numbers. The GIC driver, at the time of
- initialisation, iterates through the array and assigns each interrupt
- the appropriate group.
-
- - For the GICv2 driver, in ``gicv2_driver_data`` structure, the
- ``g0_interrupt_array`` member of the should point to the array of
- interrupts to be assigned to *Group 0*, and the ``g0_interrupt_num``
- member of the should be set to the number of interrupts in the array.
-
- - For the GICv3 driver, in ``gicv3_driver_data`` structure:
-
- - The ``g0_interrupt_array`` member of the should point to the array of
- interrupts to be assigned to *Group 0*, and the ``g0_interrupt_num``
- member of the should be set to the number of interrupts in the array.
-
- - The ``g1s_interrupt_array`` member of the should point to the array of
- interrupts to be assigned to *Group 1 Secure*, and the
- ``g1s_interrupt_num`` member of the should be set to the number of
- interrupts in the array.
-
- **Note that this scheme is deprecated.**
+- Interrupt configuration (either ``GIC_INTR_CFG_LEVEL`` or
+ ``GIC_INTR_CFG_EDGE``).
CPU specific operations framework
---------------------------------
diff --git a/docs/user-guide.rst b/docs/user-guide.rst
index 4c2b49223..ba368b1f1 100644
--- a/docs/user-guide.rst
+++ b/docs/user-guide.rst
@@ -234,11 +234,6 @@ Common build options
compiling TF-A. Its value must be a numeric, and defaults to 0. See also,
*Armv8 Architecture Extensions* in `Firmware Design`_.
-- ``ARM_GIC_ARCH``: Choice of Arm GIC architecture version used by the Arm
- Legacy GIC driver for implementing the platform GIC API. This API is used
- by the interrupt management framework. Default is 2 (that is, version 2.0).
- This build option is deprecated.
-
- ``ARM_PLAT_MT``: This flag determines whether the Arm platform layer has to
cater for the multi-threading ``MT`` bit when accessing MPIDR. When this flag
is set, the functions which deal with MPIDR assume that the ``MT`` bit in
@@ -838,9 +833,6 @@ Arm FVP platform specific build options
- ``FVP_GIC600`` : The GIC600 implementation of GICv3 is selected
- ``FVP_GICV2`` : The GICv2 only driver is selected
- ``FVP_GICV3`` : The GICv3 only driver is selected (default option)
- - ``FVP_GICV3_LEGACY``: The Legacy GICv3 driver is selected (deprecated)
- Note: If TF-A is compiled with this option on FVPs with GICv3 hardware,
- then it configures the hardware to run in GICv2 emulation mode
- ``FVP_USE_SP804_TIMER`` : Use the SP804 timer instead of the Generic Timer
for functions that wait for an arbitrary time length (udelay and mdelay).