diff options
Diffstat (limited to 'plat/mediatek/mt8183/drivers')
| -rw-r--r-- | plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c | 10 | ||||
| -rw-r--r-- | plat/mediatek/mt8183/drivers/timer/mt_timer.c | 29 | ||||
| -rw-r--r-- | plat/mediatek/mt8183/drivers/timer/mt_timer.h | 20 | ||||
| -rw-r--r-- | plat/mediatek/mt8183/drivers/uart/uart.c | 111 | ||||
| -rw-r--r-- | plat/mediatek/mt8183/drivers/uart/uart.h | 2 |
5 files changed, 52 insertions, 120 deletions
diff --git a/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c b/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c index 64d854885..56d2ce26c 100644 --- a/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c +++ b/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c @@ -138,15 +138,9 @@ void emi_mpu_init(void) (FORBIDDEN << 6)); emi_mpu_set_region_protection(0x52900000UL, 0x5FFFFFFFUL, 2, (FORBIDDEN << 3 | FORBIDDEN << 6)); - emi_mpu_set_region_protection(0x60000000UL, 0x7FFFFFFFUL, 3, + emi_mpu_set_region_protection(0x60000000UL, 0xFFFFFFFFUL, 3, (FORBIDDEN << 3 | FORBIDDEN << 6)); - emi_mpu_set_region_protection(0x80000000UL, 0x9FFFFFFFUL, 4, - (FORBIDDEN << 3 | FORBIDDEN << 6)); - emi_mpu_set_region_protection(0xA0000000UL, 0xBFFFFFFFUL, 5, - (FORBIDDEN << 3 | FORBIDDEN << 6)); - emi_mpu_set_region_protection(0xC0000000UL, 0xDFFFFFFFUL, 6, - (FORBIDDEN << 3 | FORBIDDEN << 6)); - emi_mpu_set_region_protection(0xE0000000UL, 0xFFFFFFFFUL, 7, + emi_mpu_set_region_protection(0x100000000UL, 0x23FFFFFFFUL, 4, (FORBIDDEN << 3 | FORBIDDEN << 6)); dump_emi_mpu_regions(); } diff --git a/plat/mediatek/mt8183/drivers/timer/mt_timer.c b/plat/mediatek/mt8183/drivers/timer/mt_timer.c new file mode 100644 index 000000000..0da4815b1 --- /dev/null +++ b/plat/mediatek/mt8183/drivers/timer/mt_timer.c @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2020, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#include <arch_helpers.h> +#include <common/debug.h> +#include <lib/mmio.h> +#include <mcucfg.h> +#include <mt_timer.h> +#include <platform_def.h> + +static void enable_systimer_compensation(void) +{ + unsigned int reg; + + reg = mmio_read_32(CNTCR_REG); + reg &= ~COMP_15_EN; + reg |= COMP_20_EN; + mmio_write_32(CNTCR_REG, reg); + + NOTICE("[systimer] CNTCR_REG(0x%x)\n", mmio_read_32(CNTCR_REG)); +} + +void mt_systimer_init(void) +{ + /* systimer is default on, so we only enable systimer compensation */ + enable_systimer_compensation(); +} diff --git a/plat/mediatek/mt8183/drivers/timer/mt_timer.h b/plat/mediatek/mt8183/drivers/timer/mt_timer.h new file mode 100644 index 000000000..0b8edc517 --- /dev/null +++ b/plat/mediatek/mt8183/drivers/timer/mt_timer.h @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2020, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef MT_TIMER_H +#define MT_TIMER_H + + +#define SYSTIMER_BASE (0x10017000) +#define CNTCR_REG (SYSTIMER_BASE + 0x0) +#define CNTSR_REG (SYSTIMER_BASE + 0x4) + +#define COMP_15_EN (1 << 10) +#define COMP_20_EN (1 << 11) + +void mt_systimer_init(void); + +#endif /* MT_TIMER_H */ diff --git a/plat/mediatek/mt8183/drivers/uart/uart.c b/plat/mediatek/mt8183/drivers/uart/uart.c deleted file mode 100644 index 3c6a98036..000000000 --- a/plat/mediatek/mt8183/drivers/uart/uart.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include <lib/mmio.h> -#include <uart.h> - -static struct mt_uart uart_save_addr[DRV_SUPPORT_UART_PORTS]; - -static const unsigned int uart_base_addr[DRV_SUPPORT_UART_PORTS] = { - UART0_BASE, - UART1_BASE -}; - -void mt_uart_restore(void) -{ - int uart_idx = UART_PORT0; - struct mt_uart *uart; - unsigned long base; - - /* Must NOT print any debug log before UART restore */ - for (uart_idx = UART_PORT0; uart_idx < HW_SUPPORT_UART_PORTS; - uart_idx++) { - - uart = &uart_save_addr[uart_idx]; - base = uart->base; - - mmio_write_32(UART_LCR(base), UART_LCR_MODE_B); - mmio_write_32(UART_EFR(base), uart->registers.efr); - mmio_write_32(UART_LCR(base), uart->registers.lcr); - mmio_write_32(UART_FCR(base), uart->registers.fcr); - - /* baudrate */ - mmio_write_32(UART_HIGHSPEED(base), uart->registers.highspeed); - mmio_write_32(UART_FRACDIV_L(base), uart->registers.fracdiv_l); - mmio_write_32(UART_FRACDIV_M(base), uart->registers.fracdiv_m); - mmio_write_32(UART_LCR(base), - uart->registers.lcr | UART_LCR_DLAB); - mmio_write_32(UART_DLL(base), uart->registers.dll); - mmio_write_32(UART_DLH(base), uart->registers.dlh); - mmio_write_32(UART_LCR(base), uart->registers.lcr); - mmio_write_32(UART_SAMPLE_COUNT(base), - uart->registers.sample_count); - mmio_write_32(UART_SAMPLE_POINT(base), - uart->registers.sample_point); - mmio_write_32(UART_GUARD(base), uart->registers.guard); - - /* flow control */ - mmio_write_32(UART_ESCAPE_EN(base), uart->registers.escape_en); - mmio_write_32(UART_MCR(base), uart->registers.mcr); - mmio_write_32(UART_IER(base), uart->registers.ier); - mmio_write_32(UART_SCR(base), uart->registers.scr); - } -} - -void mt_uart_save(void) -{ - int uart_idx = UART_PORT0; - struct mt_uart *uart; - unsigned long base; - - for (uart_idx = UART_PORT0; uart_idx < HW_SUPPORT_UART_PORTS; - uart_idx++) { - - uart_save_addr[uart_idx].base = uart_base_addr[uart_idx]; - base = uart_base_addr[uart_idx]; - uart = &uart_save_addr[uart_idx]; - uart->registers.lcr = mmio_read_32(UART_LCR(base)); - - mmio_write_32(UART_LCR(base), UART_LCR_MODE_B); - uart->registers.efr = mmio_read_32(UART_EFR(base)); - mmio_write_32(UART_LCR(base), uart->registers.lcr); - uart->registers.fcr = mmio_read_32(UART_FCR_RD(base)); - - /* baudrate */ - uart->registers.highspeed = mmio_read_32(UART_HIGHSPEED(base)); - uart->registers.fracdiv_l = mmio_read_32(UART_FRACDIV_L(base)); - uart->registers.fracdiv_m = mmio_read_32(UART_FRACDIV_M(base)); - mmio_write_32(UART_LCR(base), - uart->registers.lcr | UART_LCR_DLAB); - uart->registers.dll = mmio_read_32(UART_DLL(base)); - uart->registers.dlh = mmio_read_32(UART_DLH(base)); - mmio_write_32(UART_LCR(base), uart->registers.lcr); - uart->registers.sample_count = mmio_read_32( - UART_SAMPLE_COUNT(base)); - uart->registers.sample_point = mmio_read_32( - UART_SAMPLE_POINT(base)); - uart->registers.guard = mmio_read_32(UART_GUARD(base)); - - /* flow control */ - uart->registers.escape_en = mmio_read_32(UART_ESCAPE_EN(base)); - uart->registers.mcr = mmio_read_32(UART_MCR(base)); - uart->registers.ier = mmio_read_32(UART_IER(base)); - uart->registers.scr = mmio_read_32(UART_SCR(base)); - } -} - -void mt_console_uart_cg(int on) -{ - if (on) - mmio_write_32(UART_CLOCK_GATE_CLR, UART0_CLOCK_GATE_BIT); - else - mmio_write_32(UART_CLOCK_GATE_SET, UART0_CLOCK_GATE_BIT); -} - -int mt_console_uart_cg_status(void) -{ - return mmio_read_32(UART_CLOCK_GATE_STA) & UART0_CLOCK_GATE_BIT; -} diff --git a/plat/mediatek/mt8183/drivers/uart/uart.h b/plat/mediatek/mt8183/drivers/uart/uart.h index be04c3509..062ce3adc 100644 --- a/plat/mediatek/mt8183/drivers/uart/uart.h +++ b/plat/mediatek/mt8183/drivers/uart/uart.h @@ -95,6 +95,6 @@ struct mt_uart { void mt_uart_save(void); void mt_uart_restore(void); void mt_console_uart_cg(int on); -int mt_console_uart_cg_status(void); +uint32_t mt_console_uart_cg_status(void); #endif /* __UART_H__ */ |