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-rw-r--r--plat/mediatek/mt8183/bl31_plat_setup.c5
-rw-r--r--plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c10
-rw-r--r--plat/mediatek/mt8183/drivers/timer/mt_timer.c29
-rw-r--r--plat/mediatek/mt8183/drivers/timer/mt_timer.h20
-rw-r--r--plat/mediatek/mt8183/drivers/uart/uart.c111
-rw-r--r--plat/mediatek/mt8183/drivers/uart/uart.h2
-rw-r--r--plat/mediatek/mt8183/include/platform_def.h2
-rw-r--r--plat/mediatek/mt8183/platform.mk13
8 files changed, 65 insertions, 127 deletions
diff --git a/plat/mediatek/mt8183/bl31_plat_setup.c b/plat/mediatek/mt8183/bl31_plat_setup.c
index 8204d7717..7dac8a49b 100644
--- a/plat/mediatek/mt8183/bl31_plat_setup.c
+++ b/plat/mediatek/mt8183/bl31_plat_setup.c
@@ -16,6 +16,7 @@
#include <drivers/generic_delay_timer.h>
#include <mcucfg.h>
#include <mt_gic_v3.h>
+#include <mt_timer.h>
#include <lib/coreboot.h>
#include <lib/mmio.h>
#include <mtk_mcdi.h>
@@ -112,7 +113,7 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
- static console_16550_t console;
+ static console_t console;
params_early_setup(arg1);
@@ -148,6 +149,8 @@ void bl31_platform_setup(void)
mt_gic_driver_init();
mt_gic_init();
+ mt_systimer_init();
+
/* Init mcsi SF */
plat_mtk_cci_init_sf();
diff --git a/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c b/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c
index 64d854885..56d2ce26c 100644
--- a/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c
+++ b/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c
@@ -138,15 +138,9 @@ void emi_mpu_init(void)
(FORBIDDEN << 6));
emi_mpu_set_region_protection(0x52900000UL, 0x5FFFFFFFUL, 2,
(FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0x60000000UL, 0x7FFFFFFFUL, 3,
+ emi_mpu_set_region_protection(0x60000000UL, 0xFFFFFFFFUL, 3,
(FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0x80000000UL, 0x9FFFFFFFUL, 4,
- (FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0xA0000000UL, 0xBFFFFFFFUL, 5,
- (FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0xC0000000UL, 0xDFFFFFFFUL, 6,
- (FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0xE0000000UL, 0xFFFFFFFFUL, 7,
+ emi_mpu_set_region_protection(0x100000000UL, 0x23FFFFFFFUL, 4,
(FORBIDDEN << 3 | FORBIDDEN << 6));
dump_emi_mpu_regions();
}
diff --git a/plat/mediatek/mt8183/drivers/timer/mt_timer.c b/plat/mediatek/mt8183/drivers/timer/mt_timer.c
new file mode 100644
index 000000000..0da4815b1
--- /dev/null
+++ b/plat/mediatek/mt8183/drivers/timer/mt_timer.c
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2020, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#include <arch_helpers.h>
+#include <common/debug.h>
+#include <lib/mmio.h>
+#include <mcucfg.h>
+#include <mt_timer.h>
+#include <platform_def.h>
+
+static void enable_systimer_compensation(void)
+{
+ unsigned int reg;
+
+ reg = mmio_read_32(CNTCR_REG);
+ reg &= ~COMP_15_EN;
+ reg |= COMP_20_EN;
+ mmio_write_32(CNTCR_REG, reg);
+
+ NOTICE("[systimer] CNTCR_REG(0x%x)\n", mmio_read_32(CNTCR_REG));
+}
+
+void mt_systimer_init(void)
+{
+ /* systimer is default on, so we only enable systimer compensation */
+ enable_systimer_compensation();
+}
diff --git a/plat/mediatek/mt8183/drivers/timer/mt_timer.h b/plat/mediatek/mt8183/drivers/timer/mt_timer.h
new file mode 100644
index 000000000..0b8edc517
--- /dev/null
+++ b/plat/mediatek/mt8183/drivers/timer/mt_timer.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2020, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MT_TIMER_H
+#define MT_TIMER_H
+
+
+#define SYSTIMER_BASE (0x10017000)
+#define CNTCR_REG (SYSTIMER_BASE + 0x0)
+#define CNTSR_REG (SYSTIMER_BASE + 0x4)
+
+#define COMP_15_EN (1 << 10)
+#define COMP_20_EN (1 << 11)
+
+void mt_systimer_init(void);
+
+#endif /* MT_TIMER_H */
diff --git a/plat/mediatek/mt8183/drivers/uart/uart.c b/plat/mediatek/mt8183/drivers/uart/uart.c
deleted file mode 100644
index 3c6a98036..000000000
--- a/plat/mediatek/mt8183/drivers/uart/uart.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <lib/mmio.h>
-#include <uart.h>
-
-static struct mt_uart uart_save_addr[DRV_SUPPORT_UART_PORTS];
-
-static const unsigned int uart_base_addr[DRV_SUPPORT_UART_PORTS] = {
- UART0_BASE,
- UART1_BASE
-};
-
-void mt_uart_restore(void)
-{
- int uart_idx = UART_PORT0;
- struct mt_uart *uart;
- unsigned long base;
-
- /* Must NOT print any debug log before UART restore */
- for (uart_idx = UART_PORT0; uart_idx < HW_SUPPORT_UART_PORTS;
- uart_idx++) {
-
- uart = &uart_save_addr[uart_idx];
- base = uart->base;
-
- mmio_write_32(UART_LCR(base), UART_LCR_MODE_B);
- mmio_write_32(UART_EFR(base), uart->registers.efr);
- mmio_write_32(UART_LCR(base), uart->registers.lcr);
- mmio_write_32(UART_FCR(base), uart->registers.fcr);
-
- /* baudrate */
- mmio_write_32(UART_HIGHSPEED(base), uart->registers.highspeed);
- mmio_write_32(UART_FRACDIV_L(base), uart->registers.fracdiv_l);
- mmio_write_32(UART_FRACDIV_M(base), uart->registers.fracdiv_m);
- mmio_write_32(UART_LCR(base),
- uart->registers.lcr | UART_LCR_DLAB);
- mmio_write_32(UART_DLL(base), uart->registers.dll);
- mmio_write_32(UART_DLH(base), uart->registers.dlh);
- mmio_write_32(UART_LCR(base), uart->registers.lcr);
- mmio_write_32(UART_SAMPLE_COUNT(base),
- uart->registers.sample_count);
- mmio_write_32(UART_SAMPLE_POINT(base),
- uart->registers.sample_point);
- mmio_write_32(UART_GUARD(base), uart->registers.guard);
-
- /* flow control */
- mmio_write_32(UART_ESCAPE_EN(base), uart->registers.escape_en);
- mmio_write_32(UART_MCR(base), uart->registers.mcr);
- mmio_write_32(UART_IER(base), uart->registers.ier);
- mmio_write_32(UART_SCR(base), uart->registers.scr);
- }
-}
-
-void mt_uart_save(void)
-{
- int uart_idx = UART_PORT0;
- struct mt_uart *uart;
- unsigned long base;
-
- for (uart_idx = UART_PORT0; uart_idx < HW_SUPPORT_UART_PORTS;
- uart_idx++) {
-
- uart_save_addr[uart_idx].base = uart_base_addr[uart_idx];
- base = uart_base_addr[uart_idx];
- uart = &uart_save_addr[uart_idx];
- uart->registers.lcr = mmio_read_32(UART_LCR(base));
-
- mmio_write_32(UART_LCR(base), UART_LCR_MODE_B);
- uart->registers.efr = mmio_read_32(UART_EFR(base));
- mmio_write_32(UART_LCR(base), uart->registers.lcr);
- uart->registers.fcr = mmio_read_32(UART_FCR_RD(base));
-
- /* baudrate */
- uart->registers.highspeed = mmio_read_32(UART_HIGHSPEED(base));
- uart->registers.fracdiv_l = mmio_read_32(UART_FRACDIV_L(base));
- uart->registers.fracdiv_m = mmio_read_32(UART_FRACDIV_M(base));
- mmio_write_32(UART_LCR(base),
- uart->registers.lcr | UART_LCR_DLAB);
- uart->registers.dll = mmio_read_32(UART_DLL(base));
- uart->registers.dlh = mmio_read_32(UART_DLH(base));
- mmio_write_32(UART_LCR(base), uart->registers.lcr);
- uart->registers.sample_count = mmio_read_32(
- UART_SAMPLE_COUNT(base));
- uart->registers.sample_point = mmio_read_32(
- UART_SAMPLE_POINT(base));
- uart->registers.guard = mmio_read_32(UART_GUARD(base));
-
- /* flow control */
- uart->registers.escape_en = mmio_read_32(UART_ESCAPE_EN(base));
- uart->registers.mcr = mmio_read_32(UART_MCR(base));
- uart->registers.ier = mmio_read_32(UART_IER(base));
- uart->registers.scr = mmio_read_32(UART_SCR(base));
- }
-}
-
-void mt_console_uart_cg(int on)
-{
- if (on)
- mmio_write_32(UART_CLOCK_GATE_CLR, UART0_CLOCK_GATE_BIT);
- else
- mmio_write_32(UART_CLOCK_GATE_SET, UART0_CLOCK_GATE_BIT);
-}
-
-int mt_console_uart_cg_status(void)
-{
- return mmio_read_32(UART_CLOCK_GATE_STA) & UART0_CLOCK_GATE_BIT;
-}
diff --git a/plat/mediatek/mt8183/drivers/uart/uart.h b/plat/mediatek/mt8183/drivers/uart/uart.h
index be04c3509..062ce3adc 100644
--- a/plat/mediatek/mt8183/drivers/uart/uart.h
+++ b/plat/mediatek/mt8183/drivers/uart/uart.h
@@ -95,6 +95,6 @@ struct mt_uart {
void mt_uart_save(void);
void mt_uart_restore(void);
void mt_console_uart_cg(int on);
-int mt_console_uart_cg_status(void);
+uint32_t mt_console_uart_cg_status(void);
#endif /* __UART_H__ */
diff --git a/plat/mediatek/mt8183/include/platform_def.h b/plat/mediatek/mt8183/include/platform_def.h
index 49a0f805e..25ccfbc52 100644
--- a/plat/mediatek/mt8183/include/platform_def.h
+++ b/plat/mediatek/mt8183/include/platform_def.h
@@ -279,6 +279,8 @@ INTR_PROP_DESC(MT_IRQ_SEC_SGI_7, GIC_HIGHEST_SEC_PRIORITY, grp, \
PLATFORM_CLUSTER_COUNT + \
PLATFORM_CORE_COUNT)
+#define SOC_CHIP_ID U(0x8183)
+
/*******************************************************************************
* Platform memory map related constants
******************************************************************************/
diff --git a/plat/mediatek/mt8183/platform.mk b/plat/mediatek/mt8183/platform.mk
index 597e18b90..07da1afac 100644
--- a/plat/mediatek/mt8183/platform.mk
+++ b/plat/mediatek/mt8183/platform.mk
@@ -14,6 +14,7 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT_SOC}/drivers/mcdi/ \
-I${MTK_PLAT_SOC}/drivers/spmc/ \
-I${MTK_PLAT_SOC}/drivers/gpio/ \
+ -I${MTK_PLAT_SOC}/drivers/timer/ \
-I${MTK_PLAT_SOC}/drivers/pmic/ \
-I${MTK_PLAT_SOC}/drivers/spm/ \
-I${MTK_PLAT_SOC}/drivers/sspm/ \
@@ -26,13 +27,12 @@ PLAT_BL_COMMON_SOURCES := lib/xlat_tables/aarch64/xlat_tables.c \
plat/common/plat_psci_common.c \
plat/common/aarch64/crash_console_helpers.S
+# Include GICv3 driver files
+include drivers/arm/gic/v3/gicv3.mk
+
BL31_SOURCES += common/desc_image_load.c \
drivers/arm/cci/cci.c \
- drivers/arm/gic/common/gic_common.c \
- drivers/arm/gic/v3/arm_gicv3_common.c \
- drivers/arm/gic/v3/gicv3_helpers.c \
- drivers/arm/gic/v3/gic500.c \
- drivers/arm/gic/v3/gicv3_main.c \
+ ${GICV3_SOURCES} \
drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \
drivers/gpio/gpio.c \
@@ -45,6 +45,7 @@ BL31_SOURCES += common/desc_image_load.c \
${MTK_PLAT}/common/mtk_plat_common.c \
${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init.c \
${MTK_PLAT}/common/drivers/rtc/rtc_common.c \
+ ${MTK_PLAT}/common/drivers/uart/uart.c \
${MTK_PLAT}/common/params_setup.c \
${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
${MTK_PLAT_SOC}/aarch64/platform_common.c \
@@ -58,7 +59,7 @@ BL31_SOURCES += common/desc_image_load.c \
${MTK_PLAT_SOC}/drivers/spm/spm_pmic_wrap.c \
${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \
${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \
- ${MTK_PLAT_SOC}/drivers/uart/uart.c \
+ ${MTK_PLAT_SOC}/drivers/timer/mt_timer.c \
${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \
${MTK_PLAT_SOC}/plat_pm.c \
${MTK_PLAT_SOC}/plat_topology.c \
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-15 13:43:17 +0000