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authorMasahiro Yamada <yamada.masahiro@socionext.com>2020-03-26 13:16:33 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2020-04-02 13:38:24 +0900
commita7739bc7b16bf3e43f370864f8a800cf8943b391 (patch)
treebdd3f96b4e584eb3b4066a8244a388449e4cf8d6 /plat/mediatek/mt6795/bl31.ld.S
parent0a0a7a9ac82cb79af91f098cedc69cc67bca3978 (diff)
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linker_script: move bss section to bl_common.ld.h
Move the bss section to the common header. This adds BAKERY_LOCK_NORMAL and PMF_TIMESTAMP, which previously existed only in BL31. This is not a big deal because unused data should not be compiled in the first place. I believe this should be controlled by BL*_SOURCES in Makefiles, not by linker scripts. I investigated BL1, BL2, BL2U, BL31 for plat=fvp, and BL2-AT-EL3, BL31, BL31 for plat=uniphier. I did not see any more unexpected code addition. The bss section has bigger alignment. I added BSS_ALIGN for this. Currently, SORT_BY_ALIGNMENT() is missing in sp_min.ld.S, and with this change, the BSS symbols in SP_MIN will be sorted by the alignment. This is not a big deal (or, even better in terms of the image size). Change-Id: I680ee61f84067a559bac0757f9d03e73119beb33 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'plat/mediatek/mt6795/bl31.ld.S')
-rw-r--r--plat/mediatek/mt6795/bl31.ld.S15
1 files changed, 2 insertions, 13 deletions
diff --git a/plat/mediatek/mt6795/bl31.ld.S b/plat/mediatek/mt6795/bl31.ld.S
index 02d79af38..b061b91ce 100644
--- a/plat/mediatek/mt6795/bl31.ld.S
+++ b/plat/mediatek/mt6795/bl31.ld.S
@@ -80,19 +80,8 @@ SECTIONS
__STACKS_END__ = .;
} >RAM
- /*
- * The .bss section gets initialised to 0 at runtime.
- * Its base address should be 16-byte aligned for better performance of the
- * zero-initialization code.
- */
- .bss (NOLOAD) : ALIGN(16) {
- __BSS_START__ = .;
- *(.bss*)
- *(COMMON)
- BAKERY_LOCK_NORMAL
- __BSS_END__ = .;
- __RW_END__ = .;
- } >RAM
+ BSS_SECTION >RAM
+ __RW_END__ = __BSS_END__;
ASSERT(. <= BL31_LIMIT, "BL3-1 image has exceeded its limit.")