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author | Ambroise Vincent <ambroise.vincent@arm.com> | 2019-03-05 09:54:21 +0000 |
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committer | Ambroise Vincent <ambroise.vincent@arm.com> | 2019-03-13 14:05:47 +0000 |
commit | 5f2c690d0ea92e31cbe9d450f36fc7cbb39a9b23 (patch) | |
tree | d5918159a05a43b97db0777f4267c4248082a000 /lib/cpus/cpu-ops.mk | |
parent | 75a1ada95efa78e4133bdd947c64944005a8e5c2 (diff) | |
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Cortex-A15: Implement workaround for errata 827671
This erratum can only be worked around on revisions >= r3p0 because the
register that needs to be accessed only exists in those revisions[1].
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438g/CIHEAAAD.html
Change-Id: I5d773547d7a09b5bd01dabcd19ceeaf53c186faa
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Diffstat (limited to 'lib/cpus/cpu-ops.mk')
-rw-r--r-- | lib/cpus/cpu-ops.mk | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index a82db106c..f178f1af2 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -57,6 +57,10 @@ endif # applies only to revision >= r3p0 of the Cortex A15 cpu. ERRATA_A15_816470 ?=0 +# Flag to apply erratum 827671 workaround during reset. This erratum applies +# only to revision >= r3p0 of the Cortex A15 cpu. +ERRATA_A15_827671 ?=0 + # Flag to apply erratum 819472 workaround during reset. This erratum applies # only to revision <= r0p1 of the Cortex A53 cpu. ERRATA_A53_819472 ?=0 @@ -204,6 +208,10 @@ ERRATA_DSU_936184 ?=0 $(eval $(call assert_boolean,ERRATA_A15_816470)) $(eval $(call add_define,ERRATA_A15_816470)) +# Process ERRATA_A15_827671 flag +$(eval $(call assert_boolean,ERRATA_A15_827671)) +$(eval $(call add_define,ERRATA_A15_827671)) + # Process ERRATA_A53_819472 flag $(eval $(call assert_boolean,ERRATA_A53_819472)) $(eval $(call add_define,ERRATA_A53_819472)) |