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| author | johpow01 <john.powell@arm.com> | 2020-07-23 13:05:45 -0500 |
|---|---|---|
| committer | johpow01 <john.powell@arm.com> | 2020-07-23 13:05:45 -0500 |
| commit | f0bbaebc7ec00950908083e41352e856b65057f4 (patch) | |
| tree | fc4a8aed0e320995a4f837b3d43f6a22621bdfb1 /lib/cpus/aarch64 | |
| parent | d95c3de34747906f203bbe9cbbb805a06b207ada (diff) | |
| download | platform_external_arm-trusted-firmware-f0bbaebc7ec00950908083e41352e856b65057f4.tar.gz platform_external_arm-trusted-firmware-f0bbaebc7ec00950908083e41352e856b65057f4.tar.bz2 platform_external_arm-trusted-firmware-f0bbaebc7ec00950908083e41352e856b65057f4.zip | |
Revert workaround for Neoverse N1 erratum 1800710
This reverts commit 11af40b6308ac75c83e874129bb79bc3a58060bf, reversing
changes made to 2afcf1d4b845272791b75c8285108c4dcd91e2b9.
This errata workaround did not work as intended so we are reverting this
change. In the future, when the corrected workaround is published in an
SDEN, we will push a new workaround.
This is the patch being reverted:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4750
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I20aa064c1bac9671939e657bec269d32b9e75a97
Diffstat (limited to 'lib/cpus/aarch64')
| -rw-r--r-- | lib/cpus/aarch64/neoverse_n1.S | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index 0f80de143..d537ed6a8 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -375,35 +375,6 @@ func check_errata_1542419 b cpu_rev_var_range endfunc check_errata_1542419 -/* -------------------------------------------------- - * Errata Workaround for Neoverse N1 Erratum 1800710. - * This applies to revisions <= r4p0 of Neoverse N1 - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * -------------------------------------------------- - */ -func errata_n1_1800710_wa - /* Compare x0 against revision <= r4p0 */ - mov x17, x30 - bl check_errata_1800710 - cbz x0, 1f - - /* Disable allocation of splintered pages in the L2 TLB */ - mrs x1, NEOVERSE_N1_CPUECTLR_EL1 - orr x1, x1, NEOVERSE_N1_CPUECTLR_EL1_BIT_53 - msr NEOVERSE_N1_CPUECTLR_EL1, x1 - isb -1: - ret x17 -endfunc errata_n1_1800710_wa - -func check_errata_1800710 - /* Applies to everything <= r4p0 */ - mov x1, #0x40 - b cpu_rev_var_ls -endfunc check_errata_1800710 - func neoverse_n1_reset_func mov x19, x30 @@ -478,11 +449,6 @@ func neoverse_n1_reset_func bl errata_n1_1542419_wa #endif -#if ERRATA_N1_1800710 - mov x0, x18 - bl errata_n1_1800710_wa -#endif - #if ENABLE_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, actlr_el3 @@ -556,7 +522,6 @@ func neoverse_n1_errata_report report_errata ERRATA_N1_1275112, neoverse_n1, 1275112 report_errata ERRATA_N1_1315703, neoverse_n1, 1315703 report_errata ERRATA_N1_1542419, neoverse_n1, 1542419 - report_errata ERRATA_N1_1800710, neoverse_n1, 1800710 report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184 ldp x8, x30, [sp], #16 |