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| author | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-27 14:24:16 +0000 |
|---|---|---|
| committer | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-28 12:01:13 +0000 |
| commit | 25278eaba7b93701e046a8215f84843674d4ca02 (patch) | |
| tree | d123d6a84587f8692e5e847e4ac2328ce891b908 /include | |
| parent | 64503b2f81bbd12051d8e0fd065a5a0b0c38bd2a (diff) | |
| download | platform_external_arm-trusted-firmware-25278eaba7b93701e046a8215f84843674d4ca02.tar.gz platform_external_arm-trusted-firmware-25278eaba7b93701e046a8215f84843674d4ca02.tar.bz2 platform_external_arm-trusted-firmware-25278eaba7b93701e046a8215f84843674d4ca02.zip | |
Cortex-A73: Implement workaround for errata 852427
In AArch32, execution of 2 instructions with opposite condition code
might lead to either a data corruption or a CPU deadlock. Set the bit
12 of the Diagnostic Register to prevent this.
Change-Id: I22b4f25fe933e2942fd785e411e7c0aa39d5c1f4
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/lib/cpus/aarch64/cortex_a73.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a73.h b/include/lib/cpus/aarch64/cortex_a73.h index 61b2b737b..1238c0ef4 100644 --- a/include/lib/cpus/aarch64/cortex_a73.h +++ b/include/lib/cpus/aarch64/cortex_a73.h @@ -31,6 +31,8 @@ #define CORTEX_A73_IMP_DEF_REG1_DISABLE_LOAD_PASS_STORE (ULL(1) << 3) +#define CORTEX_A73_DIAGNOSTIC_REGISTER S3_0_C15_C0_1 + #define CORTEX_A73_IMP_DEF_REG2 S3_0_C15_C0_2 #endif /* CORTEX_A73_H */ |