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authorArunachalam Ganapathy <arunachalam.ganapathy@arm.com>2020-09-22 12:47:33 +0100
committerManish Pandey <manish.pandey2@arm.com>2020-10-20 20:07:06 +0000
commita3ecbb3553564d8e560209fdde165c85129b3f70 (patch)
treeee0fcdd6112123cdebf78d244624e82b568aec3e /fdts
parentd32113c7f3d291b35e0debdccac609c88a0343ae (diff)
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plat: tc0: Add TZC DRAM1 region for SPMC and trusted OS
- Reserve 32MB below ARM_AP_TZC_DRAM1_BASE for TC0_TZC_DRAM1 - Add TC0_NS_DRAM1 base and mapping - Reserve memory region in tc0.dts Change-Id: If2431f7f68e4255e28c86a0e89637dab7c424a13 Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Diffstat (limited to 'fdts')
-rw-r--r--fdts/tc0.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/fdts/tc0.dts b/fdts/tc0.dts
index 15c14cabd..763c813cf 100644
--- a/fdts/tc0.dts
+++ b/fdts/tc0.dts
@@ -106,7 +106,7 @@
memory@80000000 {
device_type = "memory";
- reg = <0x0 0x80000000 0x0 0x80000000>;
+ reg = <0x0 0x80000000 0x0 0x7d000000>;
};
psci {