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| author | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-25 11:37:38 +0000 |
|---|---|---|
| committer | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-26 16:21:06 +0000 |
| commit | 5cc8c7ba1b24ace2ef7345e96d933141f3609817 (patch) | |
| tree | f9ab8df5738d6245ca1b4e4fd7c5af143c223f2f /docs | |
| parent | 508d71108a06c7fce2eeef78659b9b7739cee6eb (diff) | |
| download | platform_external_arm-trusted-firmware-5cc8c7ba1b24ace2ef7345e96d933141f3609817.tar.gz platform_external_arm-trusted-firmware-5cc8c7ba1b24ace2ef7345e96d933141f3609817.tar.bz2 platform_external_arm-trusted-firmware-5cc8c7ba1b24ace2ef7345e96d933141f3609817.zip | |
Add workaround for errata 1220197 for Cortex-A76
Streaming store under specific conditions might cause deadlock or data
corruption. Set bit 25:24 of CPUECTLR_EL1, which disables write
streaming to the L2 to prevent this.
Change-Id: Ib5cabb997b35ada78b27e75787afd610ea606dcf
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/cpu-specific-build-macros.rst | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst index 6a3344119..bbfc86339 100644 --- a/docs/cpu-specific-build-macros.rst +++ b/docs/cpu-specific-build-macros.rst @@ -150,6 +150,9 @@ For Cortex-A76, the following errata build flags are defined : - ``ERRATA_A76_1130799``: This applies errata 1130799 workaround to Cortex-A76 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. +- ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r2p0 of the CPU. + DSU Errata Workarounds ---------------------- |