From 5cc8c7ba1b24ace2ef7345e96d933141f3609817 Mon Sep 17 00:00:00 2001 From: Louis Mayencourt Date: Mon, 25 Feb 2019 11:37:38 +0000 Subject: Add workaround for errata 1220197 for Cortex-A76 Streaming store under specific conditions might cause deadlock or data corruption. Set bit 25:24 of CPUECTLR_EL1, which disables write streaming to the L2 to prevent this. Change-Id: Ib5cabb997b35ada78b27e75787afd610ea606dcf Signed-off-by: Louis Mayencourt --- docs/cpu-specific-build-macros.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'docs') diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst index 6a3344119..bbfc86339 100644 --- a/docs/cpu-specific-build-macros.rst +++ b/docs/cpu-specific-build-macros.rst @@ -150,6 +150,9 @@ For Cortex-A76, the following errata build flags are defined : - ``ERRATA_A76_1130799``: This applies errata 1130799 workaround to Cortex-A76 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. +- ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r2p0 of the CPU. + DSU Errata Workarounds ---------------------- -- cgit v1.2.3