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| author | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-27 14:24:16 +0000 |
|---|---|---|
| committer | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-28 12:01:13 +0000 |
| commit | 25278eaba7b93701e046a8215f84843674d4ca02 (patch) | |
| tree | d123d6a84587f8692e5e847e4ac2328ce891b908 /docs | |
| parent | 64503b2f81bbd12051d8e0fd065a5a0b0c38bd2a (diff) | |
| download | platform_external_arm-trusted-firmware-25278eaba7b93701e046a8215f84843674d4ca02.tar.gz platform_external_arm-trusted-firmware-25278eaba7b93701e046a8215f84843674d4ca02.tar.bz2 platform_external_arm-trusted-firmware-25278eaba7b93701e046a8215f84843674d4ca02.zip | |
Cortex-A73: Implement workaround for errata 852427
In AArch32, execution of 2 instructions with opposite condition code
might lead to either a data corruption or a CPU deadlock. Set the bit
12 of the Diagnostic Register to prevent this.
Change-Id: I22b4f25fe933e2942fd785e411e7c0aa39d5c1f4
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/cpu-specific-build-macros.rst | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst index 1f23b5bf6..116b4ba35 100644 --- a/docs/cpu-specific-build-macros.rst +++ b/docs/cpu-specific-build-macros.rst @@ -134,6 +134,9 @@ For Cortex-A72, the following errata build flags are defined : For Cortex-A73, the following errata build flags are defined : +- ``ERRATA_A73_852427``: This applies errata 852427 workaround to Cortex-A73 + CPU. This needs to be enabled only for revision r0p0 of the CPU. + - ``ERRATA_A73_855423``: This applies errata 855423 workaround to Cortex-A73 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. |