diff options
author | Antonio Niño Díaz <antonio.ninodiaz@arm.com> | 2019-02-28 10:19:24 +0000 |
---|---|---|
committer | GitHub <noreply@github.com> | 2019-02-28 10:19:24 +0000 |
commit | 64503b2f81bbd12051d8e0fd065a5a0b0c38bd2a (patch) | |
tree | 89a0e3acb4e84aabc69b66f8f5f9e16dd9358a81 /docs | |
parent | 1baa28bb2dc79f23c550d67604324afd222221c3 (diff) | |
parent | 5c6aa01affe14c40efdebdc9450cdbc4ae0bc494 (diff) | |
download | platform_external_arm-trusted-firmware-64503b2f81bbd12051d8e0fd065a5a0b0c38bd2a.tar.gz platform_external_arm-trusted-firmware-64503b2f81bbd12051d8e0fd065a5a0b0c38bd2a.tar.bz2 platform_external_arm-trusted-firmware-64503b2f81bbd12051d8e0fd065a5a0b0c38bd2a.zip |
Merge pull request #1839 from loumay-arm/lm/a7x_errata
Cortex-A73/75/76 errata workaround
Diffstat (limited to 'docs')
-rw-r--r-- | docs/cpu-specific-build-macros.rst | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst index 315457a19..1f23b5bf6 100644 --- a/docs/cpu-specific-build-macros.rst +++ b/docs/cpu-specific-build-macros.rst @@ -132,6 +132,30 @@ For Cortex-A72, the following errata build flags are defined : - ``ERRATA_A72_859971``: This applies errata 859971 workaround to Cortex-A72 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. +For Cortex-A73, the following errata build flags are defined : + +- ``ERRATA_A73_855423``: This applies errata 855423 workaround to Cortex-A73 + CPU. This needs to be enabled only for revision <= r0p1 of the CPU. + +For Cortex-A75, the following errata build flags are defined : + +- ``ERRATA_A75_764081``: This applies errata 764081 workaround to Cortex-A75 + CPU. This needs to be enabled only for revision r0p0 of the CPU. + +- ``ERRATA_A75_790748``: This applies errata 790748 workaround to Cortex-A75 + CPU. This needs to be enabled only for revision r0p0 of the CPU. + +For Cortex-A76, the following errata build flags are defined : + +- ``ERRATA_A76_1073348``: This applies errata 1073348 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r1p0 of the CPU. + +- ``ERRATA_A76_1130799``: This applies errata 1130799 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r2p0 of the CPU. + +- ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r2p0 of the CPU. + DSU Errata Workarounds ---------------------- |