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author | Antonio Niño Díaz <antonio.ninodiaz@arm.com> | 2019-02-06 10:20:25 +0000 |
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committer | GitHub <noreply@github.com> | 2019-02-06 10:20:25 +0000 |
commit | 30490b15fef50900acac0f23a528651c24759e7d (patch) | |
tree | ff3f53537201d7f7324a1db26982ca7a438472bd /docs/user-guide.rst | |
parent | d636f67e60d65a0eaa5f7d5588ace3f6f3d66563 (diff) | |
parent | a474d3d700bcf4ff2c19694521e41c960b6cc091 (diff) | |
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Merge pull request #1785 from vwadekar/tf2.0-tegra-downstream-rebase-1.25.19
Tf2.0 tegra downstream rebase 1.25.19
Diffstat (limited to 'docs/user-guide.rst')
-rw-r--r-- | docs/user-guide.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/user-guide.rst b/docs/user-guide.rst index 320bb1dc7..35d44ca3c 100644 --- a/docs/user-guide.rst +++ b/docs/user-guide.rst @@ -575,6 +575,10 @@ Common build options 1 (do save and restore). 0 is the default. An SPD may set this to 1 if it wants the timer registers to be saved and restored. +- ``OVERRIDE_LIBC``: This option allows platforms to override the default libc + for the BL image. It can be either 0 (include) or 1 (remove). The default + value is 0. + - ``PL011_GENERIC_UART``: Boolean option to indicate the PL011 driver that the underlying hardware is not a full PL011 UART but a minimally compliant generic UART, which is a subset of the PL011. The driver will not access |