diff options
author | Wolfgang Denk <wd@pollux.(none)> | 2005-09-26 01:06:33 +0200 |
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committer | Wolfgang Denk <wd@pollux.(none)> | 2005-09-26 01:06:33 +0200 |
commit | c570b2fdf5da2e05c2707a112a1238913b6c4c23 (patch) | |
tree | a8be99b34b98b02114eca2bbe040f425fb73feeb | |
parent | c2d0ab4da856a28e4cb48c0835de3fc4179a91df (diff) | |
download | u-boot-midas-c570b2fdf5da2e05c2707a112a1238913b6c4c23.tar.gz u-boot-midas-c570b2fdf5da2e05c2707a112a1238913b6c4c23.tar.bz2 u-boot-midas-c570b2fdf5da2e05c2707a112a1238913b6c4c23.zip |
Add board support for armadillo HT1070
Patch by Rowel Atienza, 06 Apr 2005
-rw-r--r-- | CHANGELOG | 3 | ||||
-rw-r--r-- | MAINTAINERS | 4 | ||||
-rwxr-xr-x | MAKEALL | 4 | ||||
-rw-r--r-- | Makefile | 3 | ||||
-rw-r--r-- | README | 14 | ||||
-rw-r--r-- | board/armadillo/Makefile | 48 | ||||
-rw-r--r-- | board/armadillo/armadillo.c | 62 | ||||
-rw-r--r-- | board/armadillo/config.mk | 29 | ||||
-rw-r--r-- | board/armadillo/flash.c | 336 | ||||
-rw-r--r-- | board/armadillo/lowlevel_init.S | 66 | ||||
-rw-r--r-- | board/armadillo/u-boot.lds | 55 | ||||
-rw-r--r-- | cpu/arm720t/cpu.c | 4 | ||||
-rw-r--r-- | cpu/arm720t/interrupts.c | 6 | ||||
-rw-r--r-- | cpu/arm720t/serial.c | 2 | ||||
-rw-r--r-- | cpu/arm720t/start.S | 6 | ||||
-rw-r--r-- | drivers/eepro100.c | 196 | ||||
-rw-r--r-- | include/asm-arm/arch-arm720t/hardware.h | 2 | ||||
-rw-r--r-- | include/configs/MPC8260ADS.h | 2 | ||||
-rw-r--r-- | include/configs/armadillo.h | 149 | ||||
-rw-r--r-- | lib_arm/armlinux.c | 2 |
20 files changed, 875 insertions, 118 deletions
@@ -2,6 +2,9 @@ Changes for U-Boot 1.1.4: ====================================================================== +* Add board support for armadillo HT1070 + Patch by Rowel Atienza, 06 Apr 2005 + * Second Ethernet address enabled for MPC885ADS and MPC8272ADS. Patch by Vitaly Bordug, 30 Mar 2005 diff --git a/MAINTAINERS b/MAINTAINERS index 020c029fca..d251cd8e52 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -351,6 +351,10 @@ Unknown / orphaned boards: # Board CPU # ######################################################################### +Rowel Atienza <rowel@diwalabs.com> + + armadillo ARM720T + Rishi Bhattacharya <rishi@ti.com> omap5912osk ARM926EJS @@ -161,8 +161,8 @@ LIST_SA="assabet dnp1110 gcplus lart shannon" ######################################################################### LIST_ARM7=" \ - B2 ep7312 evb4510 impa7 \ - integratorap_CM720T integratorap_CM7TDMI \ + armadillo B2 ep7312 evb4510 \ + impa7 integratorap_CM720T integratorap_CM7TDMI \ modnet50 \ " @@ -1684,6 +1684,9 @@ B2_config : unconfig ## ARM720T Systems ######################################################################### +armadillo_config: unconfig + @./mkconfig $(@:_config=) arm arm720t armadillo + ep7312_config : unconfig @./mkconfig $(@:_config=) arm arm720t ep7312 @@ -302,13 +302,13 @@ The following options need to be configured: ARM based boards: ----------------- - CONFIG_AT91RM9200DK, CONFIG_CERF250, CONFIG_DNP1110, - CONFIG_EP7312, CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE, - CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, - CONFIG_LART, CONFIG_LPD7A400 CONFIG_LUBBOCK, - CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, CONFIG_SHANNON, - CONFIG_P2_OMAP730, CONFIG_SMDK2400, CONFIG_SMDK2410, - CONFIG_TRAB, CONFIG_VCMA9 + CONFIG_ARMADILLO, CONFIG_AT91RM9200DK, CONFIG_CERF250, + CONFIG_DNP1110, CONFIG_EP7312, CONFIG_H2_OMAP1610, + CONFIG_HHP_CRADLE, CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, + CONFIG_INNOVATOROMAP1610, CONFIG_LART, CONFIG_LPD7A400, + CONFIG_LUBBOCK, CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, + CONFIG_SHANNON, CONFIG_P2_OMAP730, CONFIG_SMDK2400, + CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9 MicroBlaze based boards: ------------------------ diff --git a/board/armadillo/Makefile b/board/armadillo/Makefile new file mode 100644 index 0000000000..52ea7f28d4 --- /dev/null +++ b/board/armadillo/Makefile @@ -0,0 +1,48 @@ +# +# (C) Copyright 2002 +# Sysgo Real-Time Solutions, GmbH <www.elinos.com> +# Marius Groeger <mgroeger@sysgo.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := armadillo.o flash.o +SOBJS := lowlevel_init.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/armadillo/armadillo.c b/board/armadillo/armadillo.c new file mode 100644 index 0000000000..de04c66385 --- /dev/null +++ b/board/armadillo/armadillo.c @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com> + * Armadillo board HT1070 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <clps7111.h> + +/* ------------------------------------------------------------------------- */ + + +/* + * Miscelaneous platform dependent initialisations + */ + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Activate LED flasher */ + IO_LEDFLSH = 0x40; + + /* arch number MACH_TYPE_ARMADILLO - not official*/ + gd->bd->bi_arch_number = 83; + + /* location of boot parameters */ + gd->bd->bi_boot_params = 0xc0000100; + + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return (0); +} diff --git a/board/armadillo/config.mk b/board/armadillo/config.mk new file mode 100644 index 0000000000..23c432f165 --- /dev/null +++ b/board/armadillo/config.mk @@ -0,0 +1,29 @@ +# +# (C) Copyright 2000 +# Sysgo Real-Time Solutions, GmbH <www.elinos.com> +# Marius Groeger <mgroeger@sysgo.de> +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +#address where u-boot will be relocated +TEXT_BASE = 0xc0f80000 diff --git a/board/armadillo/flash.c b/board/armadillo/flash.c new file mode 100644 index 0000000000..f25a8e7bba --- /dev/null +++ b/board/armadillo/flash.c @@ -0,0 +1,336 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com> + * Flash driver for armadillo board HT1070 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#define FLASH_BANK_SIZE 0x400000 + +/*value used by hermit is 0x200*/ +/*document says sector size is either 64k in low mem reg and 8k in high mem reg*/ +#define MAIN_SECT_SIZE 0x10000 + +#define UNALIGNED_MASK (3) +#define FL_WORD(addr) (*(volatile unsigned short*)(addr)) +#define FLASH_TIMEOUT 20000000 + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; + +/*----------------------------------------------------------------------- + */ + +ulong flash_init (void) +{ + int i, j; + ulong size = 0; + + for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + ulong flashbase = 0; + + flash_info[i].flash_id = (FUJ_MANUFACT & FLASH_VENDMASK); + /*(INTEL_ID_28F128J3 & FLASH_TYPEMASK); */ + flash_info[i].size = FLASH_BANK_SIZE; + flash_info[i].sector_count = CFG_MAX_FLASH_SECT; + memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); + if (i == 0) + flashbase = PHYS_FLASH_1; + else + panic ("configured too many flash banks!\n"); + for (j = 0; j < flash_info[i].sector_count; j++) { + flash_info[i].start[j] = + flashbase + j * MAIN_SECT_SIZE; + } + size += flash_info[i].size; + } + + /* Protect monitor and environment sectors + */ + flash_protect (FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE + monitor_flash_len - 1, + &flash_info[0]); + + flash_protect (FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); + + return size; +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t * info) +{ + int i; + + switch (info->flash_id & FLASH_VENDMASK) { + case (FUJ_MANUFACT & FLASH_VENDMASK): + printf ("Fujitsu: "); + break; + default: + printf ("Unknown Vendor "); + break; + } +/* + switch (info->flash_id & FLASH_TYPEMASK) { + case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): + printf ("28F128J3 (128Mbit)\n"); + break; + default: + printf ("Unknown Chip Type\n"); + goto Done; + break; + } +*/ + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; i++) { + if ((i % 5) == 0) { + printf ("\n "); + } + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); + + Done: +} + +/* + * * Loop until both write state machines complete. + * */ +static unsigned short flash_status_wait (unsigned long addr, + unsigned short value) +{ + unsigned short status; + long timeout = FLASH_TIMEOUT; + + while (((status = (FL_WORD (addr))) != value) && timeout > 0) { + timeout--; + } + return status; +} + +/* + * Loop until the Write State machine is ready, then do a full error + * check. Clear status and leave the flash in Read Array mode; return + * 0 for no error, -1 for error. + */ +static int flash_status_full_check (unsigned long addr, unsigned short value1, + unsigned short value2) +{ + unsigned short status1, status2; + + status1 = flash_status_wait (addr, value1); + status2 = flash_status_wait (addr + 2, value2); + return (status1 != value1 || status2 != value2) ? -1 : 0; +} + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + int flag, prot, sect; + int rc = ERR_OK; + unsigned long base; + unsigned long addr; + + if ((info->flash_id & FLASH_VENDMASK) != + (FUJ_MANUFACT & FLASH_VENDMASK)) { + return ERR_UNKNOWN_FLASH_VENDOR; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + if (prot) + return ERR_PROTECTED; + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + flag = disable_interrupts (); + + printf ("Erasing %d sectors starting at sector %2d.\n" + "This make take some time ... ", + s_last - s_first, sect); + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { + /* ARM simple, non interrupt dependent timer */ + reset_timer_masked (); + + if (info->protect[sect] == 0) { /* not protected */ + + addr = sect * MAIN_SECT_SIZE; + addr &= ~(unsigned long) UNALIGNED_MASK; /* word align */ + base = addr & 0xF0000000; + + FL_WORD (base + (0x555 << 1)) = 0xAA; + FL_WORD (base + (0x2AA << 1)) = 0x55; + FL_WORD (base + (0x555 << 1)) = 0x80; + FL_WORD (base + (0x555 << 1)) = 0xAA; + FL_WORD (base + (0x2AA << 1)) = 0x55; + FL_WORD (addr) = 0x30; + if (flash_status_full_check (addr, 0xFFFF, 0xFFFF)) + return ERR_PROTECTED; + } + } + printf ("\nDone.\n"); + if (ctrlc ()) + printf ("User Interrupt!\n"); + + /* allow flash to settle - wait 10 ms */ + udelay_masked (10000); + + if (flag) + enable_interrupts (); + + return rc; +} + + +/*----------------------------------------------------------------------- + * Copy memory to flash + */ + +static int write_word (flash_info_t * info, ulong dest, ushort data) +{ + int flag; + unsigned long base; + + /* Check if Flash is (sufficiently) erased + */ + if ((FL_WORD (dest) & data) != data) + return ERR_NOT_ERASED; + + /*if(dest & UNALIGNED_MASK) return ERR_ALIGN; */ + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + flag = disable_interrupts (); + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + base = dest & 0xF0000000; + FL_WORD (base + (0x555 << 1)) = 0xAA; + FL_WORD (base + (0x2AA << 1)) = 0x55; + FL_WORD (base + (0x555 << 1)) = 0xA0; + FL_WORD (dest) = data; + /*printf("writing 0x%p = 0x%x\n",dest,data); */ + if (flash_status_wait (dest, data) != data) + return ERR_PROG_ERROR; + + if (flag) + enable_interrupts (); + + return ERR_OK; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash. + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + ulong cp, wp; + ushort data; + int l; + int i, rc; + + wp = (addr & ~1); /* get lower word aligned address */ + printf ("Writing %d short data to 0x%p from 0x%p.\n ", cnt, wp, src); + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i = 0, cp = wp; i < l; ++i, ++cp) { + data = (data >> 8) | (*(uchar *) cp << 8); + } + for (; i < 2 && cnt > 0; ++i) { + data = (data >> 8) | (*src++ << 8); + --cnt; + ++cp; + } + for (; cnt == 0 && i < 2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *) cp << 8); + } + + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + wp += 2; + } + + /* + * handle word aligned part + */ + while (cnt >= 2) { + data = *((vu_short *) src); + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + src += 2; + wp += 2; + cnt -= 2; + } + + if (cnt == 0) { + printf ("\nDone.\n"); + return ERR_OK; + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) { + data = (data >> 8) | (*src++ << 8); + --cnt; + } + for (; i < 2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *) cp << 8); + } + + return write_word (info, wp, data); +} diff --git a/board/armadillo/lowlevel_init.S b/board/armadillo/lowlevel_init.S new file mode 100644 index 0000000000..6cf642611c --- /dev/null +++ b/board/armadillo/lowlevel_init.S @@ -0,0 +1,66 @@ +/* + * Initialization stuff - taken from hermit + * (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com> + * Armadillo board HT1070 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <config.h> +#include <version.h> + + +/* some parameters for the board */ +/* setting up the memory */ +#define SRAM_START 0x60000000 +#define SRAM_SIZE 0x0000c000 + +.globl lowlevel_init +lowlevel_init: + mov r0, #0x70 /* 32-bit code + data, MMU mandatory */ + mcr p15, 0, r0, c1, c0, 0 /* MMU init */ + + mov r0, #0 + mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ + mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ + + mov r0, #0x80000000 /* I/O base */ + + mov r1, #0x6 /* CLKCTL_73 in SYSCON3 */ + add r2, r0, #0x2200 /* address of SYSCON3 in r2 */ + str r1, [r2] /* set clock speed to 73.728 MHz */ + + mov r1, #0x81 /* 64KHz DRAM refresh period */ + str r1, [r0, #0x200] /* set DRFPR */ + + mov r1, #0x500 /* permanent enable, 16bits wide */ + add r1, r1, #0x42 /* 128Mbit, CAS lat = 2 SDRAM */ + add r2, r0, #0x2300 /* load address in r2 */ + str r1, [r2] + + mov r1, #0x100 /* SDRAM refresh rate */ + add r2, r0, #0x2340 /* load address in r2 */ + str r1, [r2] + + mov sp, #SRAM_START /* init stack pointer */ + add sp, sp, #SRAM_SIZE + + /* everything is fine now */ + mov pc, lr diff --git a/board/armadillo/u-boot.lds b/board/armadillo/u-boot.lds new file mode 100644 index 0000000000..64d946c439 --- /dev/null +++ b/board/armadillo/u-boot.lds @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm720t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/cpu/arm720t/cpu.c b/cpu/arm720t/cpu.c index 5421aff7de..fcca360732 100644 --- a/cpu/arm720t/cpu.c +++ b/cpu/arm720t/cpu.c @@ -57,7 +57,7 @@ int cleanup_before_linux (void) * and we set the CPU-speed to 73 MHz - see start.S for details */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) unsigned long i; disable_interrupts (); @@ -95,7 +95,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) * */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) /* read co-processor 15, register #1 (control register) */ static unsigned long read_p15_c1(void) { diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c index ab28e602c5..d0eaca5e02 100644 --- a/cpu/arm720t/interrupts.c +++ b/cpu/arm720t/interrupts.c @@ -180,7 +180,7 @@ void do_fiq (struct pt_regs *pt_regs) void do_irq (struct pt_regs *pt_regs) { -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) printf ("interrupt request\n"); show_regs (pt_regs); bad_mode (); @@ -233,7 +233,7 @@ int interrupt_init (void) /* set timer 2 counter */ lastdec = TIMER_LOAD_VAL; -#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) /* disable all interrupts */ IO_INTMR1 = 0; @@ -301,7 +301,7 @@ int interrupt_init (void) */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) void reset_timer (void) { diff --git a/cpu/arm720t/serial.c b/cpu/arm720t/serial.c index a5da4b76b6..0f99979508 100644 --- a/cpu/arm720t/serial.c +++ b/cpu/arm720t/serial.c @@ -30,7 +30,7 @@ #include <common.h> -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) #include <clps7111.h> diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S index 3695465e70..eb26476a66 100644 --- a/cpu/arm720t/start.S +++ b/cpu/arm720t/start.S @@ -188,7 +188,7 @@ _start_armboot: .word start_armboot ************************************************************************* */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) /* Interupt-Controller base addresses */ INTMR1: .word 0x80000280 @ 32 bit size @@ -209,7 +209,7 @@ SYSCON3: .word 0x80002200 #endif cpu_init_crit: -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) /* * mask all IRQs by clearing all bits in the INTMRs @@ -495,7 +495,7 @@ fiq: #endif -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) .align 5 .globl reset_cpu reset_cpu: diff --git a/drivers/eepro100.c b/drivers/eepro100.c index 9db7bd80c2..0054e87571 100644 --- a/drivers/eepro100.c +++ b/drivers/eepro100.c @@ -34,67 +34,67 @@ /* Ethernet chip registers. */ -#define SCBStatus 0 /* Rx/Command Unit Status *Word* */ -#define SCBIntAckByte 1 /* Rx/Command Unit STAT/ACK byte */ -#define SCBCmd 2 /* Rx/Command Unit Command *Word* */ -#define SCBIntrCtlByte 3 /* Rx/Command Unit Intr.Control Byte */ -#define SCBPointer 4 /* General purpose pointer. */ -#define SCBPort 8 /* Misc. commands and operands. */ -#define SCBflash 12 /* Flash memory control. */ -#define SCBeeprom 14 /* EEPROM memory control. */ -#define SCBCtrlMDI 16 /* MDI interface control. */ -#define SCBEarlyRx 20 /* Early receive byte count. */ -#define SCBGenControl 28 /* 82559 General Control Register */ -#define SCBGenStatus 29 /* 82559 General Status register */ +#define SCBStatus 0 /* Rx/Command Unit Status *Word* */ +#define SCBIntAckByte 1 /* Rx/Command Unit STAT/ACK byte */ +#define SCBCmd 2 /* Rx/Command Unit Command *Word* */ +#define SCBIntrCtlByte 3 /* Rx/Command Unit Intr.Control Byte */ +#define SCBPointer 4 /* General purpose pointer. */ +#define SCBPort 8 /* Misc. commands and operands. */ +#define SCBflash 12 /* Flash memory control. */ +#define SCBeeprom 14 /* EEPROM memory control. */ +#define SCBCtrlMDI 16 /* MDI interface control. */ +#define SCBEarlyRx 20 /* Early receive byte count. */ +#define SCBGenControl 28 /* 82559 General Control Register */ +#define SCBGenStatus 29 /* 82559 General Status register */ /* 82559 SCB status word defnitions */ -#define SCB_STATUS_CX 0x8000 /* CU finished command (transmit) */ -#define SCB_STATUS_FR 0x4000 /* frame received */ -#define SCB_STATUS_CNA 0x2000 /* CU left active state */ -#define SCB_STATUS_RNR 0x1000 /* receiver left ready state */ -#define SCB_STATUS_MDI 0x0800 /* MDI read/write cycle done */ -#define SCB_STATUS_SWI 0x0400 /* software generated interrupt */ -#define SCB_STATUS_FCP 0x0100 /* flow control pause interrupt */ +#define SCB_STATUS_CX 0x8000 /* CU finished command (transmit) */ +#define SCB_STATUS_FR 0x4000 /* frame received */ +#define SCB_STATUS_CNA 0x2000 /* CU left active state */ +#define SCB_STATUS_RNR 0x1000 /* receiver left ready state */ +#define SCB_STATUS_MDI 0x0800 /* MDI read/write cycle done */ +#define SCB_STATUS_SWI 0x0400 /* software generated interrupt */ +#define SCB_STATUS_FCP 0x0100 /* flow control pause interrupt */ -#define SCB_INTACK_MASK 0xFD00 /* all the above */ +#define SCB_INTACK_MASK 0xFD00 /* all the above */ -#define SCB_INTACK_TX (SCB_STATUS_CX | SCB_STATUS_CNA) -#define SCB_INTACK_RX (SCB_STATUS_FR | SCB_STATUS_RNR) +#define SCB_INTACK_TX (SCB_STATUS_CX | SCB_STATUS_CNA) +#define SCB_INTACK_RX (SCB_STATUS_FR | SCB_STATUS_RNR) /* System control block commands */ /* CU Commands */ -#define CU_NOP 0x0000 -#define CU_START 0x0010 -#define CU_RESUME 0x0020 -#define CU_STATSADDR 0x0040 /* Load Dump Statistics ctrs addr */ -#define CU_SHOWSTATS 0x0050 /* Dump statistics counters. */ -#define CU_ADDR_LOAD 0x0060 /* Base address to add to CU commands */ -#define CU_DUMPSTATS 0x0070 /* Dump then reset stats counters. */ +#define CU_NOP 0x0000 +#define CU_START 0x0010 +#define CU_RESUME 0x0020 +#define CU_STATSADDR 0x0040 /* Load Dump Statistics ctrs addr */ +#define CU_SHOWSTATS 0x0050 /* Dump statistics counters. */ +#define CU_ADDR_LOAD 0x0060 /* Base address to add to CU commands */ +#define CU_DUMPSTATS 0x0070 /* Dump then reset stats counters. */ /* RUC Commands */ -#define RUC_NOP 0x0000 -#define RUC_START 0x0001 -#define RUC_RESUME 0x0002 -#define RUC_ABORT 0x0004 -#define RUC_ADDR_LOAD 0x0006 /* (seems not to clear on acceptance) */ -#define RUC_RESUMENR 0x0007 - -#define CU_CMD_MASK 0x00f0 -#define RU_CMD_MASK 0x0007 - -#define SCB_M 0x0100 /* 0 = enable interrupt, 1 = disable */ -#define SCB_SWI 0x0200 /* 1 - cause device to interrupt */ - -#define CU_STATUS_MASK 0x00C0 -#define RU_STATUS_MASK 0x003C - -#define RU_STATUS_IDLE (0<<2) -#define RU_STATUS_SUS (1<<2) -#define RU_STATUS_NORES (2<<2) -#define RU_STATUS_READY (4<<2) -#define RU_STATUS_NO_RBDS_SUS ((1<<2)|(8<<2)) +#define RUC_NOP 0x0000 +#define RUC_START 0x0001 +#define RUC_RESUME 0x0002 +#define RUC_ABORT 0x0004 +#define RUC_ADDR_LOAD 0x0006 /* (seems not to clear on acceptance) */ +#define RUC_RESUMENR 0x0007 + +#define CU_CMD_MASK 0x00f0 +#define RU_CMD_MASK 0x0007 + +#define SCB_M 0x0100 /* 0 = enable interrupt, 1 = disable */ +#define SCB_SWI 0x0200 /* 1 - cause device to interrupt */ + +#define CU_STATUS_MASK 0x00C0 +#define RU_STATUS_MASK 0x003C + +#define RU_STATUS_IDLE (0<<2) +#define RU_STATUS_SUS (1<<2) +#define RU_STATUS_NORES (2<<2) +#define RU_STATUS_READY (4<<2) +#define RU_STATUS_NO_RBDS_SUS ((1<<2)|(8<<2)) #define RU_STATUS_NO_RBDS_NORES ((2<<2)|(8<<2)) #define RU_STATUS_NO_RBDS_READY ((4<<2)|(8<<2)) @@ -138,27 +138,27 @@ struct RxFD { }; #define RFD_STATUS_C 0x8000 /* completion of received frame */ -#define RFD_STATUS_OK 0x2000 /* frame received with no errors */ - -#define RFD_CONTROL_EL 0x8000 /* 1=last RFD in RFA */ -#define RFD_CONTROL_S 0x4000 /* 1=suspend RU after receiving frame */ -#define RFD_CONTROL_H 0x0010 /* 1=RFD is a header RFD */ -#define RFD_CONTROL_SF 0x0008 /* 0=simplified, 1=flexible mode */ - -#define RFD_COUNT_MASK 0x3fff -#define RFD_COUNT_F 0x4000 -#define RFD_COUNT_EOF 0x8000 - -#define RFD_RX_CRC 0x0800 /* crc error */ -#define RFD_RX_ALIGNMENT 0x0400 /* alignment error */ -#define RFD_RX_RESOURCE 0x0200 /* out of space, no resources */ -#define RFD_RX_DMA_OVER 0x0100 /* DMA overrun */ -#define RFD_RX_SHORT 0x0080 /* short frame error */ -#define RFD_RX_LENGTH 0x0020 -#define RFD_RX_ERROR 0x0010 /* receive error */ -#define RFD_RX_NO_ADR_MATCH 0x0004 /* no address match */ -#define RFD_RX_IA_MATCH 0x0002 /* individual address does not match */ -#define RFD_RX_TCO 0x0001 /* TCO indication */ +#define RFD_STATUS_OK 0x2000 /* frame received with no errors */ + +#define RFD_CONTROL_EL 0x8000 /* 1=last RFD in RFA */ +#define RFD_CONTROL_S 0x4000 /* 1=suspend RU after receiving frame */ +#define RFD_CONTROL_H 0x0010 /* 1=RFD is a header RFD */ +#define RFD_CONTROL_SF 0x0008 /* 0=simplified, 1=flexible mode */ + +#define RFD_COUNT_MASK 0x3fff +#define RFD_COUNT_F 0x4000 +#define RFD_COUNT_EOF 0x8000 + +#define RFD_RX_CRC 0x0800 /* crc error */ +#define RFD_RX_ALIGNMENT 0x0400 /* alignment error */ +#define RFD_RX_RESOURCE 0x0200 /* out of space, no resources */ +#define RFD_RX_DMA_OVER 0x0100 /* DMA overrun */ +#define RFD_RX_SHORT 0x0080 /* short frame error */ +#define RFD_RX_LENGTH 0x0020 +#define RFD_RX_ERROR 0x0010 /* receive error */ +#define RFD_RX_NO_ADR_MATCH 0x0004 /* no address match */ +#define RFD_RX_IA_MATCH 0x0002 /* individual address does not match */ +#define RFD_RX_TCO 0x0001 /* TCO indication */ /* Transmit frame descriptors */ @@ -176,45 +176,45 @@ struct TxFD { /* Transmit frame descriptor set. */ }; #define TxCB_CMD_TRANSMIT 0x0004 /* transmit command */ -#define TxCB_CMD_SF 0x0008 /* 0=simplified, 1=flexible mode */ -#define TxCB_CMD_NC 0x0010 /* 0=CRC insert by controller */ -#define TxCB_CMD_I 0x2000 /* generate interrupt on completion */ -#define TxCB_CMD_S 0x4000 /* suspend on completion */ -#define TxCB_CMD_EL 0x8000 /* last command block in CBL */ +#define TxCB_CMD_SF 0x0008 /* 0=simplified, 1=flexible mode */ +#define TxCB_CMD_NC 0x0010 /* 0=CRC insert by controller */ +#define TxCB_CMD_I 0x2000 /* generate interrupt on completion */ +#define TxCB_CMD_S 0x4000 /* suspend on completion */ +#define TxCB_CMD_EL 0x8000 /* last command block in CBL */ -#define TxCB_COUNT_MASK 0x3fff -#define TxCB_COUNT_EOF 0x8000 +#define TxCB_COUNT_MASK 0x3fff +#define TxCB_COUNT_EOF 0x8000 /* The Speedo3 Rx and Tx frame/buffer descriptors. */ struct descriptor { /* A generic descriptor. */ volatile u16 status; volatile u16 command; - volatile u32 link; /* struct descriptor * */ + volatile u32 link; /* struct descriptor * */ unsigned char params[0]; }; -#define CFG_CMD_EL 0x8000 -#define CFG_CMD_SUSPEND 0x4000 -#define CFG_CMD_INT 0x2000 -#define CFG_CMD_IAS 0x0001 /* individual address setup */ -#define CFG_CMD_CONFIGURE 0x0002 /* configure */ +#define CFG_CMD_EL 0x8000 +#define CFG_CMD_SUSPEND 0x4000 +#define CFG_CMD_INT 0x2000 +#define CFG_CMD_IAS 0x0001 /* individual address setup */ +#define CFG_CMD_CONFIGURE 0x0002 /* configure */ -#define CFG_STATUS_C 0x8000 -#define CFG_STATUS_OK 0x2000 +#define CFG_STATUS_C 0x8000 +#define CFG_STATUS_OK 0x2000 /* Misc. */ -#define NUM_RX_DESC PKTBUFSRX -#define NUM_TX_DESC 1 /* Number of TX descriptors */ +#define NUM_RX_DESC PKTBUFSRX +#define NUM_TX_DESC 1 /* Number of TX descriptors */ #define TOUT_LOOP 1000000 #define ETH_ALEN 6 -static struct RxFD rx_ring[NUM_RX_DESC]; /* RX descriptor ring */ -static struct TxFD tx_ring[NUM_TX_DESC]; /* TX descriptor ring */ +static struct RxFD rx_ring[NUM_RX_DESC]; /* RX descriptor ring */ +static struct TxFD tx_ring[NUM_TX_DESC]; /* TX descriptor ring */ static int rx_next; /* RX descriptor ring pointer */ static int tx_next; /* TX descriptor ring pointer */ static int tx_threshold; @@ -277,26 +277,26 @@ static inline int INL (struct eth_device *dev, u_long addr) return le32_to_cpu (*(volatile u32 *) (addr + dev->iobase)); } -int miiphy_read (unsigned char addr, - unsigned char reg, - unsigned short *value) +int miiphy_read (unsigned char addr, + unsigned char reg, + unsigned short *value) { int cmd = (2 << 26) | ((addr & 0x1f) << 21) | ((reg & 0x1f) << 16); struct eth_device *dev = eth_get_dev (); OUTL (dev, cmd, SCBCtrlMDI); - + do { cmd = INL (dev, SCBCtrlMDI); } while (!(cmd & (1 << 28))); *value = (unsigned short) (cmd & 0xffff); - + return 0; } -int miiphy_write (unsigned char addr, +int miiphy_write (unsigned char addr, unsigned char reg, unsigned short value) { @@ -764,12 +764,12 @@ int eepro100_write_eeprom (struct eth_device* dev, int location, int addr_len, u OUTW(dev, EE_ENB | dataval, SCBeeprom); udelay(1); - datalong = datalong << 1; /* Adjust significant data bit*/ + datalong = datalong << 1; /* Adjust significant data bit*/ } /* Finish up command (toggle CS) */ OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom); - udelay(1); /* delay for more than 250 ns */ + udelay(1); /* delay for more than 250 ns */ OUTW(dev, EE_ENB, SCBeeprom); /* Wait for programming ready (D0 = 1) */ diff --git a/include/asm-arm/arch-arm720t/hardware.h b/include/asm-arm/arch-arm720t/hardware.h index 5064697858..9404acd455 100644 --- a/include/asm-arm/arch-arm720t/hardware.h +++ b/include/asm-arm/arch-arm720t/hardware.h @@ -32,6 +32,8 @@ /* include IMPA7 specific hardware file if there was one */ #elif defined(CONFIG_EP7312) /* include EP7312 specific hardware file if there was one */ +#elif defined(CONFIG_ARMADILLO) +/* include armadillo specific hardware file if there was one */ #else #error No hardware file defined for this configuration #endif diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h index bca207418c..6195bca85b 100644 --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -503,7 +503,7 @@ #endif /* CONFIG_ADSTYPE == CONFIG_8272ADS*/ #if CONFIG_ADSTYPE == CFG_8272ADS -#define CONFIG_HAS_ETH1 +#define CONFIG_HAS_ETH1 #endif #endif /* __CONFIG_H */ diff --git a/include/configs/armadillo.h b/include/configs/armadillo.h new file mode 100644 index 0000000000..9a1c5596b7 --- /dev/null +++ b/include/configs/armadillo.h @@ -0,0 +1,149 @@ +/* + * (C) Copyright 2000 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * Configuation settings for the EP7312 board. + * + * Modified to work on Armadillo HT1070 ARM720T board + * (C) Copyright 2005 Rowel Atienza rowel@diwalabs.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * If we are developing, we might want to start armboot from ram + * so we MUST NOT initialize critical regs like mem-timing ... + */ +/*#define CONFIG_INIT_CRITICAL*/ /* undef for developing */ + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_ARM7 1 /* This is a ARM7 CPU */ +#define CONFIG_ARMADILLO 1 /* on an Armadillo Board */ +#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */ +#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */ + +#undef CONFIG_USE_IRQ /* don't need them anymore */ + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * Hardware drivers + */ +#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ +#define CS8900_BASE 0x20000300 /* armadillo board */ +#define CS8900_BUS16 1 +#undef CS8900_BUS32 + +/* + * select serial console configuration + */ +#define CONFIG_SERIAL1 1 /* we use Serial line 1 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE) + +#define CONFIG_COMMANDS (CONFIG_CMD_DFL) /* | CFG_CMD_JFFS2)*/ + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <cmd_confdefs.h> + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "root=/dev/ram0 rootfstype=ext2 console=ttyAM0,115200" + +#define CONFIG_BOOTCOMMAND "bootm 40000 180000" + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "ARMADILLO # " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0xc0400000 /* memtest works on */ +#define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ + +#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CFG_LOAD_ADDR 0x00040000 /* default load address for armadillo: kernel img is here*/ + +#define CFG_HZ 2000 /* decrementer freq: 2 kHz */ + + /* valid baudrates */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB armadillo SDRAM */ + +#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ +#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */ + +#define CFG_FLASH_BASE PHYS_FLASH_1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ + +/* timeout values are in ticks */ +#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */ +#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +#endif /* __CONFIG_H */ diff --git a/lib_arm/armlinux.c b/lib_arm/armlinux.c index d15860578a..ca630b377e 100644 --- a/lib_arm/armlinux.c +++ b/lib_arm/armlinux.c @@ -167,7 +167,7 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], do_reset (cmdtp, flag, argc, argv); } -#if defined(CONFIG_B2) || defined(CONFIG_EVB4510) +#if defined(CONFIG_B2) || defined(CONFIG_EVB4510) || defined(CONFIG_ARMADILLO) /* *we need to copy the ramdisk to SRAM to let Linux boot */ |