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-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/sh/pr51244-10.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/sh/pr51244-10.c b/gcc-4.9/gcc/testsuite/gcc.target/sh/pr51244-10.c
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index 000000000..ef16b75ff
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/sh/pr51244-10.c
@@ -0,0 +1,27 @@
+/* Check that compare-branch is inverted properly.
+ In this case the improved bit test is a side effect of compare-branch
+ inversion patterns, even though the branch condition does not get
+ inverted here.
+ Example:
+ mov.b @(14,r9),r0 -> mov.b @(14,r9),r0
+ shll r0 cmp/pz r0
+ subc r0,r0 bt .L192
+ and #1,r0
+ tst r0,r0
+ bt .L195
+*/
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
+/* { dg-final { scan-assembler-not "shll|subc|and" } } */
+int
+test_00 (int* p)
+{
+ int nr = 15;
+ volatile char* addr = (volatile char*)&p[1];
+
+ if ((addr[(nr >> 3) ^ 7] & (1 << (nr & 7))) == 0)
+ return 40;
+ else
+ return 50;
+}