diff options
Diffstat (limited to 'gcc-4.9/gcc/config/i386')
| -rw-r--r-- | gcc-4.9/gcc/config/i386/avx512fintrin.h | 32 | ||||
| -rw-r--r-- | gcc-4.9/gcc/config/i386/i386.c | 2 | ||||
| -rw-r--r-- | gcc-4.9/gcc/config/i386/ia32intrin.h | 14 | ||||
| -rw-r--r-- | gcc-4.9/gcc/config/i386/sse.md | 14 |
4 files changed, 35 insertions, 27 deletions
diff --git a/gcc-4.9/gcc/config/i386/avx512fintrin.h b/gcc-4.9/gcc/config/i386/avx512fintrin.h index 314895ad7..c4caa5ae6 100644 --- a/gcc-4.9/gcc/config/i386/avx512fintrin.h +++ b/gcc-4.9/gcc/config/i386/avx512fintrin.h @@ -8103,6 +8103,22 @@ _mm512_stream_load_si512 (void *__P) return __builtin_ia32_movntdqa512 ((__v8di *)__P); } +/* Constants for mantissa extraction */ +typedef enum +{ + _MM_MANT_NORM_1_2, /* interval [1, 2) */ + _MM_MANT_NORM_p5_2, /* interval [0.5, 2) */ + _MM_MANT_NORM_p5_1, /* interval [0.5, 1) */ + _MM_MANT_NORM_p75_1p5 /* interval [0.75, 1.5) */ +} _MM_MANTISSA_NORM_ENUM; + +typedef enum +{ + _MM_MANT_SIGN_src, /* sign = sign(SRC) */ + _MM_MANT_SIGN_zero, /* sign = 0 */ + _MM_MANT_SIGN_nan /* DEST = NaN if sign(SRC) = 1 */ +} _MM_MANTISSA_SIGN_ENUM; + #ifdef __OPTIMIZE__ extern __inline __m128 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) @@ -8182,22 +8198,6 @@ _mm512_maskz_getexp_round_pd (__mmask8 __U, __m512d __A, const int __R) (__mmask8) __U, __R); } -/* Constants for mantissa extraction */ -typedef enum -{ - _MM_MANT_NORM_1_2, /* interval [1, 2) */ - _MM_MANT_NORM_p5_2, /* interval [0.5, 2) */ - _MM_MANT_NORM_p5_1, /* interval [0.5, 1) */ - _MM_MANT_NORM_p75_1p5 /* interval [0.75, 1.5) */ -} _MM_MANTISSA_NORM_ENUM; - -typedef enum -{ - _MM_MANT_SIGN_src, /* sign = sign(SRC) */ - _MM_MANT_SIGN_zero, /* sign = 0 */ - _MM_MANT_SIGN_nan /* DEST = NaN if sign(SRC) = 1 */ -} _MM_MANTISSA_SIGN_ENUM; - extern __inline __m512d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_getmant_round_pd (__m512d __A, _MM_MANTISSA_NORM_ENUM __B, diff --git a/gcc-4.9/gcc/config/i386/i386.c b/gcc-4.9/gcc/config/i386/i386.c index df504335e..70f18ad7b 100644 --- a/gcc-4.9/gcc/config/i386/i386.c +++ b/gcc-4.9/gcc/config/i386/i386.c @@ -6556,7 +6556,7 @@ classify_argument (enum machine_mode mode, const_tree type, bit_offset); if (!num) return 0; - for (i = 0; i < num; i++) + for (i = 0; i < num && i < words; i++) classes[i] = merge_classes (subclasses[i], classes[i]); } } diff --git a/gcc-4.9/gcc/config/i386/ia32intrin.h b/gcc-4.9/gcc/config/i386/ia32intrin.h index 5e7c893fe..614b0fab2 100644 --- a/gcc-4.9/gcc/config/i386/ia32intrin.h +++ b/gcc-4.9/gcc/config/i386/ia32intrin.h @@ -256,11 +256,7 @@ __writeeflags (unsigned long long X) #define _bswap64(a) __bswapq(a) #define _popcnt64(a) __popcntq(a) -#define _lrotl(a,b) __rolq((a), (b)) -#define _lrotr(a,b) __rorq((a), (b)) #else -#define _lrotl(a,b) __rold((a), (b)) -#define _lrotr(a,b) __rord((a), (b)) /* Read flags register */ extern __inline unsigned int @@ -280,6 +276,16 @@ __writeeflags (unsigned int X) #endif +/* On LP64 systems, longs are 64-bit. Use the appropriate rotate + * function. */ +#ifdef __LP64__ +#define _lrotl(a,b) __rolq((a), (b)) +#define _lrotr(a,b) __rorq((a), (b)) +#else +#define _lrotl(a,b) __rold((a), (b)) +#define _lrotr(a,b) __rord((a), (b)) +#endif + #define _bit_scan_forward(a) __bsfd(a) #define _bit_scan_reverse(a) __bsrd(a) #define _bswap(a) __bswapd(a) diff --git a/gcc-4.9/gcc/config/i386/sse.md b/gcc-4.9/gcc/config/i386/sse.md index 27ade1964..b60a8226d 100644 --- a/gcc-4.9/gcc/config/i386/sse.md +++ b/gcc-4.9/gcc/config/i386/sse.md @@ -5887,9 +5887,10 @@ (match_operand 5 "const_0_to_15_operand")])) (match_operand:<ssequartermode> 6 "memory_operand" "0") (match_operand:QI 7 "register_operand" "Yk")))] - "TARGET_AVX512F && (INTVAL (operands[2]) = INTVAL (operands[3]) - 1) - && (INTVAL (operands[3]) = INTVAL (operands[4]) - 1) - && (INTVAL (operands[4]) = INTVAL (operands[5]) - 1)" + "TARGET_AVX512F + && (INTVAL (operands[2]) == (INTVAL (operands[3]) - 1) + && INTVAL (operands[3]) == (INTVAL (operands[4]) - 1) + && INTVAL (operands[4]) == (INTVAL (operands[5]) - 1))" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextract<shuffletype>32x4\t{%2, %1, %0%{%7%}|%0%{%7%}, %1, %2}"; @@ -5909,9 +5910,10 @@ (match_operand 3 "const_0_to_15_operand") (match_operand 4 "const_0_to_15_operand") (match_operand 5 "const_0_to_15_operand")])))] - "TARGET_AVX512F && (INTVAL (operands[2]) = INTVAL (operands[3]) - 1) - && (INTVAL (operands[3]) = INTVAL (operands[4]) - 1) - && (INTVAL (operands[4]) = INTVAL (operands[5]) - 1)" + "TARGET_AVX512F + && (INTVAL (operands[2]) == (INTVAL (operands[3]) - 1) + && INTVAL (operands[3]) == (INTVAL (operands[4]) - 1) + && INTVAL (operands[4]) == (INTVAL (operands[5]) - 1))" { operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2); return "vextract<shuffletype>32x4\t{%2, %1, %0<mask_operand6>|%0<mask_operand6>, %1, %2}"; |