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| author | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
|---|---|---|
| committer | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
| commit | 1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch) | |
| tree | c607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/testsuite/gcc.target/sparc/fpmul.c | |
| parent | 283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff) | |
| download | toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.gz toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.bz2 toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.zip | |
Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/sparc/fpmul.c')
| -rw-r--r-- | gcc-4.9/gcc/testsuite/gcc.target/sparc/fpmul.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/sparc/fpmul.c b/gcc-4.9/gcc/testsuite/gcc.target/sparc/fpmul.c new file mode 100644 index 000000000..71b3b17ac --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/sparc/fpmul.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-mcpu=ultrasparc -mvis" } */ +typedef int vec32 __attribute__((vector_size(8))); +typedef short vec16 __attribute__((vector_size(8))); +typedef unsigned char pixel __attribute__((vector_size(4))); +typedef short pixel16 __attribute__((vector_size(4))); +typedef unsigned char vec8 __attribute__((vector_size(8))); + +vec16 foo1 (pixel a, vec16 b) { + return __builtin_vis_fmul8x16 (a, b); +} + +vec16 foo2 (pixel a, pixel16 b) { + return __builtin_vis_fmul8x16au (a, b); +} + +vec16 foo3 (pixel a, pixel16 b) { + return __builtin_vis_fmul8x16al (a, b); +} + +vec16 foo4 (vec8 a, vec16 b) { + return __builtin_vis_fmul8sux16 (a, b); +} + +vec16 foo5 (vec8 a, vec16 b) { + return __builtin_vis_fmul8ulx16 (a, b); +} + +vec32 foo6 (pixel a, pixel16 b) { + return __builtin_vis_fmuld8sux16 (a, b); +} + +vec32 foo7 (pixel a, pixel16 b) { + return __builtin_vis_fmuld8ulx16 (a, b); +} + +/* { dg-final { scan-assembler "fmul8x16\t%" } } */ +/* { dg-final { scan-assembler "fmul8x16au\t%" } } */ +/* { dg-final { scan-assembler "fmul8x16al\t%" } } */ +/* { dg-final { scan-assembler "fmul8sux16\t%" } } */ +/* { dg-final { scan-assembler "fmul8ulx16\t%" } } */ +/* { dg-final { scan-assembler "fmuld8sux16\t%" } } */ +/* { dg-final { scan-assembler "fmuld8ulx16\t%" } } */ |