Initial checkin of GCC 4.9.0 from trunk (r208799).

Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba

1 files changed, 30 insertions, 0 deletions

diff --git a/gcc-4.9/gcc/testsuite/gcc.dg/tree-ssa/pr38533.c b/gcc-4.9/gcc/testsuite/gcc.dg/tree-ssa/pr38533.c
new file mode 100644
index 000000000..a80a5a813
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.dg/tree-ssa/pr38533.c
@@ -0,0 +1,30 @@
+/* PR middle-end/38533 */
+/* { dg-do compile } */
+/* { dg-options "-O2 --param tree-reassoc-width=1 -fdump-tree-reassoc1" } */
+
+#define A asm volatile ("" : "=r" (f) : "0" (0)); e |= f;
+#define B A A A A A A A A A A A
+#define C B B B B B B B B B B B
+
+int
+foo (void)
+{
+  int e = 0, f;
+  C C B B B B B A A A A A A
+  return e;
+}
+
+int
+main (void)
+{
+  if (foo ())
+    __builtin_abort ();
+  return 0;
+}
+
+/* Verify that reassoc hasn't increased register pressure too much
+   by moving all bitwise ors after the last __asm__.  There should
+   be exactly 2 (first) __asm__ stmts with no intervening stmts,
+   all others should have some bitwise or in between.  */
+/* { dg-final { scan-tree-dump-times "__asm__\[^;\n]*;\n *__asm__" 1 "reassoc1"} } */
+/* { dg-final { cleanup-tree-dump "reassoc1" } } */