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authorRong Xu <xur@google.com>2014-09-02 15:29:57 -0700
committerRong Xu <xur@google.com>2014-09-02 15:29:57 -0700
commite97c99f15937e5762a973b25192aab824126a6d3 (patch)
tree7f0be3ff7c7d976af06887dc50accd68f7630a7f /gcc-4.9/gcc/simplify-rtx.c
parentf1c18afafc2b321465ae6b07ede127095942d7dc (diff)
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[gcc-4.9] Merge svn r214745 from google/gcc-4_9 branch.
Merge gcc-4_9 source r214745 from google/gcc-4_9 branch. Change-Id: Ie6fa0fd72f4b4eec3adc4db4bb922e652d1c2605
Diffstat (limited to 'gcc-4.9/gcc/simplify-rtx.c')
-rw-r--r--gcc-4.9/gcc/simplify-rtx.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/simplify-rtx.c b/gcc-4.9/gcc/simplify-rtx.c
index 04af01e6e..c64de3178 100644
--- a/gcc-4.9/gcc/simplify-rtx.c
+++ b/gcc-4.9/gcc/simplify-rtx.c
@@ -3330,6 +3330,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
prefer left rotation, if op1 is from bitsize / 2 + 1 to
bitsize - 1, use other direction of rotate with 1 .. bitsize / 2 - 1
amount instead. */
+#if defined(HAVE_rotate) && defined(HAVE_rotatert)
if (CONST_INT_P (trueop1)
&& IN_RANGE (INTVAL (trueop1),
GET_MODE_BITSIZE (mode) / 2 + (code == ROTATE),
@@ -3337,6 +3338,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
return simplify_gen_binary (code == ROTATE ? ROTATERT : ROTATE,
mode, op0, GEN_INT (GET_MODE_BITSIZE (mode)
- INTVAL (trueop1)));
+#endif
/* FALLTHRU */
case ASHIFTRT:
if (trueop1 == CONST0_RTX (mode))