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authorRong Xu <xur@google.com>2014-08-06 17:50:42 -0700
committerRong Xu <xur@google.com>2014-08-06 17:50:42 -0700
commitf1c18afafc2b321465ae6b07ede127095942d7dc (patch)
tree812093eebfa8510367718c12c02f7da03c0e73bf /gcc-4.9/gcc/sched-deps.c
parent38a8aecfb882072900434499696b5c32a2274515 (diff)
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[gcc-4.9] Merge svn r213650 from google/gcc-4_9 branch
Merge svn r213650 from google/gcc-4_9 branch. Tested with arm,x86,mips,arm64,x86_64,mips64 build in liunux/windows. Change-Id: I0c07f67d516074172aa393003eee664d01f2e0f2
Diffstat (limited to 'gcc-4.9/gcc/sched-deps.c')
-rw-r--r--gcc-4.9/gcc/sched-deps.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc-4.9/gcc/sched-deps.c b/gcc-4.9/gcc/sched-deps.c
index efc422308..df29bd30b 100644
--- a/gcc-4.9/gcc/sched-deps.c
+++ b/gcc-4.9/gcc/sched-deps.c
@@ -2750,7 +2750,8 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx insn)
Consider for instance a volatile asm that changes the fpu rounding
mode. An insn should not be moved across this even if it only uses
pseudo-regs because it might give an incorrectly rounded result. */
- if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
+ if ((code != ASM_OPERANDS || MEM_VOLATILE_P (x))
+ && !DEBUG_INSN_P (insn))
reg_pending_barrier = TRUE_BARRIER;
/* For all ASM_OPERANDS, we must traverse the vector of input operands.