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author | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
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committer | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
commit | 1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch) | |
tree | c607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/config/rs6000/xilinx.h | |
parent | 283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff) | |
download | toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.gz toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.bz2 toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.zip |
Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/config/rs6000/xilinx.h')
-rw-r--r-- | gcc-4.9/gcc/config/rs6000/xilinx.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/config/rs6000/xilinx.h b/gcc-4.9/gcc/config/rs6000/xilinx.h new file mode 100644 index 000000000..7041208b2 --- /dev/null +++ b/gcc-4.9/gcc/config/rs6000/xilinx.h @@ -0,0 +1,47 @@ +/* Support for GCC on Xilinx embedded PowerPC systems + Copyright (C) 2008-2014 Free Software Foundation, Inc. + Contributed by Michael Eager, eager@eagercon.com + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + <http://www.gnu.org/licenses/>. */ + +/* Set defaults for Xilinx embedded target boards. */ + +#undef CPP_SPEC +#define CPP_SPEC "\ +-mxilinx-fpu \ +%{mfpu=sp_lite: -DHAVE_XFPU_SP_LITE} \ +%{mfpu=sp_full: -DHAVE_XFPU_SP_FULL} \ +%{mfpu=dp_lite: -DHAVE_XFPU_DP_LITE} \ +%{mfpu=dp_full: -DHAVE_XFPU_DP_FULL} \ +%{mfpu=*: -DHAVE_XFPU}" + +#undef LIB_DEFAULT_SPEC +#define LIB_DEFAULT_SPEC "\ +%{!nostdlib: --start-group -lxil -lc -lm --end-group \ +%{mppcperflib: %{mfpu=*: -lppcstr405 -lgcc} \ +%{!mfpu=*: -lppcstr405 -lppcfp -lgcc}} \ +%{!mppcperflib: -lgcc}}" + +#undef STARTFILE_DEFAULT_SPEC +#define STARTFILE_DEFAULT_SPEC "\ +ecrti.o%s %{pg: %{!mno-clearbss: xil-pgcrt0.o%s} \ +%{mno-clearbss: xil-sim-pgcrt0.o%s}} \ +%{!pg: %{!mno-clearbss: xil-crt0.o%s} \ +%{mno-clearbss: xil-sim-crt0.o%s}} crtbegin.o%s" + +#undef LINK_START_DEFAULT_SPEC +#define LINK_START_DEFAULT_SPEC "-T xilinx.ld%s" |