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| author | Ben Cheng <bccheng@google.com> | 2014-04-22 13:33:12 -0700 |
|---|---|---|
| committer | Ben Cheng <bccheng@google.com> | 2014-04-22 13:33:12 -0700 |
| commit | e3cc64dec20832769406aa38cde83c7dd4194bf4 (patch) | |
| tree | ef8e39be37cfe0cb69d850043b7924389ff17164 /gcc-4.9/gcc/config/rs6000/constraints.md | |
| parent | f33c7b3122b1d7950efa88067c9a156229ba647b (diff) | |
| download | toolchain_gcc-e3cc64dec20832769406aa38cde83c7dd4194bf4.tar.gz toolchain_gcc-e3cc64dec20832769406aa38cde83c7dd4194bf4.tar.bz2 toolchain_gcc-e3cc64dec20832769406aa38cde83c7dd4194bf4.zip | |
[4.9] GCC 4.9.0 official release refresh
Change-Id: Ic99a7da8b44b789a48aeec93b33e93944d6e6767
Diffstat (limited to 'gcc-4.9/gcc/config/rs6000/constraints.md')
| -rw-r--r-- | gcc-4.9/gcc/config/rs6000/constraints.md | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/config/rs6000/constraints.md b/gcc-4.9/gcc/config/rs6000/constraints.md index 50fb101e8..9d6a3bbe7 100644 --- a/gcc-4.9/gcc/config/rs6000/constraints.md +++ b/gcc-4.9/gcc/config/rs6000/constraints.md @@ -106,6 +106,11 @@ (define_register_constraint "wz" "rs6000_constraints[RS6000_CONSTRAINT_wz]" "Floating point register if the LFIWZX instruction is enabled or NO_REGS.") +(define_constraint "wD" + "Int constant that is the element number of the 64-bit scalar in a vector." + (and (match_code "const_int") + (match_test "TARGET_VSX && (ival == VECTOR_ELEMENT_SCALAR_64BIT)"))) + ;; Lq/stq validates the address for load/store quad (define_memory_constraint "wQ" "Memory operand suitable for the load/store quad instructions" |