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author | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
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committer | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
commit | 1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch) | |
tree | c607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/config/mcore/mcore.opt | |
parent | 283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff) | |
download | toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.gz toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.bz2 toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.zip |
Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/config/mcore/mcore.opt')
-rw-r--r-- | gcc-4.9/gcc/config/mcore/mcore.opt | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/config/mcore/mcore.opt b/gcc-4.9/gcc/config/mcore/mcore.opt new file mode 100644 index 000000000..47f601e31 --- /dev/null +++ b/gcc-4.9/gcc/config/mcore/mcore.opt @@ -0,0 +1,75 @@ +; Options for the Motorola MCore port of the compiler. + +; Copyright (C) 2005-2014 Free Software Foundation, Inc. +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License as published by the Free +; Software Foundation; either version 3, or (at your option) any later +; version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT ANY +; WARRANTY; without even the implied warranty of MERCHANTABILITY or +; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +; for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING3. If not see +; <http://www.gnu.org/licenses/>. + +m210 +Target RejectNegative Report InverseMask(M340) +Generate code for the M*Core M210 + +m340 +Target RejectNegative Report Mask(M340) +Generate code for the M*Core M340 + +m4byte-functions +Target Report Mask(OVERALIGN_FUNC) +Force functions to be aligned to a 4 byte boundary + +mbig-endian +Target RejectNegative Report InverseMask(LITTLE_END) +Generate big-endian code + +mcallgraph-data +Target Report Mask(CG_DATA) +Emit call graph information + +mdiv +Target Report Mask(DIV) +Use the divide instruction + +mhardlit +Target Report Mask(HARDLIT) +Inline constants if it can be done in 2 insns or less + +mlittle-endian +Target RejectNegative Report Mask(LITTLE_END) +Generate little-endian code + +; Not used by the compiler proper. +mno-lsim +Target RejectNegative +Assume that run-time support has been provided, so omit -lsim from the linker command line + +mrelax-immediates +Target Report Mask(RELAX_IMM) +Use arbitrary sized immediates in bit operations + +mslow-bytes +Target Report Mask(SLOW_BYTES) +Prefer word accesses over byte accesses + +; Maximum size we are allowed to grow the stack in a single operation. +; If we want more, we must do it in increments of at most this size. +; If this value is 0, we don't check at all. +mstack-increment= +Target RejectNegative Joined UInteger Var(mcore_stack_increment) Init(STACK_UNITS_MAXSTEP) +Set the maximum amount for a single stack increment operation + +mwide-bitfields +Target Report Mask(W_FIELD) +Always treat bitfields as int-sized |