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| author | Ben Cheng <bccheng@google.com> | 2012-10-01 10:30:31 -0700 |
|---|---|---|
| committer | Ben Cheng <bccheng@google.com> | 2012-10-01 10:30:31 -0700 |
| commit | 82bcbebce43f0227f506d75a5b764b6847041bae (patch) | |
| tree | fe9f8597b48a430c4daeb5123e3e8eb28e6f9da9 /gcc-4.7/gcc/testsuite/gcc.target/i386/pr39543-3.c | |
| parent | 3c052de3bb16ac53b6b6ed659ec7557eb84c7590 (diff) | |
| download | toolchain_gcc-82bcbebce43f0227f506d75a5b764b6847041bae.tar.gz toolchain_gcc-82bcbebce43f0227f506d75a5b764b6847041bae.tar.bz2 toolchain_gcc-82bcbebce43f0227f506d75a5b764b6847041bae.zip | |
Initial check-in of gcc 4.7.2.
Change-Id: I4a2f5a921c21741a0e18bda986d77e5f1bef0365
Diffstat (limited to 'gcc-4.7/gcc/testsuite/gcc.target/i386/pr39543-3.c')
| -rw-r--r-- | gcc-4.7/gcc/testsuite/gcc.target/i386/pr39543-3.c | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/gcc-4.7/gcc/testsuite/gcc.target/i386/pr39543-3.c b/gcc-4.7/gcc/testsuite/gcc.target/i386/pr39543-3.c new file mode 100644 index 000000000..4e103e671 --- /dev/null +++ b/gcc-4.7/gcc/testsuite/gcc.target/i386/pr39543-3.c @@ -0,0 +1,42 @@ +/* PR inline-asm/39543 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int s[128]; + +void +f1 (void) +{ + int i; + asm volatile ("# %0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16 %17" + : "=r" (i) + : "m" (s[0]), "m" (s[2]), "m" (s[4]), "m" (s[6]), "m" (s[8]), + "m" (s[10]), "m" (s[12]), "m" (s[14]), "m" (s[16]), "m" (s[18]), + "m" (s[20]), "m" (s[22]), "m" (s[24]), "m" (s[26]), "m" (s[28]), + "m" (s[30]), "m" (s[32])); + asm volatile ("# %0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16 %17" + : "=r" (i) + : "m" (s[0]), "m" (s[2]), "m" (s[4]), "m" (s[6]), "m" (s[8]), + "m" (s[10]), "m" (s[12]), "m" (s[14]), "m" (s[16]), "m" (s[18]), + "m" (s[20]), "m" (s[22]), "m" (s[24]), "m" (s[26]), "m" (s[28]), + "m" (s[30]), "m" (s[32])); +} + +void +f2 (int *q) +{ + int i; + int *p = q + 32; + asm volatile ("# %0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16 %17" + : "=r" (i) + : "m" (p[0]), "m" (p[2]), "m" (p[4]), "m" (p[6]), "m" (p[8]), + "m" (p[10]), "m" (p[12]), "m" (p[14]), "m" (p[16]), "m" (p[18]), + "m" (p[20]), "m" (p[22]), "m" (p[24]), "m" (p[26]), "m" (p[28]), + "m" (p[30]), "m" (p[32])); + asm volatile ("# %0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16 %17" + : "=r" (i) + : "m" (p[0]), "m" (p[2]), "m" (p[4]), "m" (p[6]), "m" (p[8]), + "m" (p[10]), "m" (p[12]), "m" (p[14]), "m" (p[16]), "m" (p[18]), + "m" (p[20]), "m" (p[22]), "m" (p[24]), "m" (p[26]), "m" (p[28]), + "m" (p[30]), "m" (p[32])); +} |