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| author | Jing Yu <jingyu@google.com> | 2011-12-19 16:56:54 -0800 |
|---|---|---|
| committer | Jing Yu <jingyu@google.com> | 2011-12-19 16:56:54 -0800 |
| commit | 40d7cd0fd78fe2004e2a53c4618c148339b02733 (patch) | |
| tree | 5874557a6c86a1f564a03e5f28b266e31bc3759c /gcc-4.6/libjava/sysdep/alpha | |
| parent | fe2afdf3f3701489c05d2a7509752d6f0c7616f7 (diff) | |
| download | toolchain_gcc-40d7cd0fd78fe2004e2a53c4618c148339b02733.tar.gz toolchain_gcc-40d7cd0fd78fe2004e2a53c4618c148339b02733.tar.bz2 toolchain_gcc-40d7cd0fd78fe2004e2a53c4618c148339b02733.zip | |
Add gcc-4.6. Synced to @180989
Change-Id: Ie3676586e1d8e3c8cd9f07d022f450d05fa08439
svn://gcc.gnu.org/svn/gcc/branches/google/gcc-4_6-mobile
Diffstat (limited to 'gcc-4.6/libjava/sysdep/alpha')
| -rw-r--r-- | gcc-4.6/libjava/sysdep/alpha/locks.h | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/gcc-4.6/libjava/sysdep/alpha/locks.h b/gcc-4.6/libjava/sysdep/alpha/locks.h new file mode 100644 index 000000000..a6b439408 --- /dev/null +++ b/gcc-4.6/libjava/sysdep/alpha/locks.h @@ -0,0 +1,69 @@ +// locks.h - Thread synchronization primitives. Alpha implementation. + +/* Copyright (C) 2002 Free Software Foundation + + This file is part of libgcj. + +This software is copyrighted work licensed under the terms of the +Libgcj License. Please consult the file "LIBGCJ_LICENSE" for +details. */ + +#ifndef __SYSDEP_LOCKS_H__ +#define __SYSDEP_LOCKS_H__ + +typedef size_t obj_addr_t; /* Integer type big enough for object */ + /* address. */ + +inline static bool +compare_and_swap(volatile obj_addr_t *addr, + obj_addr_t old, + obj_addr_t new_val) +{ + unsigned long oldval; + char result; + __asm__ __volatile__( + "1:ldq_l %0, %1\n\t" \ + "cmpeq %0, %5, %2\n\t" \ + "beq %2, 2f\n\t" \ + "mov %3, %0\n\t" \ + "stq_c %0, %1\n\t" \ + "bne %0, 2f\n\t" \ + "br 1b\n\t" \ + "2:mb" + : "=&r"(oldval), "=m"(*addr), "=&r"(result) + : "r" (new_val), "m"(*addr), "r"(old) : "memory"); + return (bool) result; +} + +inline static void +release_set(volatile obj_addr_t *addr, obj_addr_t new_val) +{ + __asm__ __volatile__("mb" : : : "memory"); + *(addr) = new_val; +} + +inline static bool +compare_and_swap_release(volatile obj_addr_t *addr, + obj_addr_t old, + obj_addr_t new_val) +{ + return compare_and_swap(addr, old, new_val); +} + +// Ensure that subsequent instructions do not execute on stale +// data that was loaded from memory before the barrier. +inline static void +read_barrier() +{ + __asm__ __volatile__("mb" : : : "memory"); +} + +// Ensure that prior stores to memory are completed with respect to other +// processors. +inline static void +write_barrier() +{ + __asm__ __volatile__("wmb" : : : "memory"); +} + +#endif |
