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* Rename '--fix-cortex-a53' to '--fix-cortex-a53-843419'.Han Shen2015-04-283-8/+13
| | | | | | | | | | | | | | Keep gold consistent with bfd erratum-fixing option names, so as to ease life in Makefile/scripts. gold/ * options.h (--fix-cortex-a53-843419): Rename option. * aarch64.cc (AArch64_relobj::do_count_local_symbols): Use renamed option. (AArch64_relobj::scan_sections_for_stubs): Use renamed option. Change-Id: I8941fb38ef34fa5eb297e83725d87fdee994fc3a
* The first patch to address cortex-a53 erratum-843419.Han Shen2015-04-283-2/+600
| | | | | | | | | | | | | | | | | | | | | | It implemented scanning the binary and reporting occurrences to users when '--fix-cortex-a53' is turned on. With this, gold users will be able to see if or not there are such erratum occurrences in the output binary. Also included in the CL is reading/recording mapping symbols, which is needed during scan. gold/ChangeLog: * aarch64.cc (AArch64_insn_utilities): New utility class. (AArch64_relobj::Mapping_symbol_position): New struct. (AArch64_relobj::Mapping_symbol_info): New typedef. (AArch64_relobj::do_count_local_symbols): New function overriding parent's implementation. (AArch64_relobj::mapping_symbol_info_): New member (AArch64_relobj::scan_erratum_843419): New method. (Target_aarch64::scan_erratum_843419_span): New method. (Target_aarch64::is_erratum_843419_sequence): New method. * options.h (fix_cortex_a53): New option. Change-Id: I4fe7a2b8858cda358ac28eede42cd5a2f49c2238
* [2.24, 2.25] Convert mov foo@GOT(%reg), %reg to lea foo@GOTOFF(%reg), %regAlexander Ivchenko2015-04-2116-66/+470
| | | | | | | | | | | | | | | | | | | | | | 2015-04-01 Ilya Tocar <ilya.tocar@intel.com> PR gold/17640 * i386.cc (Target_i386::can_convert_mov_to_lea): New. (Target_i386::Scan::local): Don't create GOT entry, when we can convert GOT to GOTOFF. (Target_i386::Scan::global): Ditto. (Target_i386::Relocate::relocate): Convert mov foo@GOT(%reg), %reg to lea foo@GOTOFF(%reg), %reg if possible. * testsuite/Makefile.am (i386_mov_to_lea): New test. * testsuite/i386_mov_to_lea1.s: New. * testsuite/i386_mov_to_lea2.s: Ditto. * testsuite/i386_mov_to_lea3.s: Ditto. * testsuite/i386_mov_to_lea4.s: Ditto. * testsuite/i386_mov_to_lea5.s: Ditto. * testsuite/i386_mov_to_lea.sh: Ditto. Change-Id: I7916a1da20873600a910ce358990b1fe2c1f9897 Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
* Ignore --fix-cortex-a53-843419 for gold.Lai Wei-Chih2015-04-061-0/+3
| | | | Change-Id: I7664f43e31327f2f9bb97b0eaad584f80948d4fe
* [AArch64] Workaround for cortex-a53 erratum 843419Marcus Shawcroft2015-03-309-14/+639
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround the erratum. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written. 2015-03-30 Tejas Belagod <tejas.belagod@arm.com> Marcus Shawcroft <marcus.shawcroft@arm.com> Jiong Wang <jiong.wang@arm.com> * bfd-in.h (bfd_elf64_aarch64_set_options) (bfd_elf32_aarch64_set_options): Add parameter. * bfd-in2.h: Regenerated. * elfnn-aarch64.c (aarch64_erratum_843419_stub) (_bfd_aarch64_adrp_p, _bfd_aarch64_erratum_843419_sequence_p) (_bfd_aarch64_erratum_843419_stub_name) (_bfd_aarch64_erratum_843419_fixup) (_bfd_aarch64_erratum_843419_scan) (_bfd_aarch64_erratum_843419_branch_to_stub) (_bfd_aarch64_erratum_843419_p): Define. (enum elf_aarch64_stub_type): Define aarch64_stub_erratum_843419_veneer. (struct elf_aarch64_stub_hash_entry): Define adrp_offset. (struct elf_aarch64_link_hash_table): Define fix_erratum_843419 and fix_erratum_843419_adr. (stub_hash_newfunc): Initialize adrp_offset; (_bfd_aarch64_add_stub_entry_after): Define. (aarch64_map_one_stub, aarch64_build_one_stub) (aarch64_size_one_stub): Handle aarch64_stub_erratum_843419_veneer. (_bfd_aarch64_resize_stubs): Round stub section size. (elfNN_aarch64_size_stubs): Add scan for 843419. (bfd_elfNN_aarch64_set_options): Add parameter. Initialize fix_erratum_843419 and fix_erratum_843419_adr. (struct erratum_835769_branch_to_stub_data): Add info. (elfNN_aarch64_write_section): Initialise info. Handle 843419. (elfNN_aarch64_size_dynamic_sections): Handle 843419. * elfxx-aarch64.c (_bfd_aarch64_decode_adrp_imm) (_bfd_aarch64_sign_extend): Define. (reencode_adr_imm): Remove static. Rename to: (_bfd_aarch64_reencode_adr_imm): Define. (_bfd_aarch64_elf_put_addend): Call _bfd_aarch64_reencode_adr_imm. * elfxx-aarch64.h (AARCH64_ADR_OP, AARCH64_ADRP_OP) (AARCH64_ADRP_OP_MASK, _bfd_aarch64_sign_extend) (_bfd_aarch64_decode_adrp_imm, _bfd_aarch64_reencode_adr_imm): Define. ld/testsuite: 2015-03-24 Tejas Belagod <tejas.belagod@arm.com> * emultempl/aarch64elf.em (aarch64_elf_create_output_section_statements): Add parameter in bfd_elf${ELFSIZE}_aarch64_set_options call. (OPTION_FIX_ERRATUM_843419): Define. (PARSE_AND_LIST_LONGOPTS): Add fix-cortex-a53-843419. (PARSE_AND_LIST_ARGS_CASES): Add OPTION_FIX_ERRATUM_843419. Change-Id: I758b04c90d431f4e72a978871d5a66676c413d92
* [AArch64] Implement branch over stub section.Marcus Shawcroft2015-03-305-48/+68
| | | | | | | | | | | | | Ensure that injection of a stub section does not break a link where there is an xpectation that flow of control can pass from one input section to another simply by linking the input sections in series. The solution here is to allow stub sections to be inserted after any input section (existing behaviour), but inject an additional branch at the start of each stub section such that control flow falling into the stub section will branch over the stub section. Change-Id: I8ccadcfb2f43e6409cb5a649087a47c0c8826b15
* [AArch64] Remove padding before stub sections.Marcus Shawcroft2015-03-302-2/+1
| | | | | | | Lower stub alignment from 8 to 4 bytes thus removing padding between input section content and stub section content. Change-Id: Ic3afff9bc2f013b4b47e181b269b40231385080a
* [AArch64] Adjust veneer count.Marcus Shawcroft2015-03-301-0/+2
| | | | Change-Id: Idc292f60196ed4bf417eb77acc239761666adb8b
* [AArch64] Factor out _bfd_aarch64_get_stub_for_link_section.Marcus Shawcroft2015-03-301-12/+18
| | | | Change-Id: Ib6171d8646bc0e825a5038c7087acc534a8612a9
* [AArch64] Refactor section_group[] representation.Marcus Shawcroft2015-03-301-12/+3
| | | | | | | | | | | | | Change the behaviour of section_group[] such that .stub_sec points to the stub section attached to the indexed section rather than the stub section attached to the link_section pointed to be the index section. This provides a mechanism to get to the stub section following any input section. While still allowing the section grouping mechanism to find the section group stub section associated with an input section by first following the link_sec pointer. Change-Id: I19bce3feea77bbc71c04f2d8b3a204c527a21d9a
* [AArch64] Refactor generation of 835769 workaround stubs.Marcus Shawcroft2015-03-301-104/+28
| | | | | | | | | | | | | | | | | This patch recognizes that we only need to perform one scan for the 835769 errata and that this scan can take place before we insert branch stubs. The erratum scan code is relocated and adjusted to create stub entries directly rather than populating an intermediate representation. Since stub entries are created immediately we can drop the adhoc stub size adjustment code and allow the generic stub sizing code to deal with 835769 stub entries. This patch restructures the code but does not change the workaround used to deal with erratum 83679, the exact placement of workaround stubs in the final image may change slightly after this patch due to stubs being created in a different order. Change-Id: I1ac3b2b7a8a5faf678a1e375f50f63ab6fd22d1f
* [AArch64] Use _bfd_aarch64_add_stub_entry_in_group.Marcus Shawcroft2015-03-301-15/+5
| | | | | | | | Adjust the 835769 workaround code to use _bfd_aarch64_add_stub_entry_in_group rather than inspect the underlying section_group structure directly. Change-Id: I26e7793af2a8bd6ab57c2b958cec12565d280a8f
* [OBV] Fix build -- missing ';'Keith Seitz2015-03-301-1/+1
| | | | | | | | | bfd/ChangeLog * elfnn-aarch64.c (_bfd_aarch64_create_or_find_stub_sec): Add missing ';'. Change-Id: I174cb391792c428521a9334eb166cdc8c979b12f
* Factor out _bfd_aarch64_erratum_835769_stub_nameMarcus Shawcroft2015-03-301-7/+11
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* [AArch64] Factor out _bfd_aarch64_resize_stubs()Marcus Shawcroft2015-03-301-12/+24
| | | | Change-Id: I3e92b1a8cf997ea7eb902bc38d5163cf919789e0
* [AArch64] Factor stub creation code into _bfd_aarch64_create_stub_section.Marcus Shawcroft2015-03-301-14/+23
| | | | Change-Id: I6f01f9c9c3a64ed8ed52486f0f6f66f66b85a317
* [AArch64] Factor out common behaviour between ↵Marcus Shawcroft2015-03-301-52/+32
| | | | | | elf_aarch64_create_or_find_stub_sec and elfNN_aarch64_add_stub Change-Id: I8e5ce0f4dd3aa322f97fa09d42c6f95e0d45118d
* [AArch64] Flip sense of erratum_835769_scan.Marcus Shawcroft2015-03-301-8/+13
| | | | Change-Id: Ia79975e3ce9f1eca6ae092b4c9e2d92168fde1a0
* [AArch64] Drop unused argument to elf_aarch64_create_or_find_stub_secMarcus Shawcroft2015-03-301-10/+5
| | | | Change-Id: I0454073cfad254ee5e28c5d597d615abdef9331d
* [AArch64] Remove unused variable.Marcus Shawcroft2015-03-301-3/+2
| | | | Change-Id: I5e0be2e412d13fe4a5d738d7949bfb11909783d0
* Remove dead code.Marcus Shawcroft2015-03-301-16/+0
| | | | Change-Id: Iea5ae8c19790beebc6188b094895cbe7c7c221c5
* [AARCH64] Remove Load/Store register (unscaled immediate) alias.Jiong Wang2015-03-307-689/+629
| | | | | | | | | | | | | | | | | | | | | | | opcodes/ChangeLog: 2015-03-10 Renlin Li <renlin.li@arm.com> * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb, stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and related alias. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Likewise. * aarch64-opc-2.c: Likewise. gas/testsuite/ChangeLog: 2015-03-10 Renlin Li <renlin.li@arm.com> * gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output. * gas/aarch64/ldst-reg-unscaled-imm.d: Likewise. * gas/aarch64/reloc-insn.d: Likewise. Change-Id: Ifdaa84564771ef57093943c5778e80570ec04af4
* [AArch64] Removing unused functions.Marcus Shawcroft2015-03-301-42/+0
| | | | | | Removing a group of unused functions from the AArch64 BFD backend. Change-Id: I9dc2a43084f21ee2771d26d32e1a26692018bb5c
* Fixed Cortex-A53 Erratum 835769 -- LD segfaults with unordered maps.Tejas Belagod2015-03-301-0/+27
| | | | | | | | | | | | | | | | | | | The BFD/LD patch for Cortex-A53 erratum 835769 (https://sourceware.org/ml/binutils/2014-10/msg00199.html) does not handle a particular case of the AArch64 ELF ABI where mapping symbols are allowed to be unordered in the symbol table (not in address order). The unordering causes section maps to be traversed with incorrect span boundaries (in the erratum scanning function) which causes memory faults. The attached patch fixes this issue by ordering the section maps by their 'vma' before starting to traverse them. While this is not an issue with a the GNU toolchain, it is a potential issue with Clang/LLVM. We have observed at least one case where LLVM generates an ELF object with mapping symbols unordered in the symbol table and causes a fault. We have been unable to construct a test case with the GNU toolchain. We have verified by manual inspection the correctness of the traversal with this patch for an LLVM-generated ELF object which triggered this issue. This patch has been bootstrapped on aarch64-linux and regressed.
* Backport to fix race condition calling select_as_default_target()Andrew Hsieh2015-03-302-2/+2
| | | | | | | | | | | 2015-03-03 Cary Coutant <ccoutant@google.com> gold/ * parameters.cc (Parameters::set_target_once): Call Target::select_as_default_target just once from here... (set_parameters_target): ...instead of from here. Change-Id: Ic4b1503b1bb453b9812188e0a98482bc489d9197
* Fix as to ignore --save-tempsAndrew Hsieh2015-03-301-0/+7
| | | | | | | | | | | mips/gcc4.6 is now built with binutils-2.24 to be consistant with gcc4.8 and gcc4.9 on nan handling. Unfortunately gcc4.6 pass on -save-temps to not recognized by "as". gcc4.6 is normally built with binutils-2.21 which has fix for as to accept but ignore -save-temps. This CL catptures the same fix in binutils-2.21 Change-Id: I58095a67810f2bcf6e7594383002247a9491a901
* Fix buildAndrew Hsieh2015-03-026-3/+40
| | | | | | | | 1. revert https://android-review.googlesource.com/#/c/38591. 2. add a few constants from ToT 3. fix a typo about pthread_mutexattr_settype Change-Id: I55a829e7907658f920aedbf1100c6d9b1a93052b
* Update binutils-2.25/gold to ToTAndrew Hsieh2015-02-24404-1160/+5554
| | | | | | | | | | | | | commit be66981e1605eff305ac9c561825f4bd6801fca2 Author: H.J. Lu <hjl.tools@gmail.com> Date: Sun Feb 22 05:18:50 2015 -0800 Set GOLD_DEFAULT_SIZE to 32 for x32 * configure.ac (default_size): Set to 32 for x32. * configure: Regenerated. Change-Id: I4b2d8927e4e41cf2fac3c92d00e8aef69b5ce21f
* [2.24][2.25] Fix race condition causing assertRong Xu2015-02-1811-19/+32
| | | | | | | | | | | | | | | | | | | | | | | Backport trunk commit 635aa that fixes race condition causing assert in Eh_frame_hdr::do_sized_write(). 2014-09-23 Taiju Tsuiki <tzik@google.com> Cary Coutant <ccoutant@google.com> gold/ * gold.cc (queue_final_tasks): Add Write_sections_task as a * blocker on input_sections_blocker. * layout.cc (Write_sections_task::locks): Unblock input_sections_blocker_. * layout.h (Write_sections_task::Write_sections_task): Add input_sections_blocker. * testsuite/Makefile.am (exception_x86_64_bnd_test): Add * gcctestdir/ld to DEPENDENCIES. * testsuite/Makefile.in: Regenerate. Change-Id: I17a0f2aaf565b775f92f4806c4abcbea5d2dd803
* Add support for the new tag DT_MIPS_RLD_MAP2.Nikola Veljkovic2014-12-253-3/+34
| | | | | | | DT_MIPS_RLD_MAP2 is used by the loader to communicate shared library information of a PIE to the GDB. Signed-off-by: Raghu Gandham <raghu.gandham@imgtec.com>
* Add MIPS specific changes to binutils 2.25 (prerelease) for MIPSR6 bug fixes,Steve Ellcey2014-12-1825-51/+1488
| | | | MXU support, and a fix to needed by gdbserver.
* [2.25] Fix __preinit_array_start not aligned properly in 64-bit.Lai Wei-Chih2014-12-091-1/+1
| | | | | | | For 64-bit address space, it should be 8-bytes aligned. 'ALIGNMENT' will be expanded to '64 / 8' for 64-bit and '32 / 8' for 32-bit. Change-Id: Ide4cda93afae0535ccc30bff53c67b0d637a4198
* [2.25] re-apply local patchesAndrew Hsieh2014-12-099-38/+215
| | | | | | | | | | | e0bca373a85fa71b89d9ea42370433b3c0499b9d 160ce55a90bcdcb3000d74805795969edc3f8422 b33d0ddc123435be5e60ebb15a37b3bfb651dc7e f25603579c0a04b3d5099259cf54c5b3c8775b78 1000fadfaa979b623e1fbd0c87858be4f5b6dffd 83cabeb81083ac53719eaaf68c48734ff9c48fa9 Change-Id: I15f9c78c69f4cfce7a617b7e9d91dd855b6d8efc
* [2.25] sync to a30720e3e633f275250e26f85ccae5dbdddfb6c6Andrew Hsieh2014-12-094094-126235/+453678
| | | | | | | | | | | | local patches will be re-applied later commit a30720e3e633f275250e26f85ccae5dbdddfb6c6 Author: Alan Modra <amodra@gmail.com> Date: Wed Nov 19 10:30:16 2014 +1030 daily update Change-Id: Ieb2a3f4dd2ecb289ac5305ff08d428b2847494ab
* Fix extraneous warning about executable stack.Cary Coutant2014-12-024-6/+35
| | | | | | | | | | | | | | | | | | | | PR gold/17578 notes that gold will print a warning about an executable stack when the -z execstack option is given, even when there is no --warn_execstack option. The warning is completely useless and unexpected, since the user explicitly requested an executable stack, and did not even ask for warnings. This patch fixes that, and adds an extra warning when --warn_execstack and -z noexecstack are both given and an input file requires an executable stack. gold/ PR gold/17578 * layout.cc (Layout::layout_gnu_stack): Don't warn when -z execstack is given. (Layout::create_executable_stack_info): Warn when -z noexecstack is given but some inputs require executable stack. Change-Id: I7b15682af81d3c52057473d347f83a768e087ffa
* Fixed Cortex-A53 Erratum 835769 -- LD segfaults with unordered maps.Tejas Belagod2014-12-021-0/+27
| | | | | | | | | | | | | | | | | | | | | The BFD/LD patch for Cortex-A53 erratum 835769 (https://sourceware.org/ml/binutils/2014-10/msg00199.html) does not handle a particular case of the AArch64 ELF ABI where mapping symbols are allowed to be unordered in the symbol table (not in address order). The unordering causes section maps to be traversed with incorrect span boundaries (in the erratum scanning function) which causes memory faults. The attached patch fixes this issue by ordering the section maps by their 'vma' before starting to traverse them. While this is not an issue with a the GNU toolchain, it is a potential issue with Clang/LLVM. We have observed at least one case where LLVM generates an ELF object with mapping symbols unordered in the symbol table and causes a fault. We have been unable to construct a test case with the GNU toolchain. We have verified by manual inspection the correctness of the traversal with this patch for an LLVM-generated ELF object which triggered this issue. This patch has been bootstrapped on aarch64-linux and regressed. Change-Id: I75622055b01eeb3038d5600c9eea395585e54aca
* [2.24][2.25] Backport prevent user links ARM ELF binary into an AARCH64 ELF ↵Lai Wei-Chih2014-11-284-0/+18
| | | | | | | | | | | | | | | executable. Prevent the linker from generating a seg-fault when the user attempts to link an ARM ELF binary into an AARCH64 ELF executable. 2014-03-12 Nick Clifton <nickc@redhat.com> PR ld/16671 * elf32-arm.c (elf32_arm_add_symbol_hook): Check for ARM format before testing for vxworks. Change-Id: Ibc81a168b85f70422d428d857b8de0c71e2824ed
* [2.24] Cortex-A53 erratum 835769 linker workaroundRong Xu2014-10-3111-8/+830
| | | | | | | This is ported from upstream binutils 2.24 branch commit: cde98f8566e14f52b896abc92c357cdd14717505 Change-Id: Ic5af0a8a8f77444d418d16713e5d6ae490ee8adf
* Merge "Add missing mtc1, mthc1, mfhc1 instructions to Ingenic's MXU patch."Andrew Hsieh2014-09-033-0/+18
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| * Add missing mtc1, mthc1, mfhc1 instructions to Ingenic's MXU patch.Andrew Bennett2014-08-293-0/+18
| | | | | | | | Change-Id: Ib83ffec3512b8306458d6ea608f730d08f5b1c10
* | Merge "Add support for Ingenic's MXU."Andrew Hsieh2014-09-0311-15/+1209
|\|
| * Add support for Ingenic's MXU.Andrew Bennett2014-08-2911-15/+1209
| | | | | | | | Change-Id: Ibc79d4e05b92b9f23a0b1a381d94c588f56a0749
* | [2.24][2.25] Fix __preinit_array_start not aligned properly in 64-bit.Lai Wei-Chih2014-08-142-2/+2
|/ | | | | | | For 64-bit address space, it should be 8-bytes aligned. 'ALIGNMENT' will be expanded to '64 / 8' for 64-bit and '32 / 8' for 32-bit. Change-Id: I7bbbf04a9b4e68a342201ec7c04f67497e3fa3a1
* Update Binutils 2.24 to include mips32r6, mips64r6 and MSA changes.Steve Ellcey2014-07-03461-2777/+26107
| | | | Change-Id: I24f28bc29dff188ba059388d8d5478f51da56a12
* [2.25] apply local patchesAndrew Hsieh2014-06-1311-69/+275
| | | | | | | | | | | | | | 7a17fb955bb42018c3c84e003700ac120c3502d4 b2a417bdb17191ef2afc20bbd308e308c0730403 e0bca373a85fa71b89d9ea42370433b3c0499b9d 57fbbfbda5a77b558c24a44e7eed8c4030c31bcd 160ce55a90bcdcb3000d74805795969edc3f8422 b33d0ddc123435be5e60ebb15a37b3bfb651dc7e f25603579c0a04b3d5099259cf54c5b3c8775b78 1000fadfaa979b623e1fbd0c87858be4f5b6dffd 83cabeb81083ac53719eaaf68c48734ff9c48fa9 Change-Id: I174be6632426ed720e643bca7c48a9077b31d34b
* Add upstream binutils-2.25 snapshot 4/4 2014Andrew Hsieh2014-06-1314861-0/+4637857
| | | | | | For MIPS -mmsa support Change-Id: I08c4f002fa7b33dec85ed75956e6ab551bb03c96
* Merge "[2.24] Fix assert failure with --emit-relocs and .eh_frame sections ↵Andrew Hsieh2014-06-021-22/+22
|\ | | | | | | by backporting the following patch from mainline:"
| * [2.24] Fix assert failure with --emit-relocs and .eh_frame sections by ↵Alexander Ivchenko2014-06-021-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | backporting the following patch from mainline: 2013-11-06 Cary Coutant <ccoutant@google.com> PR gold/15758 * object.cc (Sized_relobj_file::do_layout): Handle .eh_frame sections before reloc sections. Change-Id: I964471340806597252c5e4695c65a7b87b2ebb39 Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
* | [2.23, 2.24] Backport of two patches for Gold that fix the issue withAlexander Ivchenko2014-05-282-4/+12
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | linking using -fpie and -mcmodel=large. Both patches are already in 2.24 upstream branch. https://sourceware.org/bugzilla/show_bug.cgi?id=16945 https://sourceware.org/bugzilla/show_bug.cgi?id=16870 commit c23dd3426c75fbf7fa9f30a4082be034818967c1 Author: H.J. Lu <hjl.tools@gmail.com> Date: Tue May 27 12:19:33 2014 -0700 Properly handle 64-bit GOT relocations This patch fixes 2 issues: 1. Since the GOT offset is always negative, we need to use signed int to support 64-bit GOT relocations. 2. R_X86_64_PLTOFF64 uses the address of GLOBAL_OFFSET_TABLE, which is the address of the .got.plt section, not the .got section. commit 7849f6d8dc37fc3da2fec06ac1d47afbe4b81059 Author: Cary Coutant <ccoutant@google.com> Date: Wed Apr 23 15:17:16 2014 -0700 Add missing break statement for case elfcpp::R_X86_64_PLTOFF64. gold/ * x86_64.cc (Target_x86_64::Relocate::relocate): Add missing break. Change-Id: Icb3cb1de77a7d467fccb715dc6da83c6d2c5c2a6 Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
* [2.24] fix MIPS static executable segfaultAndrew Hsieh2014-05-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous commit f25603579c0a04b3d5099259cf54c5b3c8775b78 isn't complete because .ctors/.dtors in crtbegin*/crtend* aren't excluded from .init_array/.fini_array. Static executable (eg. $NDK/tests/device/static-executable) causes "Bus Error" because call_array() in __libc_init() call ffffffff from __INIT_ARRAY__ not properly terminaed by NULL. Disassembly of section .init_array: 000b42ac <__INIT_ARRAY__>: b42ac: ff ff ff ff 000b42b0 <__CTOR_LIST__>: b42b0: ff ff ff ff dc 09 08 00 f8 09 08 00 00 00 00 00 000b42c0 <__CTOR_END__>: b42c0: 00 00 00 00 Note that Android uses .init/.fini_array (move away from .ctors/.dtors), but we can't simply remove _CTOR* from crtbegin_static/dynamic.o because older device (eg. ICS) call_array() on CTOR_LIST The correct fix is to exclude them Thanks to icebergfu@gmail.com for identifying the issues. Change-Id: I7a955753baa00fd486cc5a37362ab91c3a21d1e1
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