diff options
Diffstat (limited to 'binutils-2.25/gas/testsuite/gas/nds32')
25 files changed, 841 insertions, 0 deletions
diff --git a/binutils-2.25/gas/testsuite/gas/nds32/alu-1.d b/binutils-2.25/gas/testsuite/gas/nds32/alu-1.d new file mode 100644 index 00000000..f1385cd9 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/alu-1.d @@ -0,0 +1,47 @@ +#objdump: -d --prefix-addresses +#name: nds32 alu_1 instructions +#as: + +# Test alu_1 instructions + +.*: file format .* + +Disassembly of section .text: +0+0000 <[^>]*> add \$r0, \$r1, \$r2 +0+0004 <[^>]*> and \$r0, \$r1, \$r2 +0+0008 <[^>]*> cmovn \$r0, \$r1, \$r2 +0+000c <[^>]*> cmovz \$r0, \$r1, \$r2 +0+0010 <[^>]*> nop +0+0014 <[^>]*> nor \$r0, \$r1, \$r2 +0+0018 <[^>]*> or \$r0, \$r1, \$r2 +0+001c <[^>]*> rotr \$r0, \$r1, \$r2 +0+0020 <[^>]*> rotri \$r0, \$r1, #1 +0+0024 <[^>]*> seb \$r0, \$r1 +0+0028 <[^>]*> seh \$r0, \$r1 +0+002c <[^>]*> sll \$r0, \$r1, \$r2 +0+0030 <[^>]*> slli \$r0, \$r1, #1 +0+0034 <[^>]*> slt \$r0, \$r1, \$r2 +0+0038 <[^>]*> slts \$r0, \$r1, \$r2 +0+003c <[^>]*> sra \$r0, \$r1, \$r2 +0+0040 <[^>]*> srai \$r0, \$r1, #1 +0+0044 <[^>]*> srl \$r0, \$r1, \$r2 +0+0048 <[^>]*> srli \$r0, \$r1, #1 +0+004c <[^>]*> sub \$r0, \$r1, \$r2 +0+0050 <[^>]*> sva \$r0, \$r1, \$r2 +0+0054 <[^>]*> svs \$r0, \$r1, \$r2 +0+0058 <[^>]*> wsbh \$r0, \$r1 +0+005c <[^>]*> xor \$r0, \$r1, \$r2 +0+0060 <[^>]*> zeh \$r0, \$r1 +0+0064 <[^>]*> divr \$r0, \$r1, \$r2, \$r3 +0+0068 <[^>]*> divsr \$r0, \$r1, \$r2, \$r3 +0+006c <[^>]*> add_slli \$r0, \$r1, \$r2, #1 +0+0070 <[^>]*> add_srli \$r0, \$r1, \$r2, #1 +0+0074 <[^>]*> and_slli \$r0, \$r1, \$r2, #1 +0+0078 <[^>]*> and_srli \$r0, \$r1, \$r2, #1 +0+007c <[^>]*> bitc \$r0, \$r1, \$r2 +0+0080 <[^>]*> or_slli \$r0, \$r1, \$r2, #1 +0+0084 <[^>]*> or_srli \$r0, \$r1, \$r2, #1 +0+0088 <[^>]*> sub_slli \$r0, \$r1, \$r2, #1 +0+008c <[^>]*> sub_srli \$r0, \$r1, \$r2, #1 +0+0090 <[^>]*> xor_slli \$r0, \$r1, \$r2, #1 +0+0094 <[^>]*> xor_srli \$r0, \$r1, \$r2, #1 diff --git a/binutils-2.25/gas/testsuite/gas/nds32/alu-1.s b/binutils-2.25/gas/testsuite/gas/nds32/alu-1.s new file mode 100644 index 00000000..5f12783d --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/alu-1.s @@ -0,0 +1,39 @@ +foo: + add $r0, $r1, $r2 + and $r0, $r1, $r2 + cmovn $r0, $r1, $r2 + cmovz $r0, $r1, $r2 + nop + nor $r0, $r1, $r2 + or $r0, $r1, $r2 + rotr $r0, $r1, $r2 + rotri $r0, $r1, 1 + seb $r0, $r1 + seh $r0, $r1 + sll $r0, $r1, $r2 + slli $r0, $r1, 1 + slt $r0, $r1, $r2 + slts $r0, $r1, $r2 + sra $r0, $r1, $r2 + srai $r0, $r1, 1 + srl $r0, $r1, $r2 + srli $r0, $r1, 1 + sub $r0, $r1, $r2 + sva $r0, $r1, $r2 + svs $r0, $r1, $r2 + wsbh $r0, $r1 + xor $r0, $r1, $r2 + zeh $r0, $r1 + divr $r0, $r1, $r2, $r3 + divsr $r0, $r1, $r2, $r3 + add_slli $r0, $r1, $r2, 1 + add_srli $r0, $r1, $r2, 1 + and_slli $r0, $r1, $r2, 1 + and_srli $r0, $r1, $r2, 1 + bitc $r0, $r1, $r2 + or_slli $r0, $r1, $r2, 1 + or_srli $r0, $r1, $r2, 1 + sub_slli $r0, $r1, $r2, 1 + sub_srli $r0, $r1, $r2, 1 + xor_slli $r0, $r1, $r2, 1 + xor_srli $r0, $r1, $r2, 1 diff --git a/binutils-2.25/gas/testsuite/gas/nds32/alu-2.d b/binutils-2.25/gas/testsuite/gas/nds32/alu-2.d new file mode 100644 index 00000000..11c2eb16 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/alu-2.d @@ -0,0 +1,41 @@ +#objdump: -d --prefix-addresses +#name: nds32 alu_2 instructions +#as: + +# Test alu_2 instructions + +.*: file format .* + +Disassembly of section .text: +0+0000 <[^>]*> madd64 \$d0, \$r0, \$r1 +0+0004 <[^>]*> madds64 \$d0, \$r0, \$r1 +0+0008 <[^>]*> mfusr \$r0, \$pc +0+000c <[^>]*> msub64 \$d0, \$r0, \$r1 +0+0010 <[^>]*> msubs64 \$d0, \$r0, \$r1 +0+0014 <[^>]*> mtusr \$r0, \$pc +0+0018 <[^>]*> mul \$r0, \$r1, \$r2 +0+001c <[^>]*> mult32 \$d0, \$r1, \$r2 +0+0020 <[^>]*> mult64 \$d0, \$r1, \$r2 +0+0024 <[^>]*> mults64 \$d0, \$r1, \$r2 +0+0028 <[^>]*> abs \$r0, \$r1 +0+002c <[^>]*> ave \$r0, \$r1, \$r2 +0+0030 <[^>]*> bclr \$r0, \$r1, #1 +0+0034 <[^>]*> bset \$r0, \$r1, #1 +0+0038 <[^>]*> btgl \$r0, \$r1, #1 +0+003c <[^>]*> btst \$r0, \$r1, #1 +0+0040 <[^>]*> clip \$r0, \$r1, #1 +0+0044 <[^>]*> clips \$r0, \$r1, #1 +0+0048 <[^>]*> clo \$r0, \$r1 +0+004c <[^>]*> clz \$r0, \$r1 +0+0050 <[^>]*> max \$r0, \$r1, \$r2 +0+0054 <[^>]*> min \$r0, \$r1, \$r2 +0+0058 <[^>]*> bse \$r0, \$r1, \$r2 +0+005c <[^>]*> bsp \$r0, \$r1, \$r2 +0+0060 <[^>]*> ffb \$r0, \$r1, \$r2 +0+0064 <[^>]*> ffbi \$r0, \$r1, #0x8 +0+0068 <[^>]*> ffmism \$r0, \$r1, \$r2 +0+006c <[^>]*> flmism \$r0, \$r1, \$r2 +0+0070 <[^>]*> maddr32 \$r0, \$r0, \$r1 +0+0074 <[^>]*> msubr32 \$r0, \$r1, \$r2 +0+0078 <[^>]*> mulr64 \$r0, \$r1, \$r2 +0+007c <[^>]*> mulsr64 \$r0, \$r1, \$r2 diff --git a/binutils-2.25/gas/testsuite/gas/nds32/alu-2.s b/binutils-2.25/gas/testsuite/gas/nds32/alu-2.s new file mode 100644 index 00000000..d1743db2 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/alu-2.s @@ -0,0 +1,33 @@ +foo: + madd64 $d0, $r0, $r1 + madds64 $d0, $r0, $r1 + mfusr $r0, $pc + msub64 $d0, $r0, $r1 + msubs64 $d0, $r0, $r1 + mtusr $r0, $pc + mul $r0, $r1, $r2 + mult32 $d0, $r1, $r2 + mult64 $d0, $r1, $r2 + mults64 $d0, $r1, $r2 + abs $r0, $r1 + ave $r0, $r1, $r2 + bclr $r0, $r1, 1 + bset $r0, $r1, 1 + btgl $r0, $r1, 1 + btst $r0, $r1, 1 + clip $r0, $r1, 1 + clips $r0, $r1, 1 + clo $r0, $r1 + clz $r0, $r1 + max $r0, $r1, $r2 + min $r0, $r1, $r2 + bse $r0, $r1, $r2 + bsp $r0, $r1, $r2 + ffb $r0, $r1, $r2 + ffbi $r0, $r1, 1 + ffmism $r0, $r1, $r2 + flmism $r0, $r1, $r2 + maddr32 $r0, $r0, $r1 + msubr32 $r0, $r1, $r2 + mulr64 $r0, $r1, $r2 + mulsr64 $r0, $r1, $r2 diff --git a/binutils-2.25/gas/testsuite/gas/nds32/br-1.d b/binutils-2.25/gas/testsuite/gas/nds32/br-1.d new file mode 100644 index 00000000..b4842d8e --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/br-1.d @@ -0,0 +1,14 @@ +#objdump: -dr --prefix-addresses +#name: nds32 branch 1 instructions +#as: + +# Test br-1 instructions + +.*: file format .* + +Disassembly of section .text: +0+0000 <[^>]*> beq \$r0, \$r1, 00000000 <foo> + 0: R_NDS32_15_PCREL_RELA .text + 0: R_NDS32_RELAX_ENTRY .text +0+0004 <[^>]*> bne \$r0, \$r1, 00000004 <foo\+0x4> + 4: R_NDS32_15_PCREL_RELA .text diff --git a/binutils-2.25/gas/testsuite/gas/nds32/br-1.s b/binutils-2.25/gas/testsuite/gas/nds32/br-1.s new file mode 100644 index 00000000..58d993a2 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/br-1.s @@ -0,0 +1,3 @@ +foo: + beq $r0, $r1, foo + bne $r0, $r1, foo diff --git a/binutils-2.25/gas/testsuite/gas/nds32/br-2.d b/binutils-2.25/gas/testsuite/gas/nds32/br-2.d new file mode 100644 index 00000000..24ce1579 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/br-2.d @@ -0,0 +1,24 @@ +#objdump: -dr --prefix-addresses +#name: nds32 branch 2 instructions +#as: + +# Test br-2 instructions + +.*: file format .* + +Disassembly of section .text: +0+0000 <[^>]*> beqz \$r0, 00000000 <foo> + 0: R_NDS32_17_PCREL_RELA .text + 0: R_NDS32_RELAX_ENTRY .text +0+0004 <[^>]*> bgez \$r0, 00000004 <foo\+0x4> + 4: R_NDS32_17_PCREL_RELA .text +0+0008 <[^>]*> bgezal \$r0, 00000008 <foo\+0x8> + 8: R_NDS32_17_PCREL_RELA .text +0+000c <[^>]*> bgtz \$r0, 0000000c <foo\+0xc> + c: R_NDS32_17_PCREL_RELA .text +0+0010 <[^>]*> blez \$r0, 00000010 <foo\+0x10> + 10: R_NDS32_17_PCREL_RELA .text +0+0014 <[^>]*> bltz \$r0, 00000014 <foo\+0x14> + 14: R_NDS32_17_PCREL_RELA .text +0+0018 <[^>]*> bltzal \$r0, 00000018 <foo\+0x18> + 18: R_NDS32_17_PCREL_RELA .text diff --git a/binutils-2.25/gas/testsuite/gas/nds32/br-2.s b/binutils-2.25/gas/testsuite/gas/nds32/br-2.s new file mode 100644 index 00000000..554a8de0 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/br-2.s @@ -0,0 +1,8 @@ +foo: + beqz $r0, foo + bgez $r0, foo + bgezal $r0, foo + bgtz $r0, foo + blez $r0, foo + bltz $r0, foo + bltzal $r0, foo diff --git a/binutils-2.25/gas/testsuite/gas/nds32/ji-jr.d b/binutils-2.25/gas/testsuite/gas/nds32/ji-jr.d new file mode 100644 index 00000000..ac792186 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/ji-jr.d @@ -0,0 +1,17 @@ +#objdump: -dr --prefix-addresses +#name: nds32 load-store instructions +#as: + +# Test ls instructions + +.*: file format .* + +Disassembly of section .text: +0+0000 <[^>]*> j8 00000000 <foo> + 0: R_NDS32_9_PCREL_RELA .text + 0: R_NDS32_RELAX_ENTRY .text +0+0002 <[^>]*> jal 00000002 <foo\+0x2> + 2: R_NDS32_25_PCREL_RELA .text +0+0006 <[^>]*> jr \$r0 +0+000a <[^>]*> jral \$lp, \$r0 +0+000e <[^>]*> ret \$lp diff --git a/binutils-2.25/gas/testsuite/gas/nds32/ji-jr.s b/binutils-2.25/gas/testsuite/gas/nds32/ji-jr.s new file mode 100644 index 00000000..2457d0b7 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/ji-jr.s @@ -0,0 +1,6 @@ +foo: + j foo + jal foo + jr $r0 + jral $r0 + ret diff --git a/binutils-2.25/gas/testsuite/gas/nds32/ls.d b/binutils-2.25/gas/testsuite/gas/nds32/ls.d new file mode 100644 index 00000000..688ed11b --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/ls.d @@ -0,0 +1,25 @@ +#objdump: -d --prefix-addresses +#name: nds32 load-store instructions +#as: + +# Test ls instructions + +.*: file format .* + +Disassembly of section .text: +0+0000 <[^>]*> lw \$r0, \[\$r1 \+ \(\$r2 << 1\)\] +0+0004 <[^>]*> lh \$r0, \[\$r1 \+ \(\$r2 << 1\)\] +0+0008 <[^>]*> lhs \$r0, \[\$r1 \+ \(\$r2 << 1\)\] +0+000c <[^>]*> lb \$r0, \[\$r1 \+ \(\$r2 << 1\)\] +0+0010 <[^>]*> lbs \$r0, \[\$r1 \+ \(\$r2 << 1\)\] +0+0014 <[^>]*> sw \$r0, \[\$r1 \+ \(\$r2 << 1\)\] +0+0018 <[^>]*> sh \$r0, \[\$r1 \+ \(\$r2 << 1\)\] +0+001c <[^>]*> sb \$r0, \[\$r1 \+ \(\$r2 << 1\)\] +0+0020 <[^>]*> lw.bi \$r0, \[\$r1\], \(\$r2 << 1\) +0+0024 <[^>]*> lh.bi \$r0, \[\$r1\], \(\$r2 << 1\) +0+0028 <[^>]*> lhs.bi \$r0, \[\$r1\], \(\$r2 << 1\) +0+002c <[^>]*> lb.bi \$r0, \[\$r1\], \(\$r2 << 1\) +0+0030 <[^>]*> lbs.bi \$r0, \[\$r1\], \(\$r2 << 1\) +0+0034 <[^>]*> sw.bi \$r0, \[\$r1\], \(\$r2 << 1\) +0+0038 <[^>]*> sh.bi \$r0, \[\$r1\], \(\$r2 << 1\) +0+003c <[^>]*> sb.bi \$r0, \[\$r1\], \(\$r2 << 1\) diff --git a/binutils-2.25/gas/testsuite/gas/nds32/ls.s b/binutils-2.25/gas/testsuite/gas/nds32/ls.s new file mode 100644 index 00000000..88d3d339 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/ls.s @@ -0,0 +1,17 @@ +foo: + lw $r0, [$r1 + ($r2 << 1)] + lh $r0, [$r1 + ($r2 << 1)] + lhs $r0, [$r1 + ($r2 << 1)] + lb $r0, [$r1 + ($r2 << 1)] + lbs $r0, [$r1 + ($r2 << 1)] + sw $r0, [$r1 + ($r2 << 1)] + sh $r0, [$r1 + ($r2 << 1)] + sb $r0, [$r1 + ($r2 << 1)] + lw.bi $r0, [$r1], $r2 << 1 + lh.bi $r0, [$r1], $r2 << 1 + lhs.bi $r0, [$r1], $r2 << 1 + lb.bi $r0, [$r1], $r2 << 1 + lbs.bi $r0, [$r1], $r2 << 1 + sw.bi $r0, [$r1], $r2 << 1 + sh.bi $r0, [$r1], $r2 << 1 + sb.bi $r0, [$r1], $r2 << 1 diff --git a/binutils-2.25/gas/testsuite/gas/nds32/lsi.d b/binutils-2.25/gas/testsuite/gas/nds32/lsi.d new file mode 100644 index 00000000..9f9839ec --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/lsi.d @@ -0,0 +1,25 @@ +#objdump: -d --prefix-addresses +#name: nds32 load-store immediate instructions +#as: + +# Test lsi instructions + +.*: file format .* + +Disassembly of section .text: +0+0000 <[^>]*> lwi \$r0, \[\$r1 \+ #4\] +0+0004 <[^>]*> lhi \$r0, \[\$r1 \+ #2\] +0+0008 <[^>]*> lhsi \$r0, \[\$r1 \+ #-2\] +0+000c <[^>]*> lbi \$r0, \[\$r1 \+ #1\] +0+0010 <[^>]*> lbsi \$r0, \[\$r1 \+ #-1\] +0+0014 <[^>]*> swi \$r0, \[\$r1 \+ #4\] +0+0018 <[^>]*> shi \$r0, \[\$r1 \+ #2\] +0+001c <[^>]*> sbi \$r0, \[\$r1 \+ #1\] +0+0020 <[^>]*> lwi.bi \$r0, \[\$r1\], #4 +0+0024 <[^>]*> lhi.bi \$r0, \[\$r1\], #2 +0+0028 <[^>]*> lhsi.bi \$r0, \[\$r1\], #-2 +0+002c <[^>]*> lbi.bi \$r0, \[\$r1\], #1 +0+0030 <[^>]*> lbsi.bi \$r0, \[\$r1\], #-1 +0+0034 <[^>]*> swi.bi \$r0, \[\$r1\], #4 +0+0038 <[^>]*> shi.bi \$r0, \[\$r1\], #2 +0+003c <[^>]*> sbi.bi \$r0, \[\$r1\], #1 diff --git a/binutils-2.25/gas/testsuite/gas/nds32/lsi.s b/binutils-2.25/gas/testsuite/gas/nds32/lsi.s new file mode 100644 index 00000000..a2dd62ae --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/lsi.s @@ -0,0 +1,17 @@ +foo: + lwi $r0, [$r1 + (1 << 2)] + lhi $r0, [$r1 + (1 << 1)] + lhsi $r0, [$r1 + (-1 << 1)] + lbi $r0, [$r1 + 1] + lbsi $r0, [$r1 + (-1)] + swi $r0, [$r1 + (1 << 2)] + shi $r0, [$r1 + (1 << 1)] + sbi $r0, [$r1 + 1] + lwi.bi $r0, [$r1], (1 << 2) + lhi.bi $r0, [$r1], (1 << 1) + lhsi.bi $r0, [$r1], (-1 << 1) + lbi.bi $r0, [$r1], 1 + lbsi.bi $r0, [$r1], -1 + swi.bi $r0, [$r1], (1 << 2) + shi.bi $r0, [$r1], (1 << 1) + sbi.bi $r0, [$r1], 1 diff --git a/binutils-2.25/gas/testsuite/gas/nds32/nds32.exp b/binutils-2.25/gas/testsuite/gas/nds32/nds32.exp new file mode 100644 index 00000000..100fafda --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/nds32.exp @@ -0,0 +1,32 @@ +# Copyright (C) 2012-2014 Free Software Foundation, Inc. +# Contributed by Andes Technology Corporation. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +if { [istarget nds32*] } { + run_dump_test "alu-1" + run_dump_test "alu-2" + run_dump_test "lsi" + run_dump_test "ls" + run_dump_test "br-1" + run_dump_test "br-2" + run_dump_test "ji-jr" + run_dump_test "to-16bit-v1" + run_dump_test "to-16bit-v2" + run_dump_test "to-16bit-v3" + run_dump_test "usr-spe-reg" + run_dump_test "sys-reg" +} diff --git a/binutils-2.25/gas/testsuite/gas/nds32/sys-reg.d b/binutils-2.25/gas/testsuite/gas/nds32/sys-reg.d new file mode 100644 index 00000000..0a3b6340 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/sys-reg.d @@ -0,0 +1,118 @@ +#objdump: -d --prefix-addresses +#name: nds32 sys-reg instructions +#as: + +# Test system register instructions + +.*: file format .* + + +Disassembly of section .text: +0+0000 <[^>]*> mfsr \$r0, \$CPU_VER +0+0004 <[^>]*> mfsr \$r0, \$CORE_ID +0+0008 <[^>]*> mfsr \$r0, \$ICM_CFG +0+000c <[^>]*> mfsr \$r0, \$DCM_CFG +0+0010 <[^>]*> mfsr \$r0, \$MMU_CFG +0+0014 <[^>]*> mfsr \$r0, \$MSC_CFG +0+0018 <[^>]*> mfsr \$r0, \$PSW +0+001c <[^>]*> mfsr \$r0, \$IPSW +0+0020 <[^>]*> mfsr \$r0, \$P_IPSW +0+0024 <[^>]*> mfsr \$r0, \$IVB +0+0028 <[^>]*> mfsr \$r0, \$INT_CTRL +0+002c <[^>]*> mfsr \$r0, \$EVA +0+0030 <[^>]*> mfsr \$r0, \$P_EVA +0+0034 <[^>]*> mfsr \$r0, \$ITYPE +0+0038 <[^>]*> mfsr \$r0, \$P_ITYPE +0+003c <[^>]*> mfsr \$r0, \$MERR +0+0040 <[^>]*> mfsr \$r0, \$IPC +0+0044 <[^>]*> mfsr \$r0, \$P_IPC +0+0048 <[^>]*> mfsr \$r0, \$OIPC +0+004c <[^>]*> mfsr \$r0, \$P_P0 +0+0050 <[^>]*> mfsr \$r0, \$P_P1 +0+0054 <[^>]*> mfsr \$r0, \$INT_MASK +0+0058 <[^>]*> mfsr \$r0, \$INT_MASK2 +0+005c <[^>]*> mfsr \$r0, \$INT_PEND +0+0060 <[^>]*> mfsr \$r0, \$INT_PEND2 +0+0064 <[^>]*> mfsr \$r0, \$INT_TRIGGER +0+0068 <[^>]*> mfsr \$r0, \$SP_USR +0+006c <[^>]*> mfsr \$r0, \$SP_PRIV +0+0070 <[^>]*> mfsr \$r0, \$INT_PRI +0+0074 <[^>]*> mfsr \$r0, \$INT_PRI2 +0+0078 <[^>]*> mfsr \$r0, \$MMU_CTL +0+007c <[^>]*> mfsr \$r0, \$L1_PPTB +0+0080 <[^>]*> mfsr \$r0, \$TLB_VPN +0+0084 <[^>]*> mfsr \$r0, \$TLB_DATA +0+0088 <[^>]*> mfsr \$r0, \$TLB_MISC +0+008c <[^>]*> mfsr \$r0, \$VLPT_IDX +0+0090 <[^>]*> mfsr \$r0, \$ILMB +0+0094 <[^>]*> mfsr \$r0, \$DLMB +0+0098 <[^>]*> mfsr \$r0, \$CACHE_CTL +0+009c <[^>]*> mfsr \$r0, \$HSMP_SADDR +0+00a0 <[^>]*> mfsr \$r0, \$HSMP_EADDR +0+00a4 <[^>]*> mfsr \$r0, \$SDZ_CTL +0+00a8 <[^>]*> mfsr \$r0, \$MISC_CTL +0+00ac <[^>]*> mfsr \$r0, \$BPC0 +0+00b0 <[^>]*> mfsr \$r0, \$BPC1 +0+00b4 <[^>]*> mfsr \$r0, \$BPC2 +0+00b8 <[^>]*> mfsr \$r0, \$BPC3 +0+00bc <[^>]*> mfsr \$r0, \$BPC4 +0+00c0 <[^>]*> mfsr \$r0, \$BPC5 +0+00c4 <[^>]*> mfsr \$r0, \$BPC6 +0+00c8 <[^>]*> mfsr \$r0, \$BPC7 +0+00cc <[^>]*> mfsr \$r0, \$BPA0 +0+00d0 <[^>]*> mfsr \$r0, \$BPA1 +0+00d4 <[^>]*> mfsr \$r0, \$BPA2 +0+00d8 <[^>]*> mfsr \$r0, \$BPA3 +0+00dc <[^>]*> mfsr \$r0, \$BPA4 +0+00e0 <[^>]*> mfsr \$r0, \$BPA5 +0+00e4 <[^>]*> mfsr \$r0, \$BPA6 +0+00e8 <[^>]*> mfsr \$r0, \$BPA7 +0+00ec <[^>]*> mfsr \$r0, \$BPAM0 +0+00f0 <[^>]*> mfsr \$r0, \$BPAM1 +0+00f4 <[^>]*> mfsr \$r0, \$BPAM2 +0+00f8 <[^>]*> mfsr \$r0, \$BPAM3 +0+00fc <[^>]*> mfsr \$r0, \$BPAM4 +0+0100 <[^>]*> mfsr \$r0, \$BPAM5 +0+0104 <[^>]*> mfsr \$r0, \$BPAM6 +0+0108 <[^>]*> mfsr \$r0, \$BPAM7 +0+010c <[^>]*> mfsr \$r0, \$BPV0 +0+0110 <[^>]*> mfsr \$r0, \$BPV1 +0+0114 <[^>]*> mfsr \$r0, \$BPV2 +0+0118 <[^>]*> mfsr \$r0, \$BPV3 +0+011c <[^>]*> mfsr \$r0, \$BPV4 +0+0120 <[^>]*> mfsr \$r0, \$BPV5 +0+0124 <[^>]*> mfsr \$r0, \$BPV6 +0+0128 <[^>]*> mfsr \$r0, \$BPV7 +0+012c <[^>]*> mfsr \$r0, \$BPCID0 +0+0130 <[^>]*> mfsr \$r0, \$BPCID1 +0+0134 <[^>]*> mfsr \$r0, \$BPCID2 +0+0138 <[^>]*> mfsr \$r0, \$BPCID3 +0+013c <[^>]*> mfsr \$r0, \$BPCID4 +0+0140 <[^>]*> mfsr \$r0, \$BPCID5 +0+0144 <[^>]*> mfsr \$r0, \$BPCID6 +0+0148 <[^>]*> mfsr \$r0, \$BPCID7 +0+014c <[^>]*> mfsr \$r0, \$EDM_CFG +0+0150 <[^>]*> mfsr \$r0, \$EDMSW +0+0154 <[^>]*> mfsr \$r0, \$EDM_CTL +0+0158 <[^>]*> mfsr \$r0, \$EDM_DTR +0+015c <[^>]*> mfsr \$r0, \$BPMTC +0+0160 <[^>]*> mfsr \$r0, \$DIMBR +0+0164 <[^>]*> mfsr \$r0, \$TECR0 +0+0168 <[^>]*> mfsr \$r0, \$TECR1 +0+016c <[^>]*> mfsr \$r0, \$PFMC0 +0+0170 <[^>]*> mfsr \$r0, \$PFMC1 +0+0174 <[^>]*> mfsr \$r0, \$PFMC2 +0+0178 <[^>]*> mfsr \$r0, \$PFM_CTL +0+017c <[^>]*> mfsr \$r0, \$PRUSR_ACC_CTL +0+0180 <[^>]*> mfsr \$r0, \$FUCOP_CTL +0+0184 <[^>]*> mfsr \$r0, \$DMA_CFG +0+0188 <[^>]*> mfsr \$r0, \$DMA_GCSW +0+018c <[^>]*> mfsr \$r0, \$DMA_CHNSEL +0+0190 <[^>]*> mfsr \$r0, \$DMA_ACT +0+0194 <[^>]*> mfsr \$r0, \$DMA_SETUP +0+0198 <[^>]*> mfsr \$r0, \$DMA_ISADDR +0+019c <[^>]*> mfsr \$r0, \$DMA_ESADDR +0+01a0 <[^>]*> mfsr \$r0, \$DMA_TCNT +0+01a4 <[^>]*> mfsr \$r0, \$DMA_STATUS +0+01a8 <[^>]*> mfsr \$r0, \$DMA_2DSET +0+01ac <[^>]*> mfsr \$r0, \$DMA_2DSCTL diff --git a/binutils-2.25/gas/testsuite/gas/nds32/sys-reg.s b/binutils-2.25/gas/testsuite/gas/nds32/sys-reg.s new file mode 100644 index 00000000..77fa15ea --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/sys-reg.s @@ -0,0 +1,114 @@ +foo: + mfsr $r0 ,$CPU_VER + mfsr $r0 ,$CORE_ID + mfsr $r0 ,$ICM_CFG + mfsr $r0 ,$DCM_CFG + mfsr $r0 ,$MMU_CFG + mfsr $r0 ,$MSC_CFG + + mfsr $r0 ,$PSW + mfsr $r0 ,$IPSW + mfsr $r0 ,$P_IPSW + mfsr $r0 ,$IVB + mfsr $r0 ,$INT_CTRL + mfsr $r0 ,$EVA + mfsr $r0 ,$P_EVA + mfsr $r0 ,$ITYPE + mfsr $r0 ,$P_ITYPE + mfsr $r0 ,$MERR + mfsr $r0 ,$IPC + mfsr $r0 ,$P_IPC + mfsr $r0 ,$OIPC + mfsr $r0 ,$P_P0 + mfsr $r0 ,$P_P1 + mfsr $r0 ,$INT_MASK + mfsr $r0 ,$INT_MASK2 + mfsr $r0 ,$INT_PEND + mfsr $r0 ,$INT_PEND2 + mfsr $r0 ,$INT_TRIGGER + mfsr $r0 ,$SP_USR + mfsr $r0 ,$SP_PRIV + mfsr $r0 ,$INT_PRI + mfsr $r0 ,$INT_PRI2 + + mfsr $r0 ,$MMU_CTL + mfsr $r0 ,$L1_PPTB + mfsr $r0 ,$TLB_VPN + mfsr $r0 ,$TLB_DATA + mfsr $r0 ,$TLB_MISC + mfsr $r0 ,$VLPT_IDX + mfsr $r0 ,$ILMB + mfsr $r0 ,$DLMB + mfsr $r0 ,$CACHE_CTL + mfsr $r0 ,$HSMP_SADDR + mfsr $r0 ,$HSMP_EADDR + mfsr $r0 ,$SDZ_CTL + mfsr $r0 ,$MISC_CTL + + mfsr $r0 ,$BPC0 + mfsr $r0 ,$BPC1 + mfsr $r0 ,$BPC2 + mfsr $r0 ,$BPC3 + mfsr $r0 ,$BPC4 + mfsr $r0 ,$BPC5 + mfsr $r0 ,$BPC6 + mfsr $r0 ,$BPC7 + mfsr $r0 ,$BPA0 + mfsr $r0 ,$BPA1 + mfsr $r0 ,$BPA2 + mfsr $r0 ,$BPA3 + mfsr $r0 ,$BPA4 + mfsr $r0 ,$BPA5 + mfsr $r0 ,$BPA6 + mfsr $r0 ,$BPA7 + mfsr $r0 ,$BPAM0 + mfsr $r0 ,$BPAM1 + mfsr $r0 ,$BPAM2 + mfsr $r0 ,$BPAM3 + mfsr $r0 ,$BPAM4 + mfsr $r0 ,$BPAM5 + mfsr $r0 ,$BPAM6 + mfsr $r0 ,$BPAM7 + mfsr $r0 ,$BPV0 + mfsr $r0 ,$BPV1 + mfsr $r0 ,$BPV2 + mfsr $r0 ,$BPV3 + mfsr $r0 ,$BPV4 + mfsr $r0 ,$BPV5 + mfsr $r0 ,$BPV6 + mfsr $r0 ,$BPV7 + mfsr $r0 ,$BPCID0 + mfsr $r0 ,$BPCID1 + mfsr $r0 ,$BPCID2 + mfsr $r0 ,$BPCID3 + mfsr $r0 ,$BPCID4 + mfsr $r0 ,$BPCID5 + mfsr $r0 ,$BPCID6 + mfsr $r0 ,$BPCID7 + mfsr $r0 ,$EDM_CFG + mfsr $r0 ,$EDMSW + mfsr $r0 ,$EDM_CTL + mfsr $r0 ,$EDM_DTR + mfsr $r0 ,$BPMTC + mfsr $r0 ,$DIMBR + mfsr $r0 ,$TECR0 + mfsr $r0 ,$TECR1 + + mfsr $r0 ,$PFMC0 + mfsr $r0 ,$PFMC1 + mfsr $r0 ,$PFMC2 + mfsr $r0 ,$PFM_CTL + mfsr $r0 ,$PRUSR_ACC_CTL + mfsr $r0 ,$FUCOP_CTL + + mfsr $r0 ,$DMA_CFG + mfsr $r0 ,$DMA_GCSW + mfsr $r0 ,$DMA_CHNSEL + mfsr $r0 ,$DMA_ACT + mfsr $r0 ,$DMA_SETUP + mfsr $r0 ,$DMA_ISADDR + mfsr $r0 ,$DMA_ESADDR + mfsr $r0 ,$DMA_TCNT + mfsr $r0 ,$DMA_STATUS + mfsr $r0 ,$DMA_2DSET + mfsr $r0 ,$DMA_2DSCTL diff --git a/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v1.d b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v1.d new file mode 100644 index 00000000..a45de36f --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v1.d @@ -0,0 +1,79 @@ +#objdump: -d --prefix-addresses +#name: nds32 convert 32 to 16 (v1 instructions) +#as: -Os -mno-reduced-regs + +# Test the convert 32bits to 16bits + +.*: file format .* + + +Disassembly of section .text: +0+0000 .* +0+0002 .* +0+0004 .* +0+0006 .* +0+0008 .* +0+000a .* +0+000c .* +0+000e .* +0+0010 .* +0+0012 .* +0+0014 .* +0+0016 .* +0+0018 .* +0+001a .* +0+001c .* +0+001e .* +0+0020 .* +0+0022 .* +0+0024 .* +0+0026 .* +0+0028 .* +0+002a .* +0+002c .* +0+002e .* +0+0030 .* +0+0032 .* +0+0034 .* +0+0036 .* +0+0038 .* +0+003a .* +0+003c .* +0+003e .* +0+0040 .* +0+0042 .* +0+0044 .* +0+0046 .* +0+0048 .* +0+004a .* +0+004c .* +0+004e .* +0+0050 .* +0+0052 .* +0+0054 .* +0+0056 .* +0+0058 .* +0+005a .* +0+005c .* +0+005e .* +0+0060 .* +0+0062 .* +0+0064 .* +0+0066 .* +0+0068 .* +0+006a .* +0+006c .* +0+006e .* +0+0070 .* +0+0072 .* +0+0074 .* +0+0076 .* +0+0078 .* +0+007a .* +0+007c .* +0+007e .* +0+0080 .* +0+0082 .* +0+0084 .* +0+0086 .* +0+0088 .* diff --git a/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v1.s b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v1.s new file mode 100644 index 00000000..195463c6 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v1.s @@ -0,0 +1,70 @@ +foo: + move $r0, $r0 + move $sp, $sp + movi $r0, -16 + movi $sp, 15 + add $r0, $r0, $r0 + add $r19, $sp, $r19 + sub $r0, $r0, $r0 + sub $r19, $r19, $sp + addi $r0, $r0, 0 + addi $r19, $r19, 31 + srai $r0, $r0, 0 + srai $r19, $r19, 31 + srli $r0, $r0, 0 + srli $r19, $r19, 31 + slli $r0, $r0, 0 + slli $r7, $r7, 7 + zeb $r0, $r0 + zeb $r7, $r7 + zeh $r0, $r0 + zeh $r7, $r7 + seb $r0, $r0 + seb $r7, $r7 + seh $r0, $r0 + seh $r7, $r7 + andi $r0, $r0, 1 + andi $r7, $r7, 0x7ff + add $r0, $r0, $r0 + add $r7, $r7, $r7 + sub $r0, $r0, $r0 + sub $r7, $r7, $r7 + addi $r0, $r0, 0 + addi $r7, $r7, 7 + lwi $r0, [$r0 + 0] + lwi $r7, [$r7 + 28] + lwi.bi $r0, [$r0], 0 + lwi.bi $r7, [$r7], 28 + lhi $r0, [$r0 + 0] + lhi $r7, [$r7 + 14] + lbi $r0, [$r0 + 0] + lbi $r7, [$r7 + 7] + swi $r0, [$r0 + 0] + swi $r7, [$r7 + 28] + swi.bi $r0, [$r0], 0 + swi.bi $r7, [$r7], 28 + shi $r0, [$r0 + 0] + shi $r7, [$r7 + 14] + sbi $r0, [$r0 + 0] + sbi $r7, [$r7 + 7] + lwi $r0, [$r0 + 0] + lwi $r19, [$sp + 0] + swi $r0, [$r0 + 0] + swi $r19, [$sp + 0] + lwi $r0, [$fp + 0] + lwi $r7, [$fp + 508] + swi $r0, [$fp + 0] + swi $r7, [$fp + 508] + jr $r0 + jr $sp + ret $r0 + ret $sp + jral $r0 + jral $sp + slts $r15, $r0, $r0 + slts $r15, $r19, $sp + slt $r15, $r0, $r0 + slt $r15, $r19, $sp + sltsi $r15, $r0, 0 + sltsi $r15, $r19, 31 + slti $r15, $r0, 0 diff --git a/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v2.d b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v2.d new file mode 100644 index 00000000..5ca929cb --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v2.d @@ -0,0 +1,15 @@ +#objdump: -d --prefix-addresses +#name: nds32 convert 32 to 16 (v2 instructions) +#as: -Os -mno-reduced-regs + +# Test the convert 32bits to 16bits + +.*: file format .* + + +Disassembly of section .text: +0+0000 .* +0+0002 .* +0+0004 .* +0+0006 .* +0+0008 .* diff --git a/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v2.s b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v2.s new file mode 100644 index 00000000..1ac3328f --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v2.s @@ -0,0 +1,6 @@ +foo: +addi $sp, $sp, -512 +addi $sp, $sp, 511 +lwi $r0, [$sp + 0] +lwi $r7, [$sp + 508] +swi $r0, [$sp + 0] diff --git a/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v3.d b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v3.d new file mode 100644 index 00000000..2efa8b7d --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v3.d @@ -0,0 +1,25 @@ +#objdump: -d --prefix-addresses +#name: nds32 convert 32 to 16 (v3 instructions) +#as: -Os -mno-reduced-regs + +# Test the convert 32bits to 16bits + +.*: file format .* + + +Disassembly of section .text: +0+0000 .* +0+0002 .* +0+0004 .* +0+0006 .* +0+0008 .* +0+000a .* +0+000c .* +0+000e .* +0+0010 .* +0+0012 .* +0+0014 .* +0+0016 .* +0+0018 .* +0+001a .* +0+001c .* diff --git a/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v3.s b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v3.s new file mode 100644 index 00000000..595a7827 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/to-16bit-v3.s @@ -0,0 +1,16 @@ +foo: +andi $r0, $r0, 1 +andi $r7, $r7, 255 +movi $r0, 16 +movi $r19, 47 +subri $r0, $r0, 0 +subri $r7, $r7, 0 +nor $r0, $r0, $r0 +nor $r7, $r7, $r7 +mul $r0, $r0, $r0 +mul $r7, $r7, $r7 +xor $r0, $r0, $r0 +xor $r7, $r7, $r7 +and $r0, $r0, $r0 +and $r7, $r7, $r7 +or $r0, $r0, $r0 diff --git a/binutils-2.25/gas/testsuite/gas/nds32/usr-spe-reg.d b/binutils-2.25/gas/testsuite/gas/nds32/usr-spe-reg.d new file mode 100644 index 00000000..6ff6d969 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/usr-spe-reg.d @@ -0,0 +1,29 @@ +#objdump: -d --prefix-addresses +#name: nds32 usr-spe-reg instructions +#as: + +# Test user specail register instructions + +.*: file format .* + +Disassembly of section .text: +0+0000 <[^>]*> mfusr \$r0, \$d0.lo +0+0004 <[^>]*> mfusr \$r0, \$d0.hi +0+0008 <[^>]*> mfusr \$r0, \$d1.lo +0+000c <[^>]*> mfusr \$r0, \$d1.hi +0+0010 <[^>]*> mfusr \$r0, \$pc +0+0014 <[^>]*> mfusr \$r0, \$DMA_CFG +0+0018 <[^>]*> mfusr \$r0, \$DMA_GCSW +0+001c <[^>]*> mfusr \$r0, \$DMA_CHNSEL +0+0020 <[^>]*> mfusr \$r0, \$DMA_ACT +0+0024 <[^>]*> mfusr \$r0, \$DMA_SETUP +0+0028 <[^>]*> mfusr \$r0, \$DMA_ISADDR +0+002c <[^>]*> mfusr \$r0, \$DMA_ESADDR +0+0030 <[^>]*> mfusr \$r0, \$DMA_TCNT +0+0034 <[^>]*> mfusr \$r0, \$DMA_STATUS +0+0038 <[^>]*> mfusr \$r0, \$DMA_2DSET +0+003c <[^>]*> mfusr \$r0, \$DMA_2DSCTL +0+0040 <[^>]*> mfusr \$r0, \$PFMC0 +0+0044 <[^>]*> mfusr \$r0, \$PFMC1 +0+0048 <[^>]*> mfusr \$r0, \$PFMC2 +0+004c <[^>]*> mfusr \$r0, \$PFM_CTL diff --git a/binutils-2.25/gas/testsuite/gas/nds32/usr-spe-reg.s b/binutils-2.25/gas/testsuite/gas/nds32/usr-spe-reg.s new file mode 100644 index 00000000..d43cf1e7 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/nds32/usr-spe-reg.s @@ -0,0 +1,21 @@ +foo: + mfusr $r0, d0.lo + mfusr $r0, d0.hi + mfusr $r0, d1.lo + mfusr $r0, d1.hi + mfusr $r0, $pc + mfusr $r0, $DMA_CFG + mfusr $r0, $DMA_GCSW + mfusr $r0, $DMA_CHNSEL + mfusr $r0, $DMA_ACT + mfusr $r0, $DMA_SETUP + mfusr $r0, $DMA_ISADDR + mfusr $r0, $DMA_ESADDR + mfusr $r0, $DMA_TCNT + mfusr $r0, $DMA_STATUS + mfusr $r0, $DMA_2DSET + mfusr $r0, $DMA_2DSCTL + mfusr $r0, $PFMC0 + mfusr $r0, $PFMC1 + mfusr $r0, $PFMC2 + mfusr $r0, $PFM_CTL |