diff options
Diffstat (limited to 'binutils-2.17/gas/testsuite/gas/bfin')
65 files changed, 0 insertions, 7648 deletions
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/arithmetic.d b/binutils-2.17/gas/testsuite/gas/bfin/arithmetic.d deleted file mode 100644 index a6c98f77..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/arithmetic.d +++ /dev/null @@ -1,179 +0,0 @@ -#objdump: -dr -#name: arithmetic -.*: +file format .* - - -Disassembly of section .text: - -00000000 <abs>: - 0: 10 c4 [0-3][[:xdigit:]] 00 A0= ABS A0; - 4: 10 c4 [0-3][[:xdigit:]] 40 A0= ABS A1; - 8: 30 c4 [0-3][[:xdigit:]] 00 A1= ABS A0; - c: 30 c4 [0-3][[:xdigit:]] 40 A1= ABS A1; - 10: 10 c4 [0-3][[:xdigit:]] c0 A1= ABS A0,A0= ABS A0; - 14: 07 c4 10 80 R0= ABS R2; - -00000018 <add>: - 18: 86 5b SP=SP\+P0; - 1a: 96 5b SP=SP\+P2; - 1c: f9 5b FP=P1\+FP; - 1e: 04 c4 3a 0e R7=R7\+R2 \(NS\); - 22: 04 c4 30 2c R6=R6\+R0 \(S\); - 26: 02 c4 10 a8 R4.L=R2.H\+R0.L \(S\); - 2a: 22 c4 09 aa R5.H=R1.H\+R1.L \(S\); - 2e: 02 c4 35 0c R6.L=R6.L\+R5.L \(NS\); - -00000032 <add_sub_prescale_down>: - 32: 05 c4 01 98 R4.L=R0\+R1\(RND20\); - 36: 25 c4 28 96 R3.H=R5\+R0\(RND20\); - 3a: 05 c4 3d d2 R1.L=R7-R5\(RND20\); - -0000003e <add_sub_prescale_up>: - 3e: 05 c4 01 04 R2.L=R0\+R1\(RND12\); - 42: 25 c4 3e 0e R7.H=R7\+R6\(RND12\); - 46: 05 c4 1a 4a R5.L=R3-R2\(RND12\); - 4a: 25 c4 0a 44 R2.H=R1-R2\(RND12\); - -0000004e <add_immediate>: - 4e: 05 66 R5\+=-64; - 50: fa 65 R2\+=0x3f; - 52: 60 9f I0\+=2; - 54: 63 9f I3\+=2; - 56: 6a 9f I2\+=4; - 58: 69 9f I1\+=4; - 5a: 20 6c P0\+=0x4; - 5c: 86 6c SP\+=0x10; - 5e: 07 6f FP\+=-32; - -00000060 <divide_primitive>: - 60: 6b 42 DIVS\(R3,R5\); - 62: 2b 42 DIVQ\(R3,R5\); - -00000064 <expadj>: - 64: 07 c6 25 0c R6.L=EXPADJ \(R5,R4.L\); - 68: 07 c6 08 ca R5.L=EXPADJ \(R0.H,R1.L\); - 6c: 07 c6 2b 48 R4.L=EXPADJ \(R3,R5.L\) \(V\); - -00000070 <max>: - 70: 07 c4 2a 0c R6=MAX\(R5,R2\); - 74: 07 c4 0b 00 R0=MAX\(R1,R3\); - -00000078 <min>: - 78: 07 c4 13 4a R5=MIN\(R2,R3\); - 7c: 07 c4 38 48 R4=MIN\(R7,R0\); - -00000080 <modify_decrement>: - 80: 0b c4 [0-3][[:xdigit:]] c0 A0-=A1; - 84: 0b c4 [0-3][[:xdigit:]] e0 A0-=A1\(W32\); - 88: 17 44 FP-=P2; - 8a: 06 44 SP-=P0; - 8c: 73 9e I3-=M0; - 8e: 75 9e I1-=M1; - -00000090 <modify_increment>: - 90: 0b c4 [0-3][[:xdigit:]] 80 A0\+=A1; - 94: 0b c4 [0-3][[:xdigit:]] a0 A0\+=A1\(W32\); - 98: 4e 45 SP\+=P1\(BREV\); - 9a: 7d 45 P5\+=FP\(BREV\); - 9c: 6a 9e I2\+=M2; - 9e: e0 9e I0\+=M0\(BREV\); - a0: 0b c4 [0-3][[:xdigit:]] 0e R7=\(A0\+=A1\); - a4: 0b c4 [0-3][[:xdigit:]] 4c R6.L=\(A0\+=A1\); - a8: 2b c4 [0-3][[:xdigit:]] 40 R0.H=\(A0\+=A1\); - -000000ac <multiply16>: - ac: 00 c2 0a 24 R0 = R1.H \* R2.L; - b0: 20 c2 68 26 R1 = R5.H \* R0.H \(S2RND\); - b4: 80 c2 db 23 R7 = R3.L \* R3.H \(FU\); - b8: 28 c3 15 27 R4 = R2.H \* R5.H \(ISS2\); - bc: 08 c3 0b 20 R0 = R1.L \* R3.L \(IS\); - c0: 08 c2 a8 25 R6 = R5.H \* R0.L; - c4: 94 c3 be 40 R2.H = R7.L \* R6.H \(M, IU\); - c8: 04 c2 e8 80 R3.H = R5.H \* R0.L; - cc: 14 c2 09 40 R0.H = R1.L \* R1.H \(M\); - d0: 1c c3 3e 80 R1 = R7.H \* R6.L \(M, IS\); - d4: 0c c2 02 41 R5 = R0.L \* R2.H; - d8: 1c c2 b0 c0 R3 = R6.H \* R0.H \(M\); - -000000dc <multiply32>: - dc: c4 40 R4\*=R0; - de: d7 40 R7\*=R2; - -000000e0 <multiply_accumulate>: - e0: 63 c0 2f 02 a0 = R5.L \* R7.H \(W32\); - e4: 03 c0 00 04 a0 = R0.H \* R0.L; - e8: 83 c0 13 0a a0 \+= R2.L \* R3.H \(FU\); - ec: 03 c0 21 0c a0 \+= R4.H \* R1.L; - f0: 03 c1 3e 12 a0 -= R7.L \* R6.H \(IS\); - f4: 03 c0 2a 16 a0 -= R5.H \* R2.H; - f8: 10 c0 08 58 a1 = R1.L \* R0.H \(M\); - fc: 00 c0 10 98 a1 = R2.H \* R0.L; - 100: 70 c0 3e 98 a1 = R7.H \* R6.L \(M, W32\); - 104: 81 c0 1a 18 a1 \+= R3.L \* R2.L \(FU\); - 108: 01 c0 31 98 a1 \+= R6.H \* R1.L; - 10c: 02 c1 03 58 a1 -= R0.L \* R3.H \(IS\); - 110: 02 c0 17 58 a1 -= R2.L \* R7.H; - -00000114 <multiply_accumulate_half>: - 114: 03 c0 f5 25 R7.L = \(a0 = R6.H \* R5.L\); - 118: c3 c0 0a 24 R0.L = \(a0 = R1.H \* R2.L\) \(TFU\); - 11c: 03 c0 ac 28 R2.L = \(a0 \+= R5.L \* R4.L\); - 120: 43 c0 fe 2e R3.L = \(a0 \+= R7.H \* R6.H\) \(T\); - 124: 03 c0 1a 36 R0.L = \(a0 -= R3.H \* R2.H\); - 128: 63 c1 6c 30 R1.L = \(a0 -= R5.L \* R4.L\) \(IH\); - 12c: 04 c0 48 58 R1.H = \(a1 = R1.L \* R0.H\); - 130: 34 c1 83 98 R2.H = \(a1 = R0.H \* R3.L\) \(M, ISS2\); - 134: 05 c0 bf 59 R6.H = \(a1 \+= R7.L \* R7.H\); - 138: 25 c0 d3 19 R7.H = \(a1 \+= R2.L \* R3.L\) \(S2RND\); - 13c: 06 c0 a2 d9 R6.H = \(a1 -= R4.H \* R2.H\); - 140: d6 c0 5f 99 R5.H = \(a1 -= R3.H \* R7.L\) \(M, TFU\); - -00000144 <multiply_accumulate_data_reg>: - 144: 0b c0 0a 20 R0 = \(a0 = R1.L \* R2.L\); - 148: 0b c1 8a 20 R2 = \(a0 = R1.L \* R2.L\) \(IS\); - 14c: 0b c0 3e 2d R4 = \(a0 \+= R7.H \* R6.L\); - 150: 2b c0 ab 2b R6 = \(a0 \+= R5.L \* R3.H\) \(S2RND\); - 154: 0b c0 97 35 R6 = \(a0 -= R2.H \* R7.L\); - 158: 8b c0 06 33 R4 = \(a0 -= R0.L \* R6.H\) \(FU\); - 15c: 0c c0 81 99 R7 = \(a1 = R0.H \* R1.L\); - 160: 9c c0 13 d9 R5 = \(a1 = R2.H \* R3.H\) \(M, FU\); - 164: 0d c0 bd 18 R3 = \(a1 \+= R7.L \* R5.L\); - 168: 2d c1 17 d8 R1 = \(a1 \+= R2.H \* R7.H\) \(ISS2\); - 16c: 0e c0 80 58 R3 = \(a1 -= R0.L \* R0.H\); - 170: 1e c1 17 59 R5 = \(a1 -= R2.L \* R7.H\) \(M, IS\); - -00000174 <negate>: - 174: 85 43 R5=-R0; - 176: 07 c4 10 ee R7=-R2\(S\); - 17a: 07 c4 10 ce R7=-R2\(NS\); - 17e: 0e c4 [0-3][[:xdigit:]] 00 A0=-A0; - 182: 0e c4 [0-3][[:xdigit:]] 40 A0=-A1; - 186: 2e c4 [0-3][[:xdigit:]] 00 A1=-A0; - 18a: 2e c4 [0-3][[:xdigit:]] 40 A1=-A1; - 18e: 0e c4 [0-3][[:xdigit:]] c0 A1=-A1,A0=-A0; - -00000192 <round_half>: - 192: 0c c4 18 ca R5.L=R3\(RND\); - 196: 2c c4 00 cc R6.H=R0\(RND\); - -0000019a <saturate>: - 19a: 08 c4 [0-3][[:xdigit:]] 20 A0=A0\(S\); - 19e: 08 c4 [0-3][[:xdigit:]] 60 A1=A1\(S\); - 1a2: 08 c4 [0-3][[:xdigit:]] a0 A1=A1\(S\),A0=A0\(S\); - -000001a6 <signbits>: - 1a6: 05 c6 00 0a R5.L=SIGNBITS R0; - 1aa: 05 c6 07 80 R0.L=SIGNBITS R7.H; - 1ae: 06 c6 00 06 R3.L=SIGNBITS A0; - 1b2: 06 c6 00 4e R7.L=SIGNBITS A1; - -000001b6 <subtract>: - 1b6: 43 53 R5=R3-R0; - 1b8: 04 c4 38 6e R7=R7-R0 \(S\); - 1bc: 04 c4 11 46 R3=R2-R1 \(NS\); - 1c0: 03 c4 37 ea R5.L=R6.H-R7.H \(S\); - 1c4: 23 c4 1b 40 R0.H=R3.L-R3.H \(NS\); - -000001c8 <subtract_immediate>: - 1c8: 66 9f I2-=2; - 1ca: 6c 9f I0-=4; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/arithmetic.s b/binutils-2.17/gas/testsuite/gas/bfin/arithmetic.s deleted file mode 100644 index 6c6300ba..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/arithmetic.s +++ /dev/null @@ -1,225 +0,0 @@ - .text - .global abs -abs: - a0 = abs a0; - A0 = ABS A1; - A1 = Abs a0; - a1 = aBs A1; - A1 = abs a1, a0 = ABS A0; - r0 = abs r2; - - .text - .global add -add: - sp = sp + P0; - SP = SP + P2; - FP = p1 + fp; - - R7 = r7 + r2 (NS); - r6 = r6 + r0 (s); - - r4.L = R2.h + r0.L (s); - r5.H = R1.H + R1.L (S); - r6.L = R6.L + r5.l (NS); - - .text - .global add_sub_prescale_down -add_sub_prescale_down: - r4.l = r0 + r1 (RND20); - R3.H = r5 + r0 (rnd20); - r1.L = r7 - R5 (rND20); - - .text - .global add_sub_prescale_up -add_sub_prescale_up: - r2.L = R0 + R1 (rnd12); - r7.H = r7 + r6 (RND12); - r5.l = r3 - R2 (rNd12); - r2.h = R1 - R2 (Rnd12); - - .text - .global add_immediate -add_immediate: - R5 += -64; - r2 += 63; - i0 += 2; - I3 += 2; - I2 += 4; - i1 += 4; - P0 += 4; - sp += 16; - FP += -32; - - .text - .global divide_primitive -divide_primitive: - divs (r3, r5); - divq (R3, R5); - - .text - .global expadj -expadj: - r6.L = EXPADJ (r5, r4.l); - R5.l = ExpAdj (r0.h, r1.l); - R4.L = expadj (R3, R5.L) (V); - - .text - .global max -max: - R6 = MAX (r5, R2); - r0 = max (r1, r3); - - .text - .global min -min: - r5 = mIn (r2, R3); - R4 = Min (r7, R0); - - - .text - .global modify_decrement -modify_decrement: - A0 -= A1; - a0 -= a1 (w32); - fp -= p2; - SP -= P0; - I3 -= M0; - i1 -= m1; - - .text - .global modify_increment -modify_increment: - a0 += a1; - A0 += A1 (w32); - Sp += P1 (Brev); - P5 += Fp (BREV); - i2 += M2; - I0 += m0 (brev); - r7 = ( a0 += a1); - r6.l = (A0 += a1); - R0.H = (a0 += A1); - - .text - .global multiply16 -multiply16: - R0.l = r1.h * r2.l; - r1.L = r5.H * r0.H (s2rnd); - r7.l = r3.l * r3.H (FU); - r4 = r2.H * r5.H (iSS2); - r0 = r1.l * r3.l (is); - r6 = R5.H * r0.l; - - r2.h = r7.l * r6.H (M, iu); - r3.H = r5.H * r0.L; - R0.H = r1.L * r1.H (M); - r1 = r7.H * r6.L (M, is); - R5 = r0.l * r2.h; - r3 = r6.H * r0.H (m); - - .text - .global multiply32 -multiply32: - R4 *= r0; - r7 *= R2; - - .text - .global multiply_accumulate -multiply_accumulate: - a0 = r5.l * R7.H (w32); - a0 = r0.h * r0.l; - A0 += R2.L * r3.H (FU); - A0 += r4.h * r1.L; - a0 -= r7.l * r6.H (Is); - A0 -= R5.H * r2.H; - - a1 = r1.L * r0.H (M); - A1 = r2.h * r0.L; - A1 = R7.H * R6.L (M, W32); - a1 += r3.l * r2.l (fu); - a1 += R6.H * r1.L; - A1 -= r0.L * R3.H (is); - a1 -= r2.l * r7.h; - - .text - .global multiply_accumulate_half -multiply_accumulate_half: - r7.l = (a0 = r6.H * r5.L); - r0.L = (A0 = r1.h * R2.l) (tfu); - R2.L = (a0 += r5.L * r4.L); - r3.l = (A0 += r7.H * r6.h) (T); - r0.l = (a0 -= r3.h * r2.h); - r1.l = (a0 -= r5.L * r4.L) (iH); - - r1.H = (a1 = r1.l * R0.H); - r2.h = (A1 = r0.H * r3.L) (M, Iss2); - R6.H = (a1 += r7.l * r7.H); - r7.h = (a1 += R2.L * R3.L) (S2rnd); - r6.H = (A1 -= R4.h * r2.h); - r5.h = (a1 -= r3.H * r7.L) (M, tFu); - - .text - .global multiply_accumulate_data_reg -multiply_accumulate_data_reg: - R0 = (A0 = R1.L * R2.L); - R2 = (A0 = r1.l * r2.l) (is); - r4 = (a0 += r7.h * r6.L); - r6 = (A0 += R5.L * r3.h) (s2RND); - R6 = (a0 -= r2.h * r7.l); - r4 = (A0 -= R0.L * r6.H) (FU); - - r7 = (a1 = r0.h * r1.l); - R5 = (A1 = r2.H * r3.H) (M, fu); - R3 = (A1 += r7.l * r5.l); - r1 = (a1 += r2.h * r7.h) (iss2); - r3 = (A1 -= r0.l * R0.H); - R5 = (a1 -= R2.l * R7.h) (m, is); - - .text - .global negate -negate: - R5 = - r0; - r7 = -R2(s); - R7 = -r2(Ns); - A0 = -A0; - a0 = -a1; - A1 = -A0; - a1 = -A1; - a1 = -a1, a0 = -a0; - - .text - .global round_half -round_half: - R5.L = r3 (rnd); - r6.H = r0 (RND); - - .text - .global saturate -saturate: - A0 = A0 (S); - a1 = a1 (s); - A1 = a1 (S), a0 = A0 (s); - - .text - .global signbits -signbits: - R5.l = signbits r0; - r0.L = SIGNbits r7.H; - r3.l = signBits A0; - r7.L = SIGNBITS a1; - - .text - .global subtract -subtract: - R5 = R3 - R0; - R7 = R7 - r0 (S); - r3 = r2 - r1 (ns); - - r5.l = R6.H - R7.h (s); - r0.H = r3.l - r3.h (NS); - - .text - .global subtract_immediate -subtract_immediate: - I2 -= 2; - i0 -= 4; - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/bfin.exp b/binutils-2.17/gas/testsuite/gas/bfin/bfin.exp deleted file mode 100644 index 51690a16..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/bfin.exp +++ /dev/null @@ -1,48 +0,0 @@ -# Blackfin assembler testsuite - -proc run_list_test { name opts } { - global srcdir subdir - set testname "bfin $name" - set file $srcdir/$subdir/$name - gas_run ${name}.s $opts ">&dump.out" - if { [regexp_diff "dump.out" "${file}.l"] } then { - fail $testname - verbose "output is [file_contents "dump.out"]" 2 - return - } - pass $testname -} -if [istarget bfin*-*-*] { - run_dump_test "arithmetic" - run_dump_test "bit" - run_dump_test "bit2" - run_dump_test "cache" - run_dump_test "cache2" - run_dump_test "control_code" - run_dump_test "control_code2" - run_dump_test "event" - run_dump_test "event2" - run_list_test "expected_errors" "" - run_list_test "expected_move_errors" "" - run_dump_test "flow" - run_dump_test "flow2" - run_dump_test "load" - run_dump_test "logical" - run_dump_test "logical2" - run_dump_test "move" - run_dump_test "move2" - run_dump_test "parallel" - run_dump_test "parallel2" - run_dump_test "parallel3" - run_dump_test "parallel4" - run_dump_test "reloc" - run_dump_test "shift" - run_dump_test "shift2" - run_dump_test "stack" - run_dump_test "stack2" - run_dump_test "store" - run_dump_test "vector" - run_dump_test "vector2" - run_dump_test "video" - run_dump_test "video2" -} diff --git a/binutils-2.17/gas/testsuite/gas/bfin/bit.d b/binutils-2.17/gas/testsuite/gas/bfin/bit.d deleted file mode 100644 index fa334c24..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/bit.d +++ /dev/null @@ -1,42 +0,0 @@ -#objdump: -dr -#name: bit -.*: +file format .* -Disassembly of section .text: - -00000000 <bitclr>: - 0: fc 4c BITCLR \(R4,0x1f\); - 2: 00 4c BITCLR \(R0,0x0\); - -00000004 <bitset>: - 4: f2 4a BITSET \(R2,0x1e\); - 6: eb 4a BITSET \(R3,0x1d\); - -00000008 <bittgl>: - 8: b7 4b BITTGL \(R7,0x16\); - a: 86 4b BITTGL \(R6,0x10\); - -0000000c <bittst>: - c: f8 49 CC = BITTST \(R0,0x1f\); - e: 01 49 CC = BITTST \(R1,0x0\); - 10: 7f 49 CC = BITTST \(R7,0xf\); - -00000012 <deposit>: - 12: 0a c6 13 8a R5=DEPOSIT\(R3,R2\); - 16: 0a c6 37 c0 R0=DEPOSIT\(R7,R6\)\(X\); - -0000001a <extract>: - 1a: 0a c6 0a 08 R4=EXTRACT\(R2,R1.L\) \(Z\); - 1e: 0a c6 10 04 R2=EXTRACT\(R0,R2.L\) \(Z\); - 22: 0a c6 23 4e R7=EXTRACT\(R3,R4.L\)\(X\); - 26: 0a c6 0e 4a R5=EXTRACT\(R6,R1.L\)\(X\); - -0000002a <bitmux>: - 2a: 08 c6 08 00 BITMUX \(R1,R0,A0 \)\(ASR\); - 2e: 08 c6 13 00 BITMUX \(R2,R3,A0 \)\(ASR\); - 32: 08 c6 25 40 BITMUX \(R4,R5,A0 \)\(ASL\); - 36: 08 c6 3e 40 BITMUX \(R7,R6,A0 \)\(ASL\); - -0000003a <ones>: - 3a: 06 c6 00 ca R5.L=ONES R0; - 3e: 06 c6 02 ce R7.L=ONES R2; - ... diff --git a/binutils-2.17/gas/testsuite/gas/bfin/bit.s b/binutils-2.17/gas/testsuite/gas/bfin/bit.s deleted file mode 100644 index 5bf501ab..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/bit.s +++ /dev/null @@ -1,54 +0,0 @@ - .text - .global bitclr -bitclr: - bitclr(r4, 31); - bitCLR (r0, 0); - - .text - .global bitset -bitset: - BITSET(R2, 30); - BiTsET (r3, 29); - - .text - .global bittgl -bittgl: - bitTGL(r7, 22); - BITtgl (r6, 16); - - .text - .global bittst -bittst: - cc = bittst (r0, 31); - CC = BITTST (r1, 0); - cC = BittST (r7, 15); - - .text - .global deposit -deposit: - R5 = Deposit (r3, r2); - r0 = DEPOSIT (r7, R6) (X); - - .text - .global extract -extract: - r4 = extract (r2, r1.L) (z); - R2 = EXTRACT (r0, r2.l) (Z); - - r7 = ExtracT (r3, r4.L) (X); - r5 = ExtRACt (R6, R1.L) (x); - - .text - .global bitmux -bitmux: - BITMUX(R1, R0, A0) (ASR); - Bitmux (r2, R3, a0) (aSr); - - bitmux (r4, r5, a0) (asl); - BiTMux (R7, r6, a0) (ASl); - - .text - .global ones -ones: - R5.l = ones r0; - r7.L = Ones R2; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/bit2.d b/binutils-2.17/gas/testsuite/gas/bfin/bit2.d deleted file mode 100644 index 77a4964f..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/bit2.d +++ /dev/null @@ -1,70 +0,0 @@ -#objdump: -dr -#name: bit2 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 07 4c BITCLR \(R7,0x0\); - 2: ff 4c BITCLR \(R7,0x1f\); - 4: 7f 4c BITCLR \(R7,0xf\); - 6: 01 4c BITCLR \(R1,0x0\); - 8: 0a 4c BITCLR \(R2,0x1\); - a: 9b 4c BITCLR \(R3,0x13\); - c: 07 4a BITSET \(R7,0x0\); - e: ff 4a BITSET \(R7,0x1f\); - 10: 7f 4a BITSET \(R7,0xf\); - 12: 01 4a BITSET \(R1,0x0\); - 14: 0a 4a BITSET \(R2,0x1\); - 16: 9b 4a BITSET \(R3,0x13\); - 18: 07 4b BITTGL \(R7,0x0\); - 1a: ff 4b BITTGL \(R7,0x1f\); - 1c: 7f 4b BITTGL \(R7,0xf\); - 1e: 01 4b BITTGL \(R1,0x0\); - 20: 0a 4b BITTGL \(R2,0x1\); - 22: 9b 4b BITTGL \(R3,0x13\); - 24: 07 49 CC = BITTST \(R7,0x0\); - 26: ff 49 CC = BITTST \(R7,0x1f\); - 28: 7f 49 CC = BITTST \(R7,0xf\); - 2a: 01 49 CC = BITTST \(R1,0x0\); - 2c: 0a 49 CC = BITTST \(R2,0x1\); - 2e: 9b 49 CC = BITTST \(R3,0x13\); - 30: 07 48 CC = ! BITTST \(R7,0x0\); - 32: ff 48 CC = ! BITTST \(R7,0x1f\); - 34: 7f 48 CC = ! BITTST \(R7,0xf\); - 36: 01 48 CC = ! BITTST \(R1,0x0\); - 38: 0a 48 CC = ! BITTST \(R2,0x1\); - 3a: 9b 48 CC = ! BITTST \(R3,0x13\); - 3c: 0a c6 08 8e R7=DEPOSIT\(R0,R1\); - 40: 0a c6 0f 8e R7=DEPOSIT\(R7,R1\); - 44: 0a c6 3f 8e R7=DEPOSIT\(R7,R7\); - 48: 0a c6 08 82 R1=DEPOSIT\(R0,R1\); - 4c: 0a c6 0f 84 R2=DEPOSIT\(R7,R1\); - 50: 0a c6 3f 86 R3=DEPOSIT\(R7,R7\); - 54: 0a c6 08 ce R7=DEPOSIT\(R0,R1\)\(X\); - 58: 0a c6 0f ce R7=DEPOSIT\(R7,R1\)\(X\); - 5c: 0a c6 3f ce R7=DEPOSIT\(R7,R7\)\(X\); - 60: 0a c6 08 c2 R1=DEPOSIT\(R0,R1\)\(X\); - 64: 0a c6 0f c4 R2=DEPOSIT\(R7,R1\)\(X\); - 68: 0a c6 3f c6 R3=DEPOSIT\(R7,R7\)\(X\); - 6c: 0a c6 08 0e R7=EXTRACT\(R0,R1.L\) \(Z\); - 70: 0a c6 0f 0e R7=EXTRACT\(R7,R1.L\) \(Z\); - 74: 0a c6 3f 0e R7=EXTRACT\(R7,R7.L\) \(Z\); - 78: 0a c6 08 02 R1=EXTRACT\(R0,R1.L\) \(Z\); - 7c: 0a c6 0f 04 R2=EXTRACT\(R7,R1.L\) \(Z\); - 80: 0a c6 3f 06 R3=EXTRACT\(R7,R7.L\) \(Z\); - 84: 0a c6 08 4e R7=EXTRACT\(R0,R1.L\)\(X\); - 88: 0a c6 0f 4e R7=EXTRACT\(R7,R1.L\)\(X\); - 8c: 0a c6 3f 4e R7=EXTRACT\(R7,R7.L\)\(X\); - 90: 0a c6 08 42 R1=EXTRACT\(R0,R1.L\)\(X\); - 94: 0a c6 0f 44 R2=EXTRACT\(R7,R1.L\)\(X\); - 98: 0a c6 3f 46 R3=EXTRACT\(R7,R7.L\)\(X\); - 9c: 08 c6 01 00 BITMUX \(R0,R1,A0 \)\(ASR\); - a0: 08 c6 02 00 BITMUX \(R0,R2,A0 \)\(ASR\); - a4: 08 c6 0b 00 BITMUX \(R1,R3,A0 \)\(ASR\); - a8: 08 c6 01 40 BITMUX \(R0,R1,A0 \)\(ASL\); - ac: 08 c6 0a 40 BITMUX \(R1,R2,A0 \)\(ASL\); - b0: 06 c6 00 c0 R0.L=ONES R0; - b4: 06 c6 01 c0 R0.L=ONES R1; - b8: 06 c6 06 c2 R1.L=ONES R6; - bc: 06 c6 07 c4 R2.L=ONES R7; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/bit2.s b/binutils-2.17/gas/testsuite/gas/bfin/bit2.s deleted file mode 100755 index 1977ef7f..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/bit2.s +++ /dev/null @@ -1,98 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//8 BIT OPERATIONS
-//
-
-//BITCLR ( Dreg , uimm5 ) ; /* (a) */
-BITCLR ( R7 , 0 ) ;
-BITCLR ( R7 , 31 ) ;
-BITCLR ( R7 , 15 ) ;
-BITCLR ( R1 , 0 ) ;
-BITCLR ( R2 , 1 ) ;
-BITCLR ( R3 , 19 ) ;
-
-//BITSET ( Dreg , uimm5 ) ; /* (a) */
-BITSET ( R7 , 0 ) ;
-BITSET ( R7 , 31 ) ;
-BITSET ( R7 , 15 ) ;
-BITSET ( R1 , 0 ) ;
-BITSET ( R2 , 1 ) ;
-BITSET ( R3 , 19 ) ;
-
-//BITTGL ( Dreg , uimm5 ) ; /* (a) */
-BITTGL ( R7 , 0 ) ;
-BITTGL ( R7 , 31 ) ;
-BITTGL ( R7 , 15 ) ;
-BITTGL ( R1 , 0 ) ;
-BITTGL ( R2 , 1 ) ;
-BITTGL ( R3 , 19 ) ;
-
-//CC = BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 1 (a)*/
-CC = BITTST ( R7 , 0 ) ;
-CC = BITTST ( R7 , 31 ) ;
-CC = BITTST ( R7 , 15 ) ;
-CC = BITTST ( R1 , 0 ) ;
-CC = BITTST ( R2 , 1 ) ;
-CC = BITTST ( R3 , 19 ) ;
-
-//CC = ! BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 0 (a)*/
-CC = !BITTST ( R7 , 0 ) ;
-CC = !BITTST ( R7 , 31 ) ;
-CC = !BITTST ( R7 , 15 ) ;
-CC = !BITTST ( R1 , 0 ) ;
-CC = !BITTST ( R2 , 1 ) ;
-CC = !BITTST ( R3 , 19 ) ;
-
-//Dreg = DEPOSIT ( Dreg, Dreg ) ; /* no extension (b) */
-R7 = DEPOSIT(R0, R1);
-R7 = DEPOSIT(R7, R1);
-R7 = DEPOSIT(R7, R7);
-R1 = DEPOSIT(R0, R1);
-R2 = DEPOSIT(R7, R1);
-R3 = DEPOSIT(R7, R7);
-
-//Dreg = DEPOSIT ( Dreg, Dreg ) (X) ; /* sign-extended (b) */
-R7 = DEPOSIT(R0, R1)(X);
-R7 = DEPOSIT(R7, R1)(X);
-R7 = DEPOSIT(R7, R7)(X);
-R1 = DEPOSIT(R0, R1)(X);
-R2 = DEPOSIT(R7, R1)(X);
-R3 = DEPOSIT(R7, R7)(X);
-
-//Dreg = EXTRACT ( Dreg, Dreg_lo ) (Z) ; /* zero-extended (b)*/
-R7 = EXTRACT(R0, R1.L)(Z);
-R7 = EXTRACT(R7, R1.L)(Z);
-R7 = EXTRACT(R7, R7.L)(Z);
-R1 = EXTRACT(R0, R1.L)(Z);
-R2 = EXTRACT(R7, R1.L)(Z);
-R3 = EXTRACT(R7, R7.L)(Z);
-
-//Dreg = EXTRACT ( Dreg, Dreg_lo ) (X) ; /* sign-extended (b)*/
-R7 = EXTRACT(R0, R1.L)(X);
-R7 = EXTRACT(R7, R1.L)(X);
-R7 = EXTRACT(R7, R7.L)(X);
-R1 = EXTRACT(R0, R1.L)(X);
-R2 = EXTRACT(R7, R1.L)(X);
-R3 = EXTRACT(R7, R7.L)(X);
-
-//BITMUX ( Dreg , Dreg , A0 ) (ASR) ; /* shift right, LSB is shifted out (b) */
-BITMUX(R0, R1, A0)(ASR);
-BITMUX(R0, R2, A0)(ASR);
-BITMUX(R1, R3, A0)(ASR);
-//BITMUX(R0, R0, A0)(ASR);
-
-//BITMUX ( Dreg , Dreg , A0 ) (ASL) ; /* shift left, MSB is shifted out (b) */
-//BITMUX(R0, R0, A0)(ASL);
-BITMUX(R0, R1, A0)(ASL);
-BITMUX(R1, R2, A0)(ASL);
-
-//Dreg_lo = ONES Dreg ; /* (b) */
-R0.L = ONES R0;
-R0.L = ONES R1;
-R1.L = ONES R6;
-R2.L = ONES R7;
-
-
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/cache.d b/binutils-2.17/gas/testsuite/gas/bfin/cache.d deleted file mode 100644 index 4d8d4b33..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/cache.d +++ /dev/null @@ -1,22 +0,0 @@ -#objdump: -dr -#name: cache -.*: +file format .* -Disassembly of section .text: - -00000000 <prefetch>: - 0: 45 02 PREFETCH\[P5\]; - 2: 67 02 PREFETCH\[FP\+\+\]; - 4: 46 02 PREFETCH\[SP\]; - -00000006 <flush>: - 6: 52 02 FLUSH\[P2\]; - 8: 76 02 FLUSH\[SP\+\+\]; - -0000000a <flushinv>: - a: 6c 02 FLUSHINV\[P4\+\+\]; - c: 4f 02 FLUSHINV\[FP\]; - -0000000e <iflush>: - e: 5b 02 IFLUSH\[P3\]; - 10: 7f 02 IFLUSH\[FP\+\+\]; - ... diff --git a/binutils-2.17/gas/testsuite/gas/bfin/cache.s b/binutils-2.17/gas/testsuite/gas/bfin/cache.s deleted file mode 100644 index 925d8096..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/cache.s +++ /dev/null @@ -1,24 +0,0 @@ - .text - .global prefetch -prefetch: - prefetch[p5]; - PreFetch [fp++]; - PREFETCH [SP]; - - .text - .global flush -flush: - flush[ p2 ]; - FLUsH [SP++]; - - .text - .global flushinv -flushinv: - flushinv[ P4 ++ ]; - FLUshINv [ fp ]; - - .text - .global iflush -iflush: - iflush[ p3 ]; - iflush [ fp++ ]; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/cache2.d b/binutils-2.17/gas/testsuite/gas/bfin/cache2.d deleted file mode 100644 index a6dc7e8c..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/cache2.d +++ /dev/null @@ -1,70 +0,0 @@ -#objdump: -dr -#name: cache2 -.*: +file format .* -Disassembly of section .text: - -00000000 <.text>: - 0: 40 02 PREFETCH\[P0\]; - 2: 41 02 PREFETCH\[P1\]; - 4: 42 02 PREFETCH\[P2\]; - 6: 43 02 PREFETCH\[P3\]; - 8: 44 02 PREFETCH\[P4\]; - a: 45 02 PREFETCH\[P5\]; - c: 46 02 PREFETCH\[SP\]; - e: 47 02 PREFETCH\[FP\]; - 10: 60 02 PREFETCH\[P0\+\+\]; - 12: 61 02 PREFETCH\[P1\+\+\]; - 14: 62 02 PREFETCH\[P2\+\+\]; - 16: 63 02 PREFETCH\[P3\+\+\]; - 18: 64 02 PREFETCH\[P4\+\+\]; - 1a: 65 02 PREFETCH\[P5\+\+\]; - 1c: 66 02 PREFETCH\[SP\+\+\]; - 1e: 67 02 PREFETCH\[FP\+\+\]; - 20: 50 02 FLUSH\[P0\]; - 22: 51 02 FLUSH\[P1\]; - 24: 52 02 FLUSH\[P2\]; - 26: 53 02 FLUSH\[P3\]; - 28: 54 02 FLUSH\[P4\]; - 2a: 55 02 FLUSH\[P5\]; - 2c: 56 02 FLUSH\[SP\]; - 2e: 57 02 FLUSH\[FP\]; - 30: 70 02 FLUSH\[P0\+\+\]; - 32: 71 02 FLUSH\[P1\+\+\]; - 34: 72 02 FLUSH\[P2\+\+\]; - 36: 73 02 FLUSH\[P3\+\+\]; - 38: 74 02 FLUSH\[P4\+\+\]; - 3a: 75 02 FLUSH\[P5\+\+\]; - 3c: 76 02 FLUSH\[SP\+\+\]; - 3e: 77 02 FLUSH\[FP\+\+\]; - 40: 48 02 FLUSHINV\[P0\]; - 42: 49 02 FLUSHINV\[P1\]; - 44: 4a 02 FLUSHINV\[P2\]; - 46: 4b 02 FLUSHINV\[P3\]; - 48: 4c 02 FLUSHINV\[P4\]; - 4a: 4d 02 FLUSHINV\[P5\]; - 4c: 4e 02 FLUSHINV\[SP\]; - 4e: 4f 02 FLUSHINV\[FP\]; - 50: 68 02 FLUSHINV\[P0\+\+\]; - 52: 69 02 FLUSHINV\[P1\+\+\]; - 54: 6a 02 FLUSHINV\[P2\+\+\]; - 56: 6b 02 FLUSHINV\[P3\+\+\]; - 58: 6c 02 FLUSHINV\[P4\+\+\]; - 5a: 6d 02 FLUSHINV\[P5\+\+\]; - 5c: 6e 02 FLUSHINV\[SP\+\+\]; - 5e: 6f 02 FLUSHINV\[FP\+\+\]; - 60: 58 02 IFLUSH\[P0\]; - 62: 59 02 IFLUSH\[P1\]; - 64: 5a 02 IFLUSH\[P2\]; - 66: 5b 02 IFLUSH\[P3\]; - 68: 5c 02 IFLUSH\[P4\]; - 6a: 5d 02 IFLUSH\[P5\]; - 6c: 5e 02 IFLUSH\[SP\]; - 6e: 5f 02 IFLUSH\[FP\]; - 70: 78 02 IFLUSH\[P0\+\+\]; - 72: 79 02 IFLUSH\[P1\+\+\]; - 74: 7a 02 IFLUSH\[P2\+\+\]; - 76: 7b 02 IFLUSH\[P3\+\+\]; - 78: 7c 02 IFLUSH\[P4\+\+\]; - 7a: 7d 02 IFLUSH\[P5\+\+\]; - 7c: 7e 02 IFLUSH\[SP\+\+\]; - 7e: 7f 02 IFLUSH\[FP\+\+\]; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/cache2.s b/binutils-2.17/gas/testsuite/gas/bfin/cache2.s deleted file mode 100755 index ed4aa266..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/cache2.s +++ /dev/null @@ -1,86 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//12 CACHE CONTROL
-//
-
-//PREFETCH [ Preg ] ; /* indexed (a) */
-PREFETCH [ P0 ] ;
-PREFETCH [ P1 ] ;
-PREFETCH [ P2 ] ;
-PREFETCH [ P3 ] ;
-PREFETCH [ P4 ] ;
-PREFETCH [ P5 ] ;
-PREFETCH [ SP ] ;
-PREFETCH [ FP ] ;
-
-//PREFETCH [ Preg ++ ] ; /* indexed, post increment (a) */
-PREFETCH [ P0++ ] ;
-PREFETCH [ P1++ ] ;
-PREFETCH [ P2++ ] ;
-PREFETCH [ P3++ ] ;
-PREFETCH [ P4++ ] ;
-PREFETCH [ P5++ ] ;
-PREFETCH [ SP++ ] ;
-PREFETCH [ FP++ ] ;
-
-//FLUSH [ Preg ] ; /* indexed (a) */
-FLUSH [ P0 ] ;
-FLUSH [ P1 ] ;
-FLUSH [ P2 ] ;
-FLUSH [ P3 ] ;
-FLUSH [ P4 ] ;
-FLUSH [ P5 ] ;
-FLUSH [ SP ] ;
-FLUSH [ FP ] ;
-//FLUSH [ Preg ++ ] ; /* indexed, post increment (a) */
-FLUSH [ P0++ ] ;
-FLUSH [ P1++ ] ;
-FLUSH [ P2++ ] ;
-FLUSH [ P3++ ] ;
-FLUSH [ P4++ ] ;
-FLUSH [ P5++ ] ;
-FLUSH [ SP++ ] ;
-FLUSH [ FP++ ] ;
-
-//FLUSHINV [ Preg ] ; /* indexed (a) */
-FLUSHINV [ P0 ] ;
-FLUSHINV [ P1 ] ;
-FLUSHINV [ P2 ] ;
-FLUSHINV [ P3 ] ;
-FLUSHINV [ P4 ] ;
-FLUSHINV [ P5 ] ;
-FLUSHINV [ SP ] ;
-FLUSHINV [ FP ] ;
-
-//FLUSHINV [ Preg ++ ] ; /* indexed, post increment (a) */
-FLUSHINV [ P0++ ] ;
-FLUSHINV [ P1++ ] ;
-FLUSHINV [ P2++ ] ;
-FLUSHINV [ P3++ ] ;
-FLUSHINV [ P4++ ] ;
-FLUSHINV [ P5++ ] ;
-FLUSHINV [ SP++ ] ;
-FLUSHINV [ FP++ ] ;
-
-//IFLUSH [ Preg ] ; /* indexed (a) */
-IFLUSH [ P0 ] ;
-IFLUSH [ P1 ] ;
-IFLUSH [ P2 ] ;
-IFLUSH [ P3 ] ;
-IFLUSH [ P4 ] ;
-IFLUSH [ P5 ] ;
-IFLUSH [ SP ] ;
-IFLUSH [ FP ] ;
-
-//IFLUSH [ Preg ++ ] ; /* indexed, post increment (a) */
-IFLUSH [ P0++ ] ;
-IFLUSH [ P1++ ] ;
-IFLUSH [ P2++ ] ;
-IFLUSH [ P3++ ] ;
-IFLUSH [ P4++ ] ;
-IFLUSH [ P5++ ] ;
-IFLUSH [ SP++ ] ;
-IFLUSH [ FP++ ] ;
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/control_code.d b/binutils-2.17/gas/testsuite/gas/bfin/control_code.d deleted file mode 100644 index 71a4563c..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/control_code.d +++ /dev/null @@ -1,62 +0,0 @@ -#objdump: -dr -#name: control_code -.*: +file format .* -Disassembly of section .text: - -00000000 <compare_data_register>: - 0: 06 08 CC=R6==R0; - 2: 17 08 CC=R7==R2; - 4: 33 0c CC=R3==-2; - 6: 88 08 CC=R0<R1; - 8: a4 0c CC=R4<-4; - a: 2c 09 CC=R4<=R5; - c: 1d 0d CC=R5<=0x3; - e: be 09 CC=R6<R7\(IU\); - 10: a7 0d CC=R7<0x4\(IU\); - 12: 1d 0a CC=R5<=R3\(IU\); - 14: 2a 0e CC=R2<=0x5\(IU\); - -00000016 <compare_pointer>: - 16: 46 08 CC=SP==P0; - 18: 47 0c CC=FP==0x0; - 1a: f7 08 CC=FP<SP; - 1c: a1 0c CC=R1<-4; - 1e: 11 09 CC=R1<=R2; - 20: 1b 0d CC=R3<=0x3; - 22: b5 09 CC=R5<R6\(IU\); - 24: bf 0d CC=R7<0x7\(IU\); - 26: 08 0a CC=R0<=R1\(IU\); - 28: 02 0e CC=R2<=0x0\(IU\); - -0000002a <compare_accumulator>: - 2a: 80 0a CC=A0==A1; - 2c: 00 0b CC=A0<A1; - 2e: 80 0b CC=A0<=A1; - -00000030 <move_cc>: - 30: 00 02 R0=CC; - 32: ac 03 AC0\|=CC; - 34: 80 03 AZ=CC; - 36: 81 03 AN=CC; - 38: cd 03 AC1&=CC; - 3a: f8 03 V\^=CC; - 3c: 98 03 V=CC; - 3e: b9 03 VS\|=CC; - 40: 90 03 AV0=CC; - 42: d2 03 AV1&=CC; - 44: 93 03 AV1S=CC; - 46: a6 03 AQ\|=CC; - 48: 0c 02 CC=R4; - 4a: 00 03 CC = AZ; - 4c: 21 03 CC\|=AN; - 4e: 4c 03 CC&=AC0; - 50: 6d 03 CC\^=AC1; - 52: 18 03 CC = V; - 54: 39 03 CC\|=VS; - 56: 50 03 CC&=AV0; - 58: 72 03 CC\^=AV1; - 5a: 13 03 CC = AV1S; - 5c: 26 03 CC\|=AQ; - -0000005e <negate_cc>: - 5e: 18 02 CC=!CC; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/control_code.s b/binutils-2.17/gas/testsuite/gas/bfin/control_code.s deleted file mode 100644 index ef492a3b..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/control_code.s +++ /dev/null @@ -1,70 +0,0 @@ - .text - .global compare_data_register -compare_data_register: - cc = r6 == r0; - Cc = R7 == r2; - CC = R3 == -2; - cc = r0 < r1; - cC = r4 < -4; - Cc = r4 <= R5; - cc = r5 <= 3; - cc = r6 < r7 (iu); - cc = R7 < 4 (iu); - CC = r5 <= R3 (Iu); - Cc = R2 <= 5 (iU); - - .text - .global compare_pointer -compare_pointer: - cc = sp == p0; - cC = FP == 0; - CC = FP < SP; - Cc = r1 < -4; - CC = R1 <= R2; - cc = r3 <= 3; - cC = r5 < R6 (iu); - Cc = R7 < 7 (Iu); - cC = r0 <= r1 (iU); - cc = r2 <= 0 (IU); - - .global compare_accumulator - .text -compare_accumulator: - CC = A0 == A1; - cc = A0 < a1; - cc = a0 <= a1; - - .text - .global move_cc -move_cc: - R0 = cc; - ac0 |= cc; - AZ = Cc; - an = Cc; - AC1 &= cC; - v ^= cc; - V = CC; - VS |= cC; - aV0 = cc; - Av1 &= CC; - AV1s = cc; - AQ |= cc; - - CC = R4; - cc = AZ; - cc |= An; - CC &= Ac0; - Cc ^= aC1; - CC = V; - cC |= vS; - Cc &= AV0; - cc ^= av1; - cc = av1s; - cC |= aQ; - - - .text - .global negate_cc -negate_cc: - cc = !cc; - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/control_code2.d b/binutils-2.17/gas/testsuite/gas/bfin/control_code2.d deleted file mode 100644 index 15cfdab8..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/control_code2.d +++ /dev/null @@ -1,186 +0,0 @@ -#objdump: -dr -#name: control_code2 -.*: +file format .* -Disassembly of section .text: - -00000000 <.text>: - 0: 07 08 CC=R7==R0; - 2: 0e 08 CC=R6==R1; - 4: 38 08 CC=R0==R7; - 6: 27 0c CC=R7==-4; - 8: 1f 0c CC=R7==0x3; - a: 20 0c CC=R0==-4; - c: 18 0c CC=R0==0x3; - e: 87 08 CC=R7<R0; - 10: 86 08 CC=R6<R0; - 12: 8f 08 CC=R7<R1; - 14: b9 08 CC=R1<R7; - 16: b0 08 CC=R0<R6; - 18: a7 0c CC=R7<-4; - 1a: a6 0c CC=R6<-4; - 1c: 9f 0c CC=R7<0x3; - 1e: 99 0c CC=R1<0x3; - 20: 07 09 CC=R7<=R0; - 22: 06 09 CC=R6<=R0; - 24: 0f 09 CC=R7<=R1; - 26: 39 09 CC=R1<=R7; - 28: 30 09 CC=R0<=R6; - 2a: 27 0d CC=R7<=-4; - 2c: 26 0d CC=R6<=-4; - 2e: 1f 0d CC=R7<=0x3; - 30: 19 0d CC=R1<=0x3; - 32: 87 09 CC=R7<R0\(IU\); - 34: 86 09 CC=R6<R0\(IU\); - 36: 8f 09 CC=R7<R1\(IU\); - 38: b9 09 CC=R1<R7\(IU\); - 3a: b0 09 CC=R0<R6\(IU\); - 3c: 87 0d CC=R7<0x0\(IU\); - 3e: 86 0d CC=R6<0x0\(IU\); - 40: bf 0d CC=R7<0x7\(IU\); - 42: b9 0d CC=R1<0x7\(IU\); - 44: 07 0a CC=R7<=R0\(IU\); - 46: 06 0a CC=R6<=R0\(IU\); - 48: 0f 0a CC=R7<=R1\(IU\); - 4a: 39 0a CC=R1<=R7\(IU\); - 4c: 30 0a CC=R0<=R6\(IU\); - 4e: 07 0e CC=R7<=0x0\(IU\); - 50: 06 0e CC=R6<=0x0\(IU\); - 52: 3f 0e CC=R7<=0x7\(IU\); - 54: 39 0e CC=R1<=0x7\(IU\); - 56: 45 08 CC=P5==P0; - 58: 4d 08 CC=P5==P1; - 5a: 50 08 CC=P0==P2; - 5c: 6b 08 CC=P3==P5; - 5e: 65 0c CC=P5==-4; - 60: 45 0c CC=P5==0x0; - 62: 5d 0c CC=P5==0x3; - 64: 62 0c CC=P2==-4; - 66: 42 0c CC=P2==0x0; - 68: 5a 0c CC=P2==0x3; - 6a: c5 08 CC=P5<P0; - 6c: cd 08 CC=P5<P1; - 6e: d0 08 CC=P0<P2; - 70: eb 08 CC=P3<P5; - 72: e5 0c CC=P5<-4; - 74: c5 0c CC=P5<0x0; - 76: dd 0c CC=P5<0x3; - 78: e2 0c CC=P2<-4; - 7a: c2 0c CC=P2<0x0; - 7c: da 0c CC=P2<0x3; - 7e: 45 09 CC=P5<=P0; - 80: 4d 09 CC=P5<=P1; - 82: 50 09 CC=P0<=P2; - 84: 6b 09 CC=P3<=P5; - 86: 65 0d CC=P5<=-4; - 88: 45 0d CC=P5<=0x0; - 8a: 5d 0d CC=P5<=0x3; - 8c: 62 0d CC=P2<=-4; - 8e: 42 0d CC=P2<=0x0; - 90: 5a 0d CC=P2<=0x3; - 92: c5 09 CC=P5<P0\(IU\); - 94: cd 09 CC=P5<P1\(IU\); - 96: d0 09 CC=P0<P2\(IU\); - 98: eb 09 CC=P3<P5\(IU\); - 9a: c5 0d CC=P5<0x0\(IU\); - 9c: fd 0d CC=P5<0x7\(IU\); - 9e: c2 0d CC=P2<0x0\(IU\); - a0: fa 0d CC=P2<0x7\(IU\); - a2: 45 0a CC=P5<=P0\(IU\); - a4: 4d 0a CC=P5<=P1\(IU\); - a6: 50 0a CC=P0<=P2\(IU\); - a8: 6b 0a CC=P3<=P5\(IU\); - aa: 45 0e CC=P5<=0x0\(IU\); - ac: 7d 0e CC=P5<=0x7\(IU\); - ae: 42 0e CC=P2<=0x0\(IU\); - b0: 7a 0e CC=P2<=0x7\(IU\); - b2: 80 0a CC=A0==A1; - b4: 00 0b CC=A0<A1; - b6: 80 0b CC=A0<=A1; - b8: 07 02 R7=CC; - ba: 00 02 R0=CC; - bc: 80 03 AZ=CC; - be: 81 03 AN=CC; - c0: 8c 03 AC0=CC; - c2: 8d 03 AC1=CC; - c4: 99 03 VS=CC; - c6: 90 03 AV0=CC; - c8: 91 03 AV0S=CC; - ca: 92 03 AV1=CC; - cc: 93 03 AV1S=CC; - ce: 86 03 AQ=CC; - d0: a0 03 AZ\|=CC; - d2: a1 03 AN\|=CC; - d4: ac 03 AC0\|=CC; - d6: ad 03 AC1\|=CC; - d8: b9 03 VS\|=CC; - da: b0 03 AV0\|=CC; - dc: b1 03 AV0S\|=CC; - de: b2 03 AV1\|=CC; - e0: b3 03 AV1S\|=CC; - e2: a6 03 AQ\|=CC; - e4: c0 03 AZ&=CC; - e6: c1 03 AN&=CC; - e8: cc 03 AC0&=CC; - ea: cd 03 AC1&=CC; - ec: d9 03 VS&=CC; - ee: d0 03 AV0&=CC; - f0: d1 03 AV0S&=CC; - f2: d2 03 AV1&=CC; - f4: d3 03 AV1S&=CC; - f6: c6 03 AQ&=CC; - f8: e0 03 AZ\^=CC; - fa: e1 03 AN\^=CC; - fc: ec 03 AC0\^=CC; - fe: ed 03 AC1\^=CC; - 100: f9 03 VS\^=CC; - 102: f0 03 AV0\^=CC; - 104: f1 03 AV0S\^=CC; - 106: f2 03 AV1\^=CC; - 108: f3 03 AV1S\^=CC; - 10a: e6 03 AQ\^=CC; - 10c: 0f 02 CC=R7; - 10e: 0e 02 CC=R6; - 110: 09 02 CC=R1; - 112: 08 02 CC=R0; - 114: 00 03 CC = AZ; - 116: 01 03 CC = AN; - 118: 0c 03 CC = AC0; - 11a: 0d 03 CC = AC1; - 11c: 19 03 CC = VS; - 11e: 10 03 CC = AV0; - 120: 11 03 CC = AV0S; - 122: 12 03 CC = AV1; - 124: 13 03 CC = AV1S; - 126: 06 03 CC = AQ; - 128: 20 03 CC\|=AZ; - 12a: 21 03 CC\|=AN; - 12c: 2c 03 CC\|=AC0; - 12e: 2d 03 CC\|=AC1; - 130: 39 03 CC\|=VS; - 132: 30 03 CC\|=AV0; - 134: 31 03 CC\|=AV0S; - 136: 32 03 CC\|=AV1; - 138: 33 03 CC\|=AV1S; - 13a: 26 03 CC\|=AQ; - 13c: 40 03 CC&=AZ; - 13e: 41 03 CC&=AN; - 140: 4c 03 CC&=AC0; - 142: 4d 03 CC&=AC1; - 144: 59 03 CC&=VS; - 146: 50 03 CC&=AV0; - 148: 51 03 CC&=AV0S; - 14a: 52 03 CC&=AV1; - 14c: 53 03 CC&=AV1S; - 14e: 46 03 CC&=AQ; - 150: 60 03 CC\^=AZ; - 152: 61 03 CC\^=AN; - 154: 6c 03 CC\^=AC0; - 156: 6d 03 CC\^=AC1; - 158: 79 03 CC\^=VS; - 15a: 70 03 CC\^=AV0; - 15c: 71 03 CC\^=AV0S; - 15e: 72 03 CC\^=AV1; - 160: 73 03 CC\^=AV1S; - 162: 66 03 CC\^=AQ; - 164: 18 02 CC=!CC; - ... diff --git a/binutils-2.17/gas/testsuite/gas/bfin/control_code2.s b/binutils-2.17/gas/testsuite/gas/bfin/control_code2.s deleted file mode 100755 index 4633bcc2..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/control_code2.s +++ /dev/null @@ -1,257 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//6 CONTROL CODE BIT MANAGEMENT
-//
-
-//CC = Dreg == Dreg ; /* equal, register, signed (a) */
-CC = R7 == R0;
-CC = R6 == R1;
-CC = R0 == R7;
-
-//CC = Dreg == imm3 ; /* equal, immediate, signed (a) */
-CC = R7 == -4;
-CC = R7 == 3;
-CC = R0 == -4;
-CC = R0 == 3;
-
-//CC = Dreg < Dreg ; /* less than, register, signed (a) */
-CC = R7 < R0;
-CC = R6 < R0;
-CC = R7 < R1;
-CC = R1 < R7;
-CC = R0 < R6;
-
-//CC = Dreg < imm3 ; /* less than, immediate, signed (a) */
-CC = R7 < -4;
-CC = R6 < -4;
-CC = R7 < 3;
-CC = R1 < 3;
-
-//CC = Dreg <= Dreg ; /* less than or equal, register, signed (a) */
-CC = R7 <= R0;
-CC = R6 <= R0;
-CC = R7 <= R1;
-CC = R1 <= R7;
-CC = R0 <= R6;
-
-//CC = Dreg <= imm3 ; /* less than or equal, immediate, signed (a) */
-CC = R7 <= -4;
-CC = R6 <= -4;
-CC = R7 <= 3;
-CC = R1 <= 3;
-
-//CC = Dreg < Dreg (IU) ; /* less than, register, unsigned (a) */
-CC = R7 < R0(IU);
-CC = R6 < R0(IU);
-CC = R7 < R1(IU);
-CC = R1 < R7(IU);
-CC = R0 < R6(IU);
-
-//CC = Dreg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */
-CC = R7 < 0(IU);
-CC = R6 < 0(IU);
-CC = R7 < 7(IU);
-CC = R1 < 7(IU);
-//CC = Dreg <= Dreg (IU) ; /* less than or equal, register, unsigned (a) */
-CC = R7 <= R0(IU);
-CC = R6 <= R0(IU);
-CC = R7 <= R1(IU);
-CC = R1 <= R7(IU);
-CC = R0 <= R6(IU);
-
-
-//CC = Dreg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */
-CC = R7 <= 0(IU);
-CC = R6 <= 0(IU);
-CC = R7 <= 7(IU);
-CC = R1 <= 7(IU);
-
-//CC = Preg == Preg ; /* equal, register, signed (a) */
-CC = P5 == P0;
-CC = P5 == P1;
-CC = P0 == P2;
-CC = P3 == P5;
-
-//CC = Preg == imm3 ; /* equal, immediate, signed (a) */
-CC = P5 == -4;
-CC = P5 == 0;
-CC = P5 == 3;
-CC = P2 == -4;
-CC = P2 == 0;
-CC = P2 == 3;
-
-//CC = Preg < Preg ; /* less than, register, signed (a) */
-CC = P5 < P0;
-CC = P5 < P1;
-CC = P0 < P2;
-CC = P3 < P5;
-
-//CC = Preg < imm3 ; /* less than, immediate, signed (a) */
-CC = P5 < -4;
-CC = P5 < 0;
-CC = P5 < 3;
-CC = P2 < -4;
-CC = P2 < 0;
-CC = P2 < 3;
-
-
-//CC = Preg <= Preg ; /* less than or equal, register, signed (a) */
-CC = P5 <= P0;
-CC = P5 <= P1;
-CC = P0 <= P2;
-CC = P3 <= P5;
-
-//CC = Preg <= imm3 ; /* less than or equal, immediate, signed (a) */
-CC = P5 <= -4;
-CC = P5 <= 0;
-CC = P5 <= 3;
-CC = P2 <= -4;
-CC = P2 <= 0;
-CC = P2 <= 3;
-
-//CC = Preg < Preg (IU) ; /* less than, register, unsigned (a) */
-CC = P5 < P0(IU);
-CC = P5 < P1(IU);
-CC = P0 < P2(IU);
-CC = P3 < P5(IU);
-
-//CC = Preg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */
-CC = P5 < 0(IU);
-CC = P5 < 7(IU);
-CC = P2 < 0(IU);
-CC = P2 < 7(IU);
-
-//CC = Preg <= Preg (IU) ; /* less than or equal, register, unsigned (a) */
-CC = P5 <= P0(IU);
-CC = P5 <= P1(IU);
-CC = P0 <= P2(IU);
-CC = P3 <= P5(IU);
-
-//CC = Preg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */
-CC = P5 <= 0(IU);
-CC = P5 <= 7(IU);
-CC = P2 <= 0(IU);
-CC = P2 <= 7(IU);
-
-CC = A0 == A1 ; /* equal, signed (a) */
-CC = A0 < A1 ; /* less than, Accumulator, signed (a) */
-CC = A0 <= A1 ; /* less than or equal, Accumulator, signed (a) */
-
-//Dreg = CC ; /* CC into 32-bit data register, zero-extended (a) */
-R7 = CC;
-R0 = CC;
-
-//statbit = CC ; /* status bit equals CC (a) */
-AZ = CC;
-AN = CC;
-AC0= CC;
-AC1= CC;
-//V = CC;
-VS = CC;
-AV0= CC;
-AV0S= CC;
-AV1 = CC;
-AV1S= CC;
-AQ = CC;
-//statbit |= CC ; /* status bit equals status bit OR CC (a) */
-AZ |= CC;
-AN |= CC;
-AC0|= CC;
-AC1|= CC;
-//V |= CC;
-VS |= CC;
-AV0|= CC;
-AV0S|= CC;
-AV1 |= CC;
-AV1S|= CC;
-AQ |= CC;
-
-//statbit &= CC ; /* status bit equals status bit AND CC (a) */
-AZ &= CC;
-AN &= CC;
-AC0&= CC;
-AC1&= CC;
-//V &= CC;
-VS &= CC;
-AV0&= CC;
-AV0S&= CC;
-AV1 &= CC;
-AV1S&= CC;
-AQ &= CC;
-
-//statbit ^= CC ; /* status bit equals status bit XOR CC (a) */
-
-AZ ^= CC;
-AN ^= CC;
-AC0^= CC;
-AC1^= CC;
-//V ^= CC;
-VS ^= CC;
-AV0^= CC;
-AV0S^= CC;
-AV1 ^= CC;
-AV1S^= CC;
-AQ ^= CC;
-//CC = Dreg ; /* CC set if the register is non-zero (a) */
-CC = R7;
-CC = R6;
-CC = R1;
-CC = R0;
-
-
-//CC = statbit ; /* CC equals status bit (a) */
-CC = AZ;
-CC = AN;
-CC = AC0;
-CC = AC1;
-//CC = V;
-CC = VS;
-CC = AV0;
-CC = AV0S;
-CC = AV1;
-CC = AV1S;
-CC = AQ;
-
-//CC |= statbit ; /* CC equals CC OR status bit (a) */
-CC |= AZ;
-CC |= AN;
-CC |= AC0;
-CC |= AC1;
-//CC |= V;
-CC |= VS;
-CC |= AV0;
-CC |= AV0S;
-CC |= AV1;
-CC |= AV1S;
-CC |= AQ;
-
-//CC &= statbit ; /* CC equals CC AND status bit (a) */
-CC &= AZ;
-CC &= AN;
-CC &= AC0;
-CC &= AC1;
-//CC &= V;
-CC &= VS;
-CC &= AV0;
-CC &= AV0S;
-CC &= AV1;
-CC &= AV1S;
-CC &= AQ;
-
-//CC ^= statbit ; /* CC equals CC XOR status bit (a) */
-CC ^= AZ;
-CC ^= AN;
-CC ^= AC0;
-CC ^= AC1;
-//CC ^= V;
-CC ^= VS;
-CC ^= AV0;
-CC ^= AV0S;
-CC ^= AV1;
-CC ^= AV1S;
-CC ^= AQ;
-
-CC = ! CC ; /* (a) */
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/event.d b/binutils-2.17/gas/testsuite/gas/bfin/event.d deleted file mode 100644 index 13c06796..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/event.d +++ /dev/null @@ -1,42 +0,0 @@ -#objdump: -dr -#name: event -.*: +file format .* - -Disassembly of section .text: - -00000000 <idle>: - 0: 20 00 IDLE; - -00000002 <csync>: - 2: 23 00 CSYNC; - -00000004 <ssync>: - 4: 24 00 SSYNC; - -00000006 <emuexcpt>: - 6: 25 00 EMUEXCPT; - -00000008 <cli>: - 8: 37 00 CLI R7; - a: 30 00 CLI R0; - -0000000c <sti>: - c: 41 00 STI R1; - e: 42 00 STI R2; - -00000010 <raise>: - 10: 9f 00 RAISE 0xf; - 12: 90 00 RAISE 0x0; - -00000014 <excpt>: - 14: af 00 EXCPT 0xf; - 16: a0 00 EXCPT 0x0; - -00000018 <testset>: - 18: b5 00 TESTSET \(P5\); - 1a: b0 00 TESTSET \(P0\); - -0000001c <nop>: - 1c: 00 00 NOP; - 1e: 03 c0 00 18 mnop; - ... diff --git a/binutils-2.17/gas/testsuite/gas/bfin/event.s b/binutils-2.17/gas/testsuite/gas/bfin/event.s deleted file mode 100644 index 8e65523e..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/event.s +++ /dev/null @@ -1,56 +0,0 @@ - .text - .global idle -idle: - IDle; - - .text - .global csync -csync: - csync; - - .text - .global ssync -ssync: - SSYNC; - - .text - .global emuexcpt -emuexcpt: - EMuExCpt; - - .text - .global cli -cli: - cli r7; - CLI R0; - - .text - .global sti -sti: - STI r1; - stI r2; - - .text - .global raise -raise: - raise 15; - RAISE 0; - - .text - .global excpt -excpt: - excpt 15; - EXCPT 0; - - .text - .global testset -testset: - testset(p5); - TESTset (P0); - - .text - .global nop -nop: - nop; - MNOP; - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/event2.d b/binutils-2.17/gas/testsuite/gas/bfin/event2.d deleted file mode 100644 index d3975ded..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/event2.d +++ /dev/null @@ -1,28 +0,0 @@ -#objdump: -dr -#name: event2 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 20 00 IDLE; - 2: 23 00 CSYNC; - 4: 24 00 SSYNC; - 6: 25 00 EMUEXCPT; - 8: 30 00 CLI R0; - a: 31 00 CLI R1; - c: 32 00 CLI R2; - e: 40 00 STI R0; - 10: 41 00 STI R1; - 12: 42 00 STI R2; - 14: 90 00 RAISE 0x0; - 16: 94 00 RAISE 0x4; - 18: 9f 00 RAISE 0xf; - 1a: a0 00 EXCPT 0x0; - 1c: a1 00 EXCPT 0x1; - 1e: af 00 EXCPT 0xf; - 20: b0 00 TESTSET \(P0\); - 22: b1 00 TESTSET \(P1\); - 24: b2 00 TESTSET \(P2\); - 26: 00 00 NOP; - 28: 03 c0 00 18 mnop; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/event2.s b/binutils-2.17/gas/testsuite/gas/bfin/event2.s deleted file mode 100755 index c0a6fc36..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/event2.s +++ /dev/null @@ -1,41 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//11 EXTERNAL EVENT MANAGEMENT
-//
-IDLE ; /* (a) */
-CSYNC ; /* (a) */
-SSYNC ; /* (a) */
-EMUEXCPT ; /* (a) */
-
-//CLI Dreg ; /* previous state of IMASK moved to Dreg (a) */
-CLI R0;
-CLI R1;
-CLI R2;
-
-//STI Dreg ; /* previous state of IMASK restored from Dreg (a) */
-STI R0;
-STI R1;
-STI R2;
-
-//RAISE uimm4 ; /* (a) */
-RAISE 0;
-RAISE 4;
-RAISE 15;
-
-//EXCPT uimm4 ; /* (a) */
-EXCPT 0;
-EXCPT 1;
-EXCPT 15;
-
-//TESTSET ( Preg ) ; /* (a) */
-TESTSET (P0);
-TESTSET (P1);
-TESTSET (P2);
-//TESTSET (SP);
-//TESTSET (FP);
-
-NOP ; /* (a) */
-MNOP ; /* (b) */
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/expected_errors.l b/binutils-2.17/gas/testsuite/gas/bfin/expected_errors.l deleted file mode 100644 index d20b3f7a..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/expected_errors.l +++ /dev/null @@ -1,10 +0,0 @@ -.*: Assembler messages: -.*:3: Error: Constant out of range. -.*:4: Error: Constant out of range. -.*:6: Error: Bad constant value. -.*:7: Error: Bad constant value. -.*:8: Error: Bad constant value. -.*:9: Error: Bad constant value. -.*:10: Error: Bad constant value. -.*:11: Error: Bad constant value. -.*:13: Error: Dregs expected. Input text was R3.L. diff --git a/binutils-2.17/gas/testsuite/gas/bfin/expected_errors.s b/binutils-2.17/gas/testsuite/gas/bfin/expected_errors.s deleted file mode 100644 index 005570d8..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/expected_errors.s +++ /dev/null @@ -1,13 +0,0 @@ - .text - - p0.H = 0x12345678; - P0.l = 0x12345678; - - CC = R3 < 4; - CC = R3 < 7; - CC = R3 < 8; - CC = R3 <= 4; - CC = R3 <= 7; - CC = R3 <= 8; - - A1 -= M2.h * R3.L, A0 -= M2.l * R3.L; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/expected_move_errors.l b/binutils-2.17/gas/testsuite/gas/bfin/expected_move_errors.l deleted file mode 100644 index 9b8b1aa1..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/expected_move_errors.l +++ /dev/null @@ -1,5 +0,0 @@ -.*: Assembler messages: -.*:3: Error: Cannot move A1 to low half of register. Input text was A1. -.*:4: Error: Cannot move A0 to high half of register. Input text was A0. -.*:5: Error: Cannot move A1 to even register. -.*:6: Error: Cannot move A0 to odd register. diff --git a/binutils-2.17/gas/testsuite/gas/bfin/expected_move_errors.s b/binutils-2.17/gas/testsuite/gas/bfin/expected_move_errors.s deleted file mode 100644 index d73525f9..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/expected_move_errors.s +++ /dev/null @@ -1,6 +0,0 @@ - .text - - R0.L = A1; - R0.H = A0; - R0 = A1; - R1 = A0; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/flow.d b/binutils-2.17/gas/testsuite/gas/bfin/flow.d deleted file mode 100644 index 9c5c8252..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/flow.d +++ /dev/null @@ -1,96 +0,0 @@ -#objdump: -d -#name: flow -.*: +file format .* - -Disassembly of section .text: - -00000000 <jump>: - 0: 55 00 JUMP \(P5\); - 2: 83 00 JUMP \(PC\+P3\); - 4: 00 20 JUMP.S 4.* - 6: 80 e2 00 00 JUMP.L ff000006.* - a: 7f e2 ff ff JUMP.L 1000008.* - e: ff 27 JUMP.S 100c.* - 10: 7f e2 00 80 JUMP.L ff0010.* - 14: f6 2f JUMP.S 0 <jump>; - -00000016 <ccjump>: - 16: 00 1a IF CC JUMP fffffc16.* - 18: ff 1d IF CC JUMP 416.*\(BP\); - 1a: 00 16 IF ! CC JUMP fffffc1a.*\(BP\); - 1c: 89 10 IF ! CC JUMP 12e.* - 1e: f1 1b IF CC JUMP 0 <jump>; - 20: f0 1f IF CC JUMP 0 <jump>\(BP\); - 22: ef 17 IF ! CC JUMP 0 <jump>\(BP\); - 24: ee 13 IF ! CC JUMP 0 <jump>; - -00000026 <call>: - 26: 63 00 CALL \(P3\); - 28: 72 00 CALL \(PC\+P2\); - 2a: 80 e3 00 00 CALL ff00002a.* - 2e: 7f e3 ff ff CALL 100002c.* - 32: ff e3 e7 ff CALL 0 <jump>; - -00000036 <return>: - 36: 10 00 RTS; - 38: 11 00 RTI; - 3a: 12 00 RTX; - 3c: 13 00 RTN; - 3e: 14 00 RTE; - -00000040 <loop_lc0>: - 40: 82 e0 13 00 LSETUP\(44 <first_loop__BEGIN>,66 <first_loop__END>\)LC0; - -00000044 <first_loop__BEGIN>: - 44: 38 e4 7b fc R0=\[FP\+-3604\]; - 48: 49 60 R1=0x9\(x\); - 4a: 38 e4 7b fc R0=\[FP\+-3604\]; - 4e: 00 32 P0=R0; - 50: 42 44 P2=P0<<2; - 52: ba 5a P2=P2\+FP; - 54: 20 e1 50 fb R0=-1200 \(X\); - 58: 08 32 P1=R0; - 5a: 8a 5a P2=P2\+P1; - 5c: 00 60 R0=0x0\(x\); - 5e: 10 93 \[P2\]=R0; - 60: 38 e4 7b fc R0=\[FP\+-3604\]; - 64: 08 64 R0\+=0x1; - -00000066 <first_loop__END>: - 66: 38 e6 7b fc \[FP\+-3604\]=R0; - 6a: a2 e0 02 40 LSETUP\(6e <second_loop__BEGIN>,6e <second_loop__BEGIN>\)LC0=P4; - -0000006e <second_loop__BEGIN>: - 6e: 00 00 NOP; - 70: e0 e0 00 10 LSETUP\(70 <second_loop__BEGIN\+0x2>,70 <second_loop__BEGIN\+0x2>\)LC0=P1>>1; - 74: 82 e0 ff 03 LSETUP\(78 <second_loop__BEGIN\+0xa>,72 <second_loop__BEGIN\+0x4>\)LC0; - 78: af e0 00 52 LSETUP\(76 <second_loop__BEGIN\+0x8>,fffffc78 <another_loop__END\+0xfffffbba>\)LC0=P5; - 7c: ef e0 02 00 LSETUP\(7a <second_loop__BEGIN\+0xc>,80 <loop_lc1>\)LC0=P0>>1; - -00000080 <loop_lc1>: - 80: 90 e0 00 00 LSETUP\(80 <loop_lc1>,80 <loop_lc1>\)LC1; - 84: b0 e0 00 40 LSETUP\(84 <loop_lc1\+0x4>,84 <loop_lc1\+0x4>\)LC1=P4; - 88: f8 e0 1b 10 LSETUP\(78 <second_loop__BEGIN\+0xa>,be <another_loop__END>\)LC1=P1>>1; - 8c: 92 e0 ff 03 LSETUP\(90 <loop_lc1\+0x10>,8a <loop_lc1\+0xa>\)LC1; - 90: bf e0 00 52 LSETUP\(8e <loop_lc1\+0xe>,fffffc90 <another_loop__END\+0xfffffbd2>\)LC1=P5; - 94: ff e0 02 00 LSETUP\(92 <loop_lc1\+0x12>,98 <another_loop__BEGIN>\)LC1=P0>>1; - -00000098 <another_loop__BEGIN>: - 98: 38 e4 7a fc R0=\[FP\+-3608\]; - 9c: 00 32 P0=R0; - 9e: 42 44 P2=P0<<2; - a0: ba 5a P2=P2\+FP; - a2: 20 e1 f0 f1 R0=-3600 \(X\); - a6: 00 32 P0=R0; - a8: 42 5a P1=P2\+P0; - aa: 38 e4 7a fc R0=\[FP\+-3608\]; - ae: 00 32 P0=R0; - b0: 42 44 P2=P0<<2; - b2: ba 5a P2=P2\+FP; - b4: 20 e1 50 fb R0=-1200 \(X\); - b8: 00 32 P0=R0; - ba: 82 5a P2=P2\+P0; - bc: 10 91 R0=\[P2\]; - -000000be <another_loop__END>: - be: 08 93 \[P1\]=R0; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/flow.s b/binutils-2.17/gas/testsuite/gas/bfin/flow.s deleted file mode 100644 index b1301609..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/flow.s +++ /dev/null @@ -1,109 +0,0 @@ - .data -foodata: .word 42 - .text -footext: - .text - .global jump -jump: - jump(P5); - Jump (pc + p3); - jUMp (0); - JumP.l (-16777216); - jumP.L (0x00fffffe); - JUMP.s (4094); - JUMP.L (0X00FF0000); - jump (footext); - - .text - .global ccjump -ccjump: - if cc jump (-1024); - IF CC JUMP (1022) (BP); - if !cc jump (0xffffFc00) (Bp); - if !cc jumP (0x0112); - if cC JuMp (footext); - if CC jUmP (footext) (bp); - if !cc jump (FOOTEXT) (bP); - if !Cc JUMP (FooText); - - .text - .global call -call: - call (P3); - Call (PC+p2); - cALL (0xff000000); - CalL(0x00FFFFFe); - CAll call_test; - - - .text - .global return -return: - rts; - rTi; - rtX; - Rtn; - RTE; - - .text - - .text - .global loop_lc0 -loop_lc0: - loop first_loop lc0; - Loop_Begin first_loop; - R0 = [FP+-3604]; - R1 = 9 (X); - R0 = [FP+-3604]; - P0 = R0; - P2 = P0 << 2; - P2 = P2 + FP; - R0 = -1200 (X); - P1 = R0; - P2 = P2 + P1; - R0 = 0 (X); - [P2] = R0; - R0 = [FP+-3604]; - R0 += 1; - [FP+-3604] = R0; - LOOP_END first_loop; - - lOOP second_loop Lc0 = P4; - Loop_Begin second_loop; - NOP; - Loop_End second_loop; - - LOOP third_loop lC0 = P1 >> 1; - - Lsetup (4, 2046) Lc0; - LSETUP(30, 1024) LC0 = P5; - LSeTuP (30, 4) lc0 = p0 >> 1; - - - .global loop_lc1 -loop_lc1: - loop my_loop lc1; - lOOP other_loop Lc1 = P4; - LOOP another_loop lC1 = P1 >> 1; - - Lsetup (4, 2046) Lc1; - LSETUP (30, 1024) LC1 = P5; - LSeTuP (30, 4) lc1 = p0 >> 1; - Loop_Begin another_loop; - R0 = [FP+-3608]; - P0 = R0; - P2 = P0 << 2; - P2 = P2 + FP; - R0 = -3600 (X); - P0 = R0; - P1 = P2 + P0; - R0 = [FP+-3608]; - P0 = R0; - P2 = P0 << 2; - P2 = P2 + FP; - R0 = -1200 (X); - P0 = R0; - P2 = P2 + P0; - R0 = [P2]; - [P1] = R0; - LOOP_END another_loop; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/flow2.d b/binutils-2.17/gas/testsuite/gas/bfin/flow2.d deleted file mode 100644 index 1ffe7c3e..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/flow2.d +++ /dev/null @@ -1,114 +0,0 @@ -#objdump: -d -#name: flow2 -.*: +file format .* - -Disassembly of section .text: - -00000000 <MY_LABEL1-0x2a>: - 0: 50 00 JUMP \(P0\); - 2: 51 00 JUMP \(P1\); - 4: 52 00 JUMP \(P2\); - 6: 53 00 JUMP \(P3\); - 8: 54 00 JUMP \(P4\); - a: 55 00 JUMP \(P5\); - c: 56 00 JUMP \(SP\); - e: 57 00 JUMP \(FP\); - 10: 80 00 JUMP \(PC\+P0\); - 12: 81 00 JUMP \(PC\+P1\); - 14: 82 00 JUMP \(PC\+P2\); - 16: 83 00 JUMP \(PC\+P3\); - 18: 84 00 JUMP \(PC\+P4\); - 1a: 85 00 JUMP \(PC\+P5\); - 1c: 86 00 JUMP \(PC\+SP\); - 1e: 87 00 JUMP \(PC\+FP\); - 20: 00 20 JUMP.S 20 <MY_LABEL1-0xa>; - 22: 69 22 JUMP.S 4f4.* - 24: 97 2d JUMP.S fffffb52.* - 26: 01 20 JUMP.S 28 <MY_LABEL1-0x2>; - 28: ff 2f JUMP.S 26 <MY_LABEL1-0x4>; - -0000002a <MY_LABEL1>: - 2a: 00 20 JUMP.S 2a <MY_LABEL1>; - 2c: 69 22 JUMP.S 4fe.* - 2e: 97 2d JUMP.S fffffb5c.* - 30: 01 20 JUMP.S 32 <MY_LABEL1\+0x8>; - 32: ff 2f JUMP.S 30 <MY_LABEL1\+0x6>; - 34: c0 e2 00 00 JUMP.L ff800034.* - 38: 3f e2 ff ff JUMP.L 800036.* - 3c: 00 e2 00 00 JUMP.L 3c <MY_LABEL1\+0x12>; - 40: 00 e2 69 02 JUMP.L 512.* - 44: ff e2 97 fd JUMP.L fffffb72.* - 48: 00 e2 01 00 JUMP.L 4a <MY_LABEL1\+0x20>; - 4c: ff e2 ff ff JUMP.L 4a <MY_LABEL1\+0x20>; - 50: ed 2f JUMP.S 2a <MY_LABEL1>; - 52: d7 2f JUMP.S 0 .* - 54: d6 2f JUMP.S 0 .* - 56: d5 2f JUMP.S 0 .* - 58: 04 1b IF CC JUMP fffffe60.* - 5a: 5a 18 IF CC JUMP 10e.* - 5c: 00 18 IF CC JUMP 5c <MY_LABEL1\+0x32>; - 5e: 04 1f IF CC JUMP fffffe66.*\(BP\); - 60: 5a 1c IF CC JUMP 114.*\(BP\); - 62: 91 13 IF ! CC JUMP ffffff84.*; - 64: 90 10 IF ! CC JUMP 184.*; - 66: 91 17 IF ! CC JUMP ffffff88.*\(BP\); - 68: 90 14 IF ! CC JUMP 188.*\(BP\); - 6a: e0 1b IF CC JUMP 2a <MY_LABEL1>; - 6c: ca 1b IF CC JUMP 0 <MY_LABEL1-0x2a>; - 6e: de 1f IF CC JUMP 2a <MY_LABEL1>\(BP\); - 70: c8 1f IF CC JUMP 0 <MY_LABEL1-0x2a>\(BP\); - 72: dc 13 IF ! CC JUMP 2a <MY_LABEL1>; - 74: c6 13 IF ! CC JUMP 0 <MY_LABEL1-0x2a>; - 76: da 17 IF ! CC JUMP 2a <MY_LABEL1>\(BP\); - 78: c4 17 IF ! CC JUMP 0 <MY_LABEL1-0x2a>\(BP\); - 7a: 60 00 CALL \(P0\); - 7c: 61 00 CALL \(P1\); - 7e: 62 00 CALL \(P2\); - 80: 63 00 CALL \(P3\); - 82: 64 00 CALL \(P4\); - 84: 65 00 CALL \(P5\); - 86: 70 00 CALL \(PC\+P0\); - 88: 71 00 CALL \(PC\+P1\); - 8a: 72 00 CALL \(PC\+P2\); - 8c: 73 00 CALL \(PC\+P3\); - 8e: 74 00 CALL \(PC\+P4\); - 90: 75 00 CALL \(PC\+P5\); - 92: 09 e3 2b 1a CALL 1234e8.*; - 96: ff e3 97 fd CALL fffffbc4.*; - 9a: ff e3 c8 ff CALL 2a <MY_LABEL1>; - 9e: ff e3 b1 ff CALL 0 <MY_LABEL1-0x2a>; - a2: 10 00 RTS; - a4: 11 00 RTI; - a6: 12 00 RTX; - a8: 13 00 RTN; - aa: 14 00 RTE; - ac: 82 e0 02 00 LSETUP\(b0 <MY_LABEL1\+0x86>,b0 <MY_LABEL1\+0x86>\)LC0; - b0: 84 e0 06 00 LSETUP\(b8 <beg_poll_bit>,bc <end_poll_bit>\)LC0; - b4: 00 00 NOP; - ... - -000000b8 <beg_poll_bit>: - b8: 80 e1 01 00 R0=1 <MY_LABEL1-0x29>\(Z\); - -000000bc <end_poll_bit>: - bc: 81 e1 02 00 R1=2 <MY_LABEL1-0x28>\(Z\); - c0: 92 e0 03 00 LSETUP\(c4 <end_poll_bit\+0x8>,c6 <end_poll_bit\+0xa>\)LC1; - c4: 93 e0 05 00 LSETUP\(ca <FIR_filter>,ce <bottom_of_FIR_filter>\)LC1; - ... - -000000ca <FIR_filter>: - ca: 80 e1 01 00 R0=1 <MY_LABEL1-0x29>\(Z\); - -000000ce <bottom_of_FIR_filter>: - ce: 81 e1 02 00 R1=2 <MY_LABEL1-0x28>\(Z\); - d2: a2 e0 04 10 LSETUP\(d6 <bottom_of_FIR_filter\+0x8>,da <bottom_of_FIR_filter\+0xc>\)LC0=P1; - d6: e2 e0 04 10 LSETUP\(da <bottom_of_FIR_filter\+0xc>,de <DoItSome__BEGIN>\)LC0=P1>>1; - da: 82 e0 03 00 LSETUP\(de <DoItSome__BEGIN>,e0 <DoItSome__END>\)LC0; - -000000de <DoItSome__BEGIN>: - de: 08 60 R0=0x1\(x\); - -000000e0 <DoItSome__END>: - e0: 11 60 R1=0x2\(x\); - e2: 90 e0 00 00 LSETUP\(e2 <DoItSome__END\+0x2>,e2 <DoItSome__END\+0x2>\)LC1; - ... diff --git a/binutils-2.17/gas/testsuite/gas/bfin/flow2.s b/binutils-2.17/gas/testsuite/gas/bfin/flow2.s deleted file mode 100755 index 7ae35510..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/flow2.s +++ /dev/null @@ -1,155 +0,0 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//2 Program Flow Control -// - - -//JUMP ( Preg ) ; /* indirect to an absolute (not PC-relative)address (a) */ -//Preg: P5-0, SP, FP - -JUMP (P0); -JUMP (P1); -JUMP (P2); -JUMP (P3); -JUMP (P4); -JUMP (P5); -JUMP (SP); -JUMP (FP); - -//JUMP ( PC + Preg ) ; /* PC-relative, indexed (a) */ -JUMP (PC+P0); -JUMP (PC+P1); -JUMP (PC+P2); -JUMP (PC+P3); -JUMP (PC+P4); -JUMP (PC+P5); -JUMP (PC+SP); -JUMP (PC+FP); - - -//JUMP pcrelm2 ; /* PC-relative, immediate (a) or (b) */ - -JUMP 0X0; -JUMP 1234; -JUMP -1234; -JUMP 2; -JUMP -2; - -MY_LABEL1: -//JUMP.S pcrel13m2 ; /* PC-relative, immediate, short (a) */ -JUMP.S 0X0; -JUMP.S 1234; -JUMP.S -1234; -JUMP.S 2; -JUMP.S -2; - -//JUMP.L pcrel25m2 ; /* PC-relative, immediate, long (b) */ -JUMP.L 0XFF800000; -JUMP.L 0X007FFFFE; -JUMP.L 0X0; -JUMP.L 1234; -JUMP.L -1234; -JUMP.L 2; -JUMP.L -2; - -//JUMP user_label ; /* user-defined absolute address label, */ -JUMP MY_LABEL1; -JUMP MY_LABEL2; - -JUMP MY_LABEL1-2; -JUMP MY_LABEL2-2; - -//IF CC JUMP pcrel11m2 ; /* branch if CC=1, branch predicted as not taken (a) */ -IF CC JUMP 0xFFFFFE08; -IF CC JUMP 0x0B4; -IF CC JUMP 0; - -//IF CC JUMP pcrel11m2 (bp) ; /* branch if CC=1, branch predicted as taken (a) */ -IF CC JUMP 0xFFFFFE08(bp); -IF CC JUMP 0x0B4(bp); - -//IF !CC JUMP pcrel11m2 ; /* branch if CC=0, branch predicted as not taken (a) */ -IF !CC JUMP 0xFFFFFF22; -IF !CC JUMP 0X120; - -//IF !CC JUMP pcrel11m2 (bp) ; /* branch if CC=0, branch predicted as taken (a) */ -IF !CC JUMP 0xFFFFFF22(bp); -IF !CC JUMP 0X120(bp); - -//IF CC JUMP user_label ; /* user-defined absolute address label, resolved by the assembler/linker to the appropriate PC-relative instruction (a) */ -IF CC JUMP MY_LABEL1; -IF CC JUMP MY_LABEL2; - -//IF CC JUMP user_label (bp) ; /* user-defined absolute address label, resolved by the assembler/linker to the appropriate PC-relative instruction (a) */ -IF CC JUMP MY_LABEL1(bp); -IF CC JUMP MY_LABEL2(bp); - -//IF !CC JUMP user_label ; /* user-defined absolute address label, resolved by the assembler/linker to the appropriate PC-relative instruction (a) */ -IF !CC JUMP MY_LABEL1; -IF !CC JUMP MY_LABEL2; - -//IF !CC JUMP user_label (bp) ; /* user-defined absolute address label, resolved by the assembler/linker to the appropriate PC-relative instruction (a) */ -IF !CC JUMP MY_LABEL1(bp); -IF !CC JUMP MY_LABEL2(bp); - -//CALL ( Preg ) ; /* indirect to an absolute (not PC-relative) address (a) */ -CALL(P0); -CALL(P1); -CALL(P2); -CALL(P3); -CALL(P4); -CALL(P5); - - -//CALL ( PC + Preg ) ; /* PC-relative, indexed (a) */ -CALL(PC+P0); -CALL(PC+P1); -CALL(PC+P2); -CALL(PC+P3); -CALL(PC+P4); -CALL(PC+P5); - -//CALL pcrel25m2 ; /* PC-relative, immediate (b) */ -CALL 0x123456 ; -CALL -1234; - -//CALL user_label ; /* user-defined absolute address label,resolved by the assembler/linker to the appropriate PC-relative instruction (a) or (b) */ -CALL MY_LABEL1; -CALL MY_LABEL2; - -RTS ; // Return from Subroutine (a) -RTI ; // Return from Interrupt (a) -RTX ; // Return from Exception (a) -RTN ; // Return from NMI (a) -RTE ; // Return from Emulation (a) - -lsetup ( 4, 4 ) lc0 ; - -lsetup ( beg_poll_bit, end_poll_bit ) lc0 ; -NOP;NOP; -beg_poll_bit: R0=1(Z); -end_poll_bit: R1=2(Z); - -lsetup ( 4, 6 ) lc1 ; - -lsetup ( FIR_filter, bottom_of_FIR_filter ) lc1 ; -NOP; -FIR_filter: R0=1(Z); -bottom_of_FIR_filter: R1=2(Z); - -lsetup ( 4, 8 ) lc0 = p1 ; - -lsetup ( 4, 8 ) lc0 = p1>>1 ; - -loop DoItSome LC0 ; /* define loop DoItSome with Loop Counter 0 */ -loop_begin DoItSome ; /* place before the first instruction in the loop */ -R0=1; -R1=2; -loop_end DoItSome ; /* place after the last instruction in the loop */ - -loop DoItSomeMore LC1 ; /* define loop MyLoop with Loop Counter 1*/ - - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/load.d b/binutils-2.17/gas/testsuite/gas/bfin/load.d deleted file mode 100644 index 58d97c2a..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/load.d +++ /dev/null @@ -1,114 +0,0 @@ -#objdump: -d -#name: load -.*: +file format .* - -Disassembly of section .text: - -00000000 <load_immediate>: - 0: 17 e1 ff ff M3.L=ffff.* - 4: 1a e1 fe ff B2.L=fffe.* - 8: 0e e1 00 00 SP.L=0.* - c: 0f e1 dc fe FP.L=fedc.* - 10: 40 e1 02 00 R0.H=0x2; - 14: 4d e1 20 00 P5.H=20.* - 18: 52 e1 04 f2 I2.H=f204.* - 1c: 59 e1 40 00 B1.H=40.* - 20: 5c e1 ff ff L0.H=ffff.* - 24: 45 e1 00 00 R5.H=0x0; - 28: 5a e1 00 00 B2.H=0 <load_immediate>; - 2c: 8f e1 20 ff FP=ff20.* - 30: 9e e1 20 00 L2=20.* - 34: 85 e1 00 00 R5=0 <load_immediate>\(Z\); - 38: 08 c4 [0-3][[:xdigit:]] 00 A0=0; - 3c: 08 c4 [0-3][[:xdigit:]] 40 A1=0; - 40: 08 c4 [0-3][[:xdigit:]] 80 A1=A0=0; - 44: 02 62 R2=-64\(x\); - 46: 20 e1 7f 00 R0=0x7f \(X\); - 4a: 02 68 P2=0x0; - 4c: 06 6b SP=-32; - 4e: 67 69 FP=0x2c; - 50: 3f e1 00 08 L3=0x800 \(X\); - 54: 36 e1 ff 7f M2=0x7fff \(X\); - 58: 81 60 R1=0x10\(x\); - 5a: 3c e1 00 00 L0=0x0 \(X\); - 5e: 27 e1 eb 00 R7=0xeb \(X\); - -00000062 <load_pointer_register>: - 62: 7e 91 SP=\[FP\]; - 64: 47 90 FP=\[P0\+\+\]; - 66: f1 90 P1=\[SP--\]; - 68: 96 af SP=\[P2\+0x38\]; - 6a: 3b ac P3=\[FP\+0x0]; - 6c: 3c e5 ff 7f P4=\[FP\+0x1fffc\]; - 70: 3e e5 01 80 SP=\[FP\+-131068\]; - 74: 26 ac SP=\[P4\+0x0\]; - 76: 0d b8 P5=\[FP-128\]; - -00000078 <load_data_register>: - 78: 07 91 R7=\[P0\]; - 7a: 2e 90 R6=\[P5\+\+\]; - 7c: a5 90 R5=\[P4--\]; - 7e: bc a2 R4=\[FP\+0x28\]; - 80: 33 e4 ff 7f R3=\[SP\+0x1fffc\]; - 84: 32 a0 R2=\[SP\+0x0\]; - 86: 39 e4 01 80 R1=\[FP\+-131068\]; - 8a: 06 80 R0=\[SP\+\+P0\]; - 8c: 05 b8 R5=\[FP-128\]; - 8e: 02 9d R2=\[I0\]; - 90: 09 9c R1=\[I1\+\+\]; - 92: 93 9c R3=\[I2--\]; - 94: 9c 9d R4=\[I3\+\+M0\]; - -00000096 <load_half_word_zero_extend>: - 96: 37 95 R7=W\[SP\] \(Z\); - 98: 3e 94 R6=W\[FP\+\+\] \(Z\); - 9a: 85 94 R5=W\[P0--\] \(Z\); - 9c: cc a7 R4=W\[P1\+0x1e\] \(Z\); - 9e: 73 e4 fe 7f R3=W\[SP\+0xfffc\] \(Z\); - a2: 7a e4 02 80 R2=W\[FP\+-65532\] \(Z\); - a6: 28 86 R0=W\[P0\+\+P5\] \(Z\); - -000000a8 <load_half_word_sign_extend>: - a8: 77 95 R7=W\[SP\]\(X\); - aa: 7e 94 R6=W\[FP\+\+\]\(X\); - ac: c5 94 R5=W\[P0--\]\(X\); - ae: 0d ab R5=W\[P1\+0x18\]\(X\); - b0: 73 e5 fe 7f R3=W\[SP\+0xfffc\]\(X\); - b4: 7f e5 02 80 R7=W\[FP\+-65532\]\(X\); - b8: 51 8e R1=W\[P1\+\+P2\]\(X\); - -000000ba <load_high_data_register_half>: - ba: 40 9d R0.H=W\[I0\]; - bc: 49 9c R1.H=W\[I1\+\+\]; - be: d2 9c R2.H=W\[I2--\]; - c0: f6 84 R3.H=W\[SP\]; - c2: 07 85 R4.H=W\[FP\+\+P0\]; - -000000c4 <load_low_data_register_half>: - c4: 3f 9d R7.L=W\[I3\]; - c6: 36 9c R6.L=W\[I2\+\+\]; - c8: ad 9c R5.L=W\[I1--\]; - ca: 00 83 R4.L=W\[P0\]; - cc: da 82 R3.L=W\[P2\+\+P3\]; - -000000ce <load_byte_zero_extend>: - ce: 05 99 R5=B\[P0\] \(Z\); - d0: 0c 98 R4=B\[P1\+\+\] \(Z\); - d2: 90 98 R0=B\[P2--\] \(Z\); - d4: b3 e4 ff 7f R3=B\[SP\+0x7fff\] \(Z\); - d8: b7 e4 01 80 R7=B\[SP\+-32767\] \(Z\); - -000000dc <load_byte_sign_extend>: - dc: 45 99 R5=B\[P0\]\(X\); - de: 4a 98 R2=B\[P1\+\+\]\(X\); - e0: fb 98 R3=B\[FP--\]\(X\); - e2: b7 e5 00 00 R7=B\[SP\+0x0\]\(X\); - e6: be e5 01 80 R6=B\[FP\+-32767\]\(X\); - -000000ea <load_data1>: - ... - -000000eb <load_data2>: - eb: 10 00 IF ! CC JUMP eb <load_data2>; - ed: 00 00 NOP; - ... diff --git a/binutils-2.17/gas/testsuite/gas/bfin/load.s b/binutils-2.17/gas/testsuite/gas/bfin/load.s deleted file mode 100644 index 07f4732a..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/load.s +++ /dev/null @@ -1,131 +0,0 @@ - .extern f001 - .extern F002 - .text - .global load_immediate -load_immediate: - /* Half-Word Load. */ - M3.l = 0xffff; - b2.l = 0xfffe; - Sp.l = 0; - FP.L = 0xfedc; - r0.h = 2; - p5.H = 32; - I2.h = 0xf204; - b1.H = 64; - l0.h = 0xffff; - R5.h = load_data1; - B2.H = F002; - - /* Zero Extended. */ - fp = 0xff20 (Z); - l2 = 32 (z); - R5 = foo2 (Z); - A0 = 0; - A1 = 0; - a1 = a0 = 0; - - /* Sign Extended. */ - r2 = -64 (x); - R0 = 0x7f (X); - P2 = 0 (x); - sp = -32 (x); - fp = 44 (X); - l3 = 0x800 (x); - m2 = 0x7fff (X); - R1 = 16 (X); - L0 = foo1; - r7 = load_data2; - - .text - .global load_pointer_register -load_pointer_register: - Sp = [ fp]; - FP = [ p0++ ]; - p1 = [sp--]; - SP = [P2 +56]; - p3 = [fp + 0]; - P4 = [FP + 0x0001FFFC]; - sp = [fp-0x0001fffc]; - sp = [p4-0]; - P5 = [FP-128]; - - - .text - .global load_data_register -load_data_register: - R7 = [p0]; - r6 = [p5++]; - r5 = [P4 --]; - R4 = [Fp + 40]; - r3 = [sp+131068]; - r2 = [sp-0]; - r1 = [fp - 0x0001fffc]; - R0 = [sp ++ p0]; - R5 = [Fp-128]; - r2 = [i0]; - r1 = [I1++]; - R3 = [I2--]; - R4 = [i3 ++ M0]; - - .text - .global load_half_word_zero_extend -load_half_word_zero_extend: - r7 = w [sp] (z); - R6 = W [FP ++] (Z); - R5 = W [P0 --] (z); - R4 = w [p1 + 30] (Z); - r3 = w [sp + 0xfffc] (z); - r2 = w [fp - 0xfffc] (Z); - R0 = W [ P0 ++ P5] (z); - - .text - .global load_half_word_sign_extend -load_half_word_sign_extend: - r7 = w [sp] (x); - R6 = W [FP ++] (X); - R5 = W [P0 --] (X); - r5 = w [p1 + 24] (x); - R3 = w [sp + 0xfffc] (X); - r7 = w [fp - 0xfffc] (x); - R1 = W [ P1 ++ P2] (X); - - .text - .global load_high_data_register_half -load_high_data_register_half: - r0.h = w [i0]; - R1.H = W [I1 ++]; - R2.h = w [I2 --]; - r3.H = W [sp]; - R4.h = W [Fp ++ p0]; - - .text - .global load_low_data_register_half -load_low_data_register_half: - r7.l = w [i3]; - R6.L = W [I2++]; - R5.l = w [i1 --]; - r4.L = w [P0]; - r3.l = W [p2 ++ p3]; - - .text - .global load_byte_zero_extend -load_byte_zero_extend: - r5 = b [p0] (z); - R4 = B [P1++] (Z); - r0 = b [p2--] (z); - R3 = B [sp + 0x7fff] (Z); - r7 = b [SP - 32767] (z); - - .text - .global load_byte_sign_extend -load_byte_sign_extend: - r5 = b [ P0 ] (X); - r2 = B [ p1++ ] (x); - R3 = b [ FP--] (x); - r7 = B [ sp+0] (x); - r6 = b [fp-0x7fff] (X); - - .global load_data -load_data1: .byte 0 -load_data2: .word 16 - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/logical.d b/binutils-2.17/gas/testsuite/gas/bfin/logical.d deleted file mode 100644 index d35f9fdc..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/logical.d +++ /dev/null @@ -1,39 +0,0 @@ -#objdump: -dr -#name: logical -.*: +file format .* - -Disassembly of section .text: - -00000000 <and>: - 0: c8 55 R7=R0&R1; - 2: 9b 54 R2=R3&R3; - 4: 91 55 R6=R1&R2; - -00000006 <not>: - 6: c8 43 R0=~R1; - 8: d1 43 R1=~R2; - a: e3 43 R3=~R4; - c: ec 43 R4=~R5; - -0000000e <or>: - e: 08 56 R0=R0\|R1; - 10: a3 56 R2=R3\|R4; - 12: 7e 57 R5=R6\|R7; - -00000014 <xor>: - 14: 5d 59 R5=R5\^R3; - 16: 02 59 R4=R2\^R0; - 18: 01 58 R0=R1\^R0; - -0000001a <bxor>: - 1a: 0b c6 00 4e R7.L=CC=BXOR\(A0,R0\); - 1e: 0b c6 08 4e R7.L=CC=BXOR\(A0,R1\); - 22: 0c c6 00 4a R5.L=CC=BXOR\( A0,A1 ,CC \); - 26: 0c c6 00 48 R4.L=CC=BXOR\( A0,A1 ,CC \); - -0000002a <bxorshift>: - 2a: 0b c6 38 06 R3.L=CC=BXORSHIFT\(A0,R7\); - 2e: 0b c6 10 04 R2.L=CC=BXORSHIFT\(A0,R2\); - 32: 0c c6 00 00 A0=BXORSHIFT\(A0,A1 ,CC\); - 36: 0c c6 00 00 A0=BXORSHIFT\(A0,A1 ,CC\); - ... diff --git a/binutils-2.17/gas/testsuite/gas/bfin/logical.s b/binutils-2.17/gas/testsuite/gas/bfin/logical.s deleted file mode 100644 index 7a0a363f..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/logical.s +++ /dev/null @@ -1,51 +0,0 @@ - .text - .global and -and: - r7 = r0 & r1; - R2 = R3 & R3; - r6 = r1 & R2; - - .text - .global not -not: - r0 = ~R1; - R1 = ~r2; - r3 = ~r4; - R4 = ~R5; - - .text - .global or -or: - r0 = r0 | r1; - r2 = R3 | R4; - R5 = r6 | R7; - - .text - .global xor -xor: - r5 = r5 ^ r3; - r4 = R2 ^ r0; - R0 = R1 ^ R0; - - - .text - .global bxor -bxor: - R7.l = CC = bxor (a0, r0); - r7.l = cc = BXOR (A0, R1); - - r5.L = Cc = BxoR (A0, A1, CC); - R4.L = cC = bXor (a0, a1, cc); - - .text - .global bxorshift -bxorshift: - r3.l = cc = bxorshift (a0, R7); - R2.l = cC = BxoRsHIft (A0, R2); - - A0 = BXORSHIFT (A0, A1, CC); - a0 = BxorShift (a0, A1, Cc); - - - - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/logical2.d b/binutils-2.17/gas/testsuite/gas/bfin/logical2.d deleted file mode 100644 index 0a709114..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/logical2.d +++ /dev/null @@ -1,43 +0,0 @@ -#objdump: -dr -#name: logical2 -.*: +file format .* - - -Disassembly of section .text: - -00000000 <.text>: - 0: ff 55 R7=R7&R7; - 2: c7 55 R7=R7&R0; - 4: cf 55 R7=R7&R1; - 6: 7f 54 R1=R7&R7; - 8: 87 54 R2=R7&R0; - a: cf 54 R3=R7&R1; - c: ff 43 R7=~R7; - e: c7 43 R7=~R0; - 10: f8 43 R0=~R7; - 12: d0 43 R0=~R2; - 14: ff 57 R7=R7\|R7; - 16: cf 57 R7=R7\|R1; - 18: c7 57 R7=R7\|R0; - 1a: 7f 56 R1=R7\|R7; - 1c: 8f 56 R2=R7\|R1; - 1e: c7 56 R3=R7\|R0; - 20: ff 59 R7=R7\^R7; - 22: cf 59 R7=R7\^R1; - 24: c7 59 R7=R7\^R0; - 26: 7f 58 R1=R7\^R7; - 28: 8f 58 R2=R7\^R1; - 2a: c7 58 R3=R7\^R0; - 2c: 0b c6 00 00 R0.L=CC=BXORSHIFT\(A0,R0\); - 30: 0b c6 08 00 R0.L=CC=BXORSHIFT\(A0,R1\); - 34: 0b c6 00 06 R3.L=CC=BXORSHIFT\(A0,R0\); - 38: 0b c6 08 06 R3.L=CC=BXORSHIFT\(A0,R1\); - 3c: 0b c6 00 40 R0.L=CC=BXOR\(A0,R0\); - 40: 0b c6 08 40 R0.L=CC=BXOR\(A0,R1\); - 44: 0b c6 00 46 R3.L=CC=BXOR\(A0,R0\); - 48: 0b c6 08 46 R3.L=CC=BXOR\(A0,R1\); - 4c: 0c c6 00 40 R0.L=CC=BXOR\( A0,A1 ,CC \); - 50: 0c c6 00 40 R0.L=CC=BXOR\( A0,A1 ,CC \); - 54: 0c c6 00 46 R3.L=CC=BXOR\( A0,A1 ,CC \); - 58: 0c c6 00 46 R3.L=CC=BXOR\( A0,A1 ,CC \); - 5c: 0c c6 00 00 A0=BXORSHIFT\(A0,A1 ,CC\); diff --git a/binutils-2.17/gas/testsuite/gas/bfin/logical2.s b/binutils-2.17/gas/testsuite/gas/bfin/logical2.s deleted file mode 100755 index b26a765c..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/logical2.s +++ /dev/null @@ -1,69 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//7 LOGICAL OPERATIONS
-//
-
-//Dreg = Dreg & Dreg ; /* (a) */
-
-R7 = R7 & R7;
-R7 = R7 & R0;
-r7 = R7 & R1;
-
-R1 = R7 & R7;
-R2 = R7 & R0;
-r3 = R7 & R1;
-
-//Dreg = ~ Dreg ; /* (a)*/
-
-R7 = ~R7;
-R7 = ~R0;
-R0 = ~R7;
-R0 = ~R2;
-
-//Dreg = Dreg | Dreg ; /* (a) */
-
-R7 = R7 | R7;
-R7 = R7 | R1;
-R7 = R7 | R0;
-
-R1 = R7 | R7;
-R2 = R7 | R1;
-R3 = R7 | R0;
-
-//Dreg = Dreg ^ Dreg ; /* (a) */
-
-R7 = R7 ^ R7;
-R7 = R7 ^ R1;
-R7 = R7 ^ R0;
-
-R1 = R7 ^ R7;
-R2 = R7 ^ R1;
-R3 = R7 ^ R0;
-
-//Dreg_lo = CC = BXORSHIFT ( A0, Dreg ) ; /* (b) */
-R0.L = CC = BXORSHIFT(A0, R0);
-R0.L = CC = BXORSHIFT(A0, R1);
-
-R3.L = CC = BXORSHIFT(A0, R0);
-R3.L = CC = BXORSHIFT(A0, R1);
-
-//Dreg_lo = CC = BXOR ( A0, Dreg ) ; /* (b) */
-R0.L = CC = BXOR(A0, R0);
-R0.L = CC = BXOR(A0, R1);
-
-R3.L = CC = BXOR(A0, R0);
-R3.L = CC = BXOR(A0, R1);
-
-//Dreg_lo = CC = BXOR ( A0, A1, CC ) ; /* (b) */
-R0.L = CC = BXOR(A0, A1, CC);
-R0.L = CC = BXOR(A0, A1, CC);
-
-R3.L = CC = BXOR(A0, A1, CC);
-R3.L = CC = BXOR(A0, A1, CC);
-
-A0 = BXORSHIFT ( A0, A1, CC ) ; /* (b) */
-
-
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/move.d b/binutils-2.17/gas/testsuite/gas/bfin/move.d deleted file mode 100644 index 62bb5e11..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/move.d +++ /dev/null @@ -1,82 +0,0 @@ -#objdump: -dr -#name: move -.*: +file format .* - -Disassembly of section .text: - -00000000 <move_register>: - 0: 38 31 R7=A0.x; - 2: fb 32 FP=B3; - 4: 35 36 L2=R5; - 6: b2 34 M2=I2; - 8: d8 39 A1.w=USP; - a: 06 31 R0=ASTAT; - c: c9 31 R1=SEQSTAT; - e: d2 31 R2=SYSCFG; - 10: db 31 R3=RETI; - 12: e4 31 R4=RETX; - 14: ed 31 R5=RETN; - 16: f6 31 R6=RETE; - 18: 3f 31 R7=RETS; - 1a: a8 31 R5=LC0; - 1c: a3 31 R4=LC1; - 1e: 99 31 R3=LT0; - 20: 94 31 R2=LT1; - 22: 8a 31 R1=LB0; - 24: 85 31 R0=LB1; - 26: 96 31 R2=CYCLES; - 28: 9f 31 R3=CYCLES2; - 2a: cf 31 R1=EMUDAT; - 2c: 31 3d CYCLES=A0.w; - 2e: 7f 38 RETS=FP; - 30: e0 3d LT1=USP; - 32: 72 38 ASTAT=P2; - 34: 08 c4 [0|3][0|f] c0 A0=A1; - 38: 08 c4 [0|3][0|f] e0 A1=A0; - 3c: 09 c4 00 20 A0=R0; - 40: 09 c4 08 a0 A1=R1; - 44: 8b c0 00 39 R4 = A0 \(FU\); - 48: 2f c1 00 19 R5 = A1 \(ISS2\); - 4c: 0b c0 80 39 R6 = A0; - 50: 0f c0 80 19 R7 = A1; - 54: 0f c0 80 39 R7 = A1, R6 = A0; - 58: 8f c0 00 38 R1 = A1, R0 = A0 \(FU\); - -0000005c <move_conditional>: - 5c: 6a 07 IF CC R5 = P2; - 5e: b0 06 IF ! CC SP = R0; - -00000060 <move_half_to_full_zero_extend>: - 60: fa 42 R2=R7.L\(Z\); - 62: c8 42 R0=R1.L\(Z\); - -00000064 <move_half_to_full_sign_extend>: - 64: 8d 42 R5=R1.L\(X\); - 66: 93 42 R3=R2.L\(X\); - -00000068 <move_register_half>: - 68: 09 c4 28 40 A0.x=R5.L; - 6c: 09 c4 10 c0 A1.x=R2.L; - 70: 0a c4 [0|3][0|6] 00 R0.L=A0.x; - 74: 0a c4 [0|3][0|6] 4e R7.L=A1.x; - 78: 09 c4 18 00 A0.L=R3.L; - 7c: 09 c4 20 80 A1.L=R4.L; - 80: 29 c4 30 00 A0.H=R6.H; - 84: 29 c4 28 80 A1.H=R5.H; - 88: 83 c1 00 38 R0.L = A0 \(IU\); - 8c: 27 c0 40 18 R1.H = A1 \(S2RND\); - 90: 07 c0 40 18 R1.H = A1; - 94: 67 c1 80 38 R2.H = A1, R2.L = A0 \(IH\); - 98: 07 c0 80 38 R2.H = A1, R2.L = A0; - 9c: 47 c0 00 38 R0.H = A1, R0.L = A0 \(T\); - a0: 87 c0 00 38 R0.H = A1, R0.L = A0 \(FU\); - a4: 07 c1 00 38 R0.H = A1, R0.L = A0 \(IS\); - a8: 07 c0 00 38 R0.H = A1, R0.L = A0; - -000000ac <move_byte_zero_extend>: - ac: 57 43 R7=R2.B\(Z\); - ae: 48 43 R0=R1.B\(Z\); - -000000b0 <move_byte_sign_extend>: - b0: 4e 43 R6=R1.B\(Z\); - b2: 65 43 R5=R4.B\(Z\); diff --git a/binutils-2.17/gas/testsuite/gas/bfin/move.s b/binutils-2.17/gas/testsuite/gas/bfin/move.s deleted file mode 100644 index 25336715..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/move.s +++ /dev/null @@ -1,91 +0,0 @@ - .text - .global move_register -move_register: - r7 = A0.X; - Fp = B3; - l2 = R5; - M2 = i2; - a1.w = usp; - r0 = astat; - r1 = sEQstat; - R2 = SYScfg; - R3 = reti; - R4 = RETX; - r5 = reTN; - r6 = rETe; - R7 = RETS; - R5 = lc0; - r4 = Lc1; - r3 = Lt0; - r2 = LT1; - r1 = Lb0; - r0 = LB1; - R2 = Cycles; - R3 = Cycles2; - r1 = emudat; - CYCLES = A0.W; - Rets = Fp; - Lt1 = USP; - ASTAT = P2; - A0 = A1; - a1 = a0; - a0 = R0; - A1 = r1; - - R4 = A0 (fu); - r5 = A1 (ISS2); - R6 = a0; - R7 = A1; - R6 = A0, R7 = a1; - r1 = a1, r0 = a0 (fu); - - .text - .global move_conditional -move_conditional: - if cc R5 = P2; - if !cc Sp = R0; - - .text - .global move_half_to_full_zero_extend -move_half_to_full_zero_extend: - R2 = r7.L (Z); - r0 = R1.L (z); - - .text - .global move_half_to_full_sign_extend -move_half_to_full_sign_extend: - R5 = R1.L (x); - r3 = r2.L (X); - - .text - .global move_register_half -move_register_half: - A0.X = r5.l; - a1.X = r2.L; - r0.l = a0.x; - R7.l = A1.X; - A0.L = r3.l; - a1.l = r4.l; - A0.h = r6.H; - A1.H = r5.h; - r0.l = A0 (iu); - R1.H = A1 (s2rnd); - r1.h = a1; - R2.l = A0, r2.H = A1 (IH); - R2.l = A0, r2.H = A1; - r0.H = A1, R0.L = a0 (t); - r0.H = A1, R0.L = a0 (fu); - r0.H = A1, R0.L = a0 (is); - r0.H = A1, R0.L = a0; - - .text - .global move_byte_zero_extend -move_byte_zero_extend: - R7 = r2.b (z); - r0 = R1.B (Z); - - .text - .global move_byte_sign_extend -move_byte_sign_extend: - r6 = r1.b (Z); - R5 = R4.B (z); diff --git a/binutils-2.17/gas/testsuite/gas/bfin/move2.d b/binutils-2.17/gas/testsuite/gas/bfin/move2.d deleted file mode 100644 index 722f2e1b..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/move2.d +++ /dev/null @@ -1,371 +0,0 @@ -#objdump: -dr -#name: move2 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 00 30 R0=R0; - 2: 09 30 R1=R1; - 4: 12 30 R2=R2; - 6: 1b 30 R3=R3; - 8: 24 30 R4=R4; - a: 2d 30 R5=R5; - c: 36 30 R6=R6; - e: 3f 30 R7=R7; - 10: 40 32 P0=P0; - 12: 49 32 P1=P1; - 14: 52 32 P2=P2; - 16: 5b 32 P3=P3; - 18: 64 32 P4=P4; - 1a: 6d 32 P5=P5; - 1c: 76 32 SP=SP; - 1e: 7f 32 FP=FP; - 20: 00 39 A0.x=A0.x; - 22: 09 39 A0.w=A0.w; - 24: 12 39 A1.x=A1.x; - 26: 1b 39 A1.w=A1.w; - 28: 03 31 R0=A1.w; - 2a: 0a 31 R1=A1.x; - 2c: 11 31 R2=A0.w; - 2e: 18 31 R3=A0.x; - 30: 67 30 R4=FP; - 32: 6e 30 R5=SP; - 34: 75 30 R6=P5; - 36: 7c 30 R7=P4; - 38: 43 32 P0=P3; - 3a: 4a 32 P1=P2; - 3c: 51 32 P2=P1; - 3e: 58 32 P3=P0; - 40: 27 32 P4=R7; - 42: 2e 32 P5=R6; - 44: 35 32 SP=R5; - 46: 3c 32 FP=R4; - 48: 03 38 A0.x=R3; - 4a: 0a 38 A0.w=R2; - 4c: 11 38 A1.x=R1; - 4e: 18 38 A1.w=R0; - 50: 01 39 A0.x=A0.w; - 52: 03 39 A0.x=A1.w; - 54: 02 39 A0.x=A1.x; - 56: 13 39 A1.x=A1.w; - 58: 11 39 A1.x=A0.w; - 5a: 10 39 A1.x=A0.x; - 5c: 09 39 A0.w=A0.w; - 5e: 0b 39 A0.w=A1.w; - 60: 0a 39 A0.w=A1.x; - 62: 1b 39 A1.w=A1.w; - 64: 19 39 A1.w=A0.w; - 66: 18 39 A1.w=A0.x; - 68: 80 30 R0=I0; - 6a: 89 30 R1=I1; - 6c: 92 30 R2=I2; - 6e: 9b 30 R3=I3; - 70: a4 30 R4=M0; - 72: ad 30 R5=M1; - 74: b6 30 R6=M2; - 76: bf 30 R7=M3; - 78: c0 30 R0=B0; - 7a: c9 30 R1=B1; - 7c: d2 30 R2=B2; - 7e: db 30 R3=B3; - 80: e4 30 R4=L0; - 82: ed 30 R5=L1; - 84: f6 30 R6=L2; - 86: ff 30 R7=L3; - 88: 80 32 P0=I0; - 8a: 89 32 P1=I1; - 8c: 92 32 P2=I2; - 8e: 9b 32 P3=I3; - 90: a4 32 P4=M0; - 92: ad 32 P5=M1; - 94: b6 32 SP=M2; - 96: bf 32 FP=M3; - 98: c0 32 P0=B0; - 9a: c9 32 P1=B1; - 9c: d2 32 P2=B2; - 9e: db 32 P3=B3; - a0: e4 32 P4=L0; - a2: ed 32 P5=L1; - a4: f6 32 SP=L2; - a6: ff 32 FP=L3; - a8: 80 38 A0.x=I0; - aa: 89 38 A0.w=I1; - ac: 92 38 A1.x=I2; - ae: 9b 38 A1.w=I3; - b0: 84 38 A0.x=M0; - b2: 8d 38 A0.w=M1; - b4: 96 38 A1.x=M2; - b6: 9f 38 A1.w=M3; - b8: c0 38 A0.x=B0; - ba: c9 38 A0.w=B1; - bc: d2 38 A1.x=B2; - be: db 38 A1.w=B3; - c0: c4 38 A0.x=L0; - c2: cd 38 A0.w=L1; - c4: d6 38 A1.x=L2; - c6: df 38 A1.w=L3; - c8: 00 34 I0=R0; - ca: 48 34 I1=P0; - cc: 56 34 I2=SP; - ce: 5f 34 I3=FP; - d0: 00 35 I0=A0.x; - d2: 09 35 I1=A0.w; - d4: 12 35 I2=A1.x; - d6: 1b 35 I3=A1.w; - d8: 20 34 M0=R0; - da: 68 34 M1=P0; - dc: 76 34 M2=SP; - de: 7f 34 M3=FP; - e0: 20 35 M0=A0.x; - e2: 29 35 M1=A0.w; - e4: 32 35 M2=A1.x; - e6: 3b 35 M3=A1.w; - e8: 00 36 B0=R0; - ea: 48 36 B1=P0; - ec: 56 36 B2=SP; - ee: 5f 36 B3=FP; - f0: 00 37 B0=A0.x; - f2: 09 37 B1=A0.w; - f4: 12 37 B2=A1.x; - f6: 1b 37 B3=A1.w; - f8: 20 36 L0=R0; - fa: 68 36 L1=P0; - fc: 76 36 L2=SP; - fe: 7f 36 L3=FP; - 100: 20 37 L0=A0.x; - 102: 29 37 L1=A0.w; - 104: 32 37 L2=A1.x; - 106: 3b 37 L3=A1.w; - 108: 81 34 I0=I1; - 10a: 8c 34 I1=M0; - 10c: d1 34 I2=B1; - 10e: dc 34 I3=L0; - 110: a1 34 M0=I1; - 112: ac 34 M1=M0; - 114: f1 34 M2=B1; - 116: fc 34 M3=L0; - 118: 81 36 B0=I1; - 11a: 8c 36 B1=M0; - 11c: d1 36 B2=B1; - 11e: dc 36 B3=L0; - 120: a1 36 L0=I1; - 122: ac 36 L1=M0; - 124: f1 36 L2=B1; - 126: fc 36 L3=L0; - 128: c8 31 R1=USP; - 12a: d0 33 P2=USP; - 12c: f0 33 SP=USP; - 12e: f8 33 FP=USP; - 130: c0 39 A0.x=USP; - 132: d8 39 A1.w=USP; - 134: 02 3e USP=R2; - 136: 44 3e USP=P4; - 138: 46 3e USP=SP; - 13a: 47 3e USP=FP; - 13c: 00 3f USP=A0.x; - 13e: 03 3f USP=A1.w; - 140: 06 31 R0=ASTAT; - 142: c9 31 R1=SEQSTAT; - 144: d2 31 R2=SYSCFG; - 146: db 31 R3=RETI; - 148: e4 31 R4=RETX; - 14a: ed 31 R5=RETN; - 14c: f6 31 R6=RETE; - 14e: 3f 31 R7=RETS; - 150: 80 31 R0=LC0; - 152: 8b 31 R1=LC1; - 154: 91 31 R2=LT0; - 156: 9c 31 R3=LT1; - 158: a2 31 R4=LB0; - 15a: ad 31 R5=LB1; - 15c: b6 31 R6=CYCLES; - 15e: bf 31 R7=CYCLES2; - 160: 30 38 ASTAT=R0; - 162: 09 3e SEQSTAT=R1; - 164: 13 3e SYSCFG=R3; - 166: 1c 3e RETI=R4; - 168: 25 3e RETX=R5; - 16a: 2e 3e RETN=R6; - 16c: 37 3e RETE=R7; - 16e: 38 38 RETS=R0; - 170: 01 3c LC0=R1; - 172: 1a 3c LC1=R2; - 174: 0b 3c LT0=R3; - 176: 24 3c LT1=R4; - 178: 15 3c LB0=R5; - 17a: 2e 3c LB1=R6; - 17c: 37 3c CYCLES=R7; - 17e: 38 3c CYCLES2=R0; - 180: 70 38 ASTAT=P0; - 182: 49 3e SEQSTAT=P1; - 184: 53 3e SYSCFG=P3; - 186: 5c 3e RETI=P4; - 188: 65 3e RETX=P5; - 18a: 6e 3e RETN=SP; - 18c: 77 3e RETE=FP; - 18e: 78 38 RETS=P0; - 190: 41 3c LC0=P1; - 192: 5a 3c LC1=P2; - 194: 4b 3c LT0=P3; - 196: 64 3c LT1=P4; - 198: 55 3c LB0=P5; - 19a: 6e 3c LB1=SP; - 19c: 76 3c CYCLES=SP; - 19e: 78 3c CYCLES2=P0; - 1a0: 08 c4 [0|3][0|f] c0 A0=A1; - 1a4: 08 c4 [0|3][0|f] e0 A1=A0; - 1a8: 09 c4 00 20 A0=R0; - 1ac: 09 c4 08 20 A0=R1; - 1b0: 09 c4 10 20 A0=R2; - 1b4: 09 c4 00 a0 A1=R0; - 1b8: 09 c4 08 a0 A1=R1; - 1bc: 09 c4 10 a0 A1=R2; - 1c0: 0b c0 00 38 R0 = A0; - 1c4: 8b c0 80 38 R2 = A0 \(FU\); - 1c8: 2b c1 00 39 R4 = A0 \(ISS2\); - 1cc: 0f c0 00 18 R1 = A1; - 1d0: 8f c0 80 18 R3 = A1 \(FU\); - 1d4: 2f c1 00 19 R5 = A1 \(ISS2\); - 1d8: 0f c0 00 38 R1 = A1, R0 = A0; - 1dc: 8f c0 00 38 R1 = A1, R0 = A0 \(FU\); - 1e0: 2f c1 80 39 R7 = A1, R6 = A0 \(ISS2\); - 1e4: 0f c0 00 38 R1 = A1, R0 = A0; - 1e8: 8f c0 80 38 R3 = A1, R2 = A0 \(FU\); - 1ec: 2f c1 00 39 R5 = A1, R4 = A0 \(ISS2\); - 1f0: 18 07 IF CC R3 = R0; - 1f2: 10 07 IF CC R2 = R0; - 1f4: 38 07 IF CC R7 = R0; - 1f6: 52 07 IF CC R2 = P2; - 1f8: 61 07 IF CC R4 = P1; - 1fa: 40 07 IF CC R0 = P0; - 1fc: 7c 07 IF CC R7 = P4; - 1fe: c2 07 IF CC P0 = P2; - 200: e5 07 IF CC P4 = P5; - 202: cb 07 IF CC P1 = P3; - 204: ec 07 IF CC P5 = P4; - 206: 82 07 IF CC P0 = R2; - 208: a3 07 IF CC P4 = R3; - 20a: af 07 IF CC P5 = R7; - 20c: 96 07 IF CC P2 = R6; - 20e: 18 06 IF ! CC R3 = R0; - 210: 10 06 IF ! CC R2 = R0; - 212: 38 06 IF ! CC R7 = R0; - 214: 52 06 IF ! CC R2 = P2; - 216: 61 06 IF ! CC R4 = P1; - 218: 40 06 IF ! CC R0 = P0; - 21a: 7c 06 IF ! CC R7 = P4; - 21c: c2 06 IF ! CC P0 = P2; - 21e: e5 06 IF ! CC P4 = P5; - 220: cb 06 IF ! CC P1 = P3; - 222: ec 06 IF ! CC P5 = P4; - 224: 82 06 IF ! CC P0 = R2; - 226: a3 06 IF ! CC P4 = R3; - 228: af 06 IF ! CC P5 = R7; - 22a: 96 06 IF ! CC P2 = R6; - 22c: c0 42 R0=R0.L\(Z\); - 22e: ca 42 R2=R1.L\(Z\); - 230: d1 42 R1=R2.L\(Z\); - 232: f7 42 R7=R6.L\(Z\); - 234: 80 42 R0=R0.L\(X\); - 236: 8a 42 R2=R1.L\(X\); - 238: 91 42 R1=R2.L\(X\); - 23a: b7 42 R7=R6.L\(X\); - 23c: c0 42 R0=R0.L\(Z\); - 23e: ca 42 R2=R1.L\(Z\); - 240: d1 42 R1=R2.L\(Z\); - 242: f7 42 R7=R6.L\(Z\); - 244: 09 c4 00 40 A0.x=R0.L; - 248: 09 c4 08 40 A0.x=R1.L; - 24c: 09 c4 00 c0 A1.x=R0.L; - 250: 09 c4 08 c0 A1.x=R1.L; - 254: 0a c4 [0|3][0|6] 00 R0.L=A0.x; - 258: 0a c4 [0|3][0|6] 02 R1.L=A0.x; - 25c: 0a c4 [0|3][0|6] 0e R7.L=A0.x; - 260: 0a c4 [0|3][0|6] 40 R0.L=A1.x; - 264: 0a c4 [0|3][0|6] 42 R1.L=A1.x; - 268: 0a c4 [0|3][0|6] 4e R7.L=A1.x; - 26c: 09 c4 00 00 A0.L=R0.L; - 270: 09 c4 08 00 A0.L=R1.L; - 274: 09 c4 30 00 A0.L=R6.L; - 278: 09 c4 00 80 A1.L=R0.L; - 27c: 09 c4 08 80 A1.L=R1.L; - 280: 09 c4 30 80 A1.L=R6.L; - 284: 29 c4 00 00 A0.H=R0.H; - 288: 29 c4 08 00 A0.H=R1.H; - 28c: 29 c4 30 00 A0.H=R6.H; - 290: 29 c4 00 80 A1.H=R0.H; - 294: 29 c4 08 80 A1.H=R1.H; - 298: 29 c4 30 80 A1.H=R6.H; - 29c: 03 c0 00 38 R0.L = A0; - 2a0: 03 c0 40 38 R1.L = A0; - 2a4: 83 c0 00 38 R0.L = A0 \(FU\); - 2a8: 83 c0 40 38 R1.L = A0 \(FU\); - 2ac: 03 c1 00 38 R0.L = A0 \(IS\); - 2b0: 03 c1 40 38 R1.L = A0 \(IS\); - 2b4: 83 c1 00 38 R0.L = A0 \(IU\); - 2b8: 83 c1 40 38 R1.L = A0 \(IU\); - 2bc: 43 c0 00 38 R0.L = A0 \(T\); - 2c0: 43 c0 40 38 R1.L = A0 \(T\); - 2c4: 23 c0 00 38 R0.L = A0 \(S2RND\); - 2c8: 23 c0 40 38 R1.L = A0 \(S2RND\); - 2cc: 23 c1 00 38 R0.L = A0 \(ISS2\); - 2d0: 23 c1 40 38 R1.L = A0 \(ISS2\); - 2d4: 63 c1 00 38 R0.L = A0 \(IH\); - 2d8: 63 c1 40 38 R1.L = A0 \(IH\); - 2dc: 07 c0 00 18 R0.H = A1; - 2e0: 07 c0 40 18 R1.H = A1; - 2e4: 87 c0 00 18 R0.H = A1 \(FU\); - 2e8: 87 c0 40 18 R1.H = A1 \(FU\); - 2ec: 07 c1 00 18 R0.H = A1 \(IS\); - 2f0: 07 c1 40 18 R1.H = A1 \(IS\); - 2f4: 87 c1 00 18 R0.H = A1 \(IU\); - 2f8: 87 c1 40 18 R1.H = A1 \(IU\); - 2fc: 47 c0 00 18 R0.H = A1 \(T\); - 300: 47 c0 40 18 R1.H = A1 \(T\); - 304: 27 c0 00 18 R0.H = A1 \(S2RND\); - 308: 27 c0 40 18 R1.H = A1 \(S2RND\); - 30c: 27 c1 00 18 R0.H = A1 \(ISS2\); - 310: 27 c1 40 18 R1.H = A1 \(ISS2\); - 314: 67 c1 00 18 R0.H = A1 \(IH\); - 318: 67 c1 40 18 R1.H = A1 \(IH\); - 31c: 07 c0 00 38 R0.H = A1, R0.L = A0; - 320: 07 c0 40 38 R1.H = A1, R1.L = A0; - 324: 87 c0 00 38 R0.H = A1, R0.L = A0 \(FU\); - 328: 87 c0 40 38 R1.H = A1, R1.L = A0 \(FU\); - 32c: 07 c1 00 38 R0.H = A1, R0.L = A0 \(IS\); - 330: 07 c1 40 38 R1.H = A1, R1.L = A0 \(IS\); - 334: 87 c1 00 38 R0.H = A1, R0.L = A0 \(IU\); - 338: 87 c1 40 38 R1.H = A1, R1.L = A0 \(IU\); - 33c: 47 c0 00 38 R0.H = A1, R0.L = A0 \(T\); - 340: 47 c0 40 38 R1.H = A1, R1.L = A0 \(T\); - 344: 27 c0 00 38 R0.H = A1, R0.L = A0 \(S2RND\); - 348: 27 c0 40 38 R1.H = A1, R1.L = A0 \(S2RND\); - 34c: 27 c1 00 38 R0.H = A1, R0.L = A0 \(ISS2\); - 350: 27 c1 40 38 R1.H = A1, R1.L = A0 \(ISS2\); - 354: 67 c1 00 38 R0.H = A1, R0.L = A0 \(IH\); - 358: 67 c1 40 38 R1.H = A1, R1.L = A0 \(IH\); - 35c: 07 c0 00 38 R0.H = A1, R0.L = A0; - 360: 07 c0 40 38 R1.H = A1, R1.L = A0; - 364: 87 c0 00 38 R0.H = A1, R0.L = A0 \(FU\); - 368: 87 c0 40 38 R1.H = A1, R1.L = A0 \(FU\); - 36c: 07 c1 00 38 R0.H = A1, R0.L = A0 \(IS\); - 370: 07 c1 40 38 R1.H = A1, R1.L = A0 \(IS\); - 374: 87 c1 00 38 R0.H = A1, R0.L = A0 \(IU\); - 378: 87 c1 40 38 R1.H = A1, R1.L = A0 \(IU\); - 37c: 47 c0 00 38 R0.H = A1, R0.L = A0 \(T\); - 380: 47 c0 40 38 R1.H = A1, R1.L = A0 \(T\); - 384: 27 c0 00 38 R0.H = A1, R0.L = A0 \(S2RND\); - 388: 27 c0 40 38 R1.H = A1, R1.L = A0 \(S2RND\); - 38c: 27 c1 00 38 R0.H = A1, R0.L = A0 \(ISS2\); - 390: 27 c1 40 38 R1.H = A1, R1.L = A0 \(ISS2\); - 394: 67 c1 00 38 R0.H = A1, R0.L = A0 \(IH\); - 398: 67 c1 40 38 R1.H = A1, R1.L = A0 \(IH\); - 39c: 48 43 R0=R1.B\(Z\); - 39e: 50 43 R0=R2.B\(Z\); - 3a0: 4f 43 R7=R1.B\(Z\); - 3a2: 57 43 R7=R2.B\(Z\); - 3a4: 08 43 R0=R1.B\(X\); - 3a6: 10 43 R0=R2.B\(X\); - 3a8: 0f 43 R7=R1.B\(X\); - 3aa: 17 43 R7=R2.B\(X\); diff --git a/binutils-2.17/gas/testsuite/gas/bfin/move2.s b/binutils-2.17/gas/testsuite/gas/bfin/move2.s deleted file mode 100755 index 1036900f..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/move2.s +++ /dev/null @@ -1,530 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//4 MOVE
-//
-
-//genreg = genreg ; /* (a) */
-R0 = R0;
-R1 = R1;
-R2 = R2;
-R3 = R3;
-R4 = R4;
-R5 = R5;
-R6 = R6;
-R7 = R7;
-
-P0 = P0;
-P1 = P1;
-P2 = P2;
-P3 = P3;
-P4 = P4;
-P5 = P5;
-SP = SP;
-FP = FP;
-
-A0.X = A0.X;
-A0.W = A0.W;
-A1.X = A1.X;
-A1.W = A1.W;
-
-
-R0 = A1.W;
-R1 = A1.X;
-R2 = A0.W;
-R3 = A0.X;
-R4 = FP;
-R5 = SP;
-R6 = P5;
-R7 = P4;
-
-P0 = P3;
-P1 = P2;
-P2 = P1;
-P3 = P0;
-P4 = R7;
-P5 = R6;
-SP = R5;
-FP = R4;
-
-A0.X = R3;
-A0.W = R2;
-A1.X = R1;
-A1.W = R0;
-
-A0.X = A0.W;
-A0.X = A1.W;
-A0.X = A1.X;
-
-A1.X = A1.W;
-A1.X = A0.W;
-A1.X = A0.X;
-
-A0.W = A0.W;
-A0.W = A1.W;
-A0.W = A1.X;
-
-A1.W = A1.W;
-A1.W = A0.W;
-A1.W = A0.X;
-
-//genreg = dagreg ; /* (a) */
-R0 = I0;
-R1 = I1;
-R2 = I2;
-R3 = I3;
-R4 = M0;
-R5 = M1;
-R6 = M2;
-R7 = M3;
-
-R0 = B0;
-R1 = B1;
-R2 = B2;
-R3 = B3;
-R4 = L0;
-R5 = L1;
-R6 = L2;
-R7 = L3;
-
-P0 = I0;
-P1 = I1;
-P2 = I2;
-P3 = I3;
-P4 = M0;
-P5 = M1;
-SP = M2;
-FP = M3;
-
-P0 = B0;
-P1 = B1;
-P2 = B2;
-P3 = B3;
-P4 = L0;
-P5 = L1;
-SP = L2;
-FP = L3;
-
-
-A0.X = I0;
-A0.W = I1;
-A1.X = I2;
-A1.W = I3;
-
-A0.X = M0;
-A0.W = M1;
-A1.X = M2;
-A1.W = M3;
-
-A0.X = B0;
-A0.W = B1;
-A1.X = B2;
-A1.W = B3;
-
-A0.X = L0;
-A0.W = L1;
-A1.X = L2;
-A1.W = L3;
-
-//dagreg = genreg ; /* (a) */
-I0 = R0;
-I1 = P0;
-I2 = SP;
-I3 = FP;
-I0 = A0.X;
-I1 = A0.W;
-I2 = A1.X;
-I3 = A1.W;
-
-M0 = R0;
-M1 = P0;
-M2 = SP;
-M3 = FP;
-M0 = A0.X;
-M1 = A0.W;
-M2 = A1.X;
-M3 = A1.W;
-
-B0 = R0;
-B1 = P0;
-B2 = SP;
-B3 = FP;
-B0 = A0.X;
-B1 = A0.W;
-B2 = A1.X;
-B3 = A1.W;
-
-L0 = R0;
-L1 = P0;
-L2 = SP;
-L3 = FP;
-L0 = A0.X;
-L1 = A0.W;
-L2 = A1.X;
-L3 = A1.W;
-
-
-//dagreg = dagreg ; /* (a) */
-
-I0 = I1;
-I1 = M0;
-I2 = B1;
-I3 = L0;
-
-M0 = I1;
-M1 = M0;
-M2 = B1;
-M3 = L0;
-
-B0 = I1;
-B1 = M0;
-B2 = B1;
-B3 = L0;
-
-L0 = I1;
-L1 = M0;
-L2 = B1;
-L3 = L0;
-
-//genreg = USP ; /* (a)*/
-R1 = USP;
-P2 = USP;
-SP = USP;
-FP = USP;
-A0.X = USP;
-A1.W = USP;
-
-//USP = genreg ; /* (a)*/
-USP = R2;
-USP = P4;
-USP = SP;
-USP = FP;
-USP = A0.X;
-USP = A1.W;
-
-//Dreg = sysreg ; /* sysreg to 32-bit D-register (a) */
-R0 = ASTAT;
-R1 = SEQSTAT;
-R2 = SYSCFG;
-R3 = RETI;
-R4 = RETX;
-R5 = RETN;
-R6 = RETE;
-R7 = RETS;
-R0 = LC0;
-R1 = LC1;
-R2 = LT0;
-R3 = LT1;
-R4 = LB0;
-R5 = LB1;
-R6 = CYCLES;
-R7 = CYCLES2;
-//R0 = EMUDAT;
-//sysreg = Dreg ; /* 32-bit D-register to sysreg (a) */
-ASTAT = R0;
-SEQSTAT = R1;
-SYSCFG = R3;
-RETI = R4;
-RETX =R5;
-RETN = R6;
-RETE = R7;
-RETS = R0;
-LC0 = R1;
-LC1 = R2;
-LT0 = R3;
-LT1 = R4;
-LB0 = R5;
-LB1 = R6;
-CYCLES = R7;
-CYCLES2 = R0;
-//EMUDAT = R1;
-//sysreg = Preg ; /* 32-bit P-register to sysreg (a) */
-ASTAT = P0;
-SEQSTAT = P1;
-SYSCFG = P3;
-RETI = P4;
-RETX =P5;
-RETN = SP;
-RETE = FP;
-RETS = P0;
-LC0 = P1;
-LC1 = P2;
-LT0 = P3;
-LT1 = P4;
-LB0 = P5;
-LB1 = SP;
-CYCLES = SP;
-CYCLES2 = P0;
-//EMUDAT = P1;
-
-
-//sysreg = USP ; /* (a) */
-//ASTAT = USP;
-//SEQSTAT = USP;
-//SYSCFG = USP;
-//RETI = USP;
-//RETX =USP;
-//RETN = USP;
-//RETE = USP;
-//RETS = USP;
-//LC0 = USP;
-//LC1 = USP;
-//LT0 = USP;
-//LT1 = USP;
-//LB0 = USP;
-//LB1 = USP;
-//CYCLES = USP;
-//CYCLES2 = USP;
-//EMUDAT = USP;
-
-A0 = A1 ; /* move 40-bit Accumulator value (b) */
-
-A1 = A0 ; /* move 40-bit Accumulator value (b) */
-
-//A0 = Dreg ; /* 32-bit D-register to 40-bit A0, sign extended (b)*/
-A0 = R0;
-A0 = R1;
-A0 = R2;
-
-//A1 = Dreg ; /* 32-bit D-register to 40-bit A1, sign extended (b)*/
-
-A1 = R0;
-A1 = R1;
-A1 = R2;
-//Dreg_even = A0 (opt_mode) ; /* move 32-bit A0.W to even Dreg (b) */
-R0 = A0;
-R2 = A0(FU);
-R4 = A0(ISS2);
-
-//Dreg_odd = A1 (opt_mode) ; /* move 32-bit A1.W to odd Dreg (b) */
-R1 = A1;
-R3 = A1(FU);
-R5 = A1(ISS2);
-
-//Dreg_even = A0, Dreg_odd = A1 (opt_mode) ; /* move both Accumulators to a register pair (b) */
-R0 = A0, R1 = A1;
-R0 = A0, R1 = A1(FU);
-R6 = A0, R7 = A1(ISS2);
-
-
-//Dreg_odd = A1, Dreg_even = A0 (opt_mode) ; /* move both Accumulators to a register pair (b) */
-R1 = A1, R0 = A0;
-R3 = A1, R2 = A0(FU);
-R5 = A1, R4 = A0(ISS2);
-
-//IF CC DPreg = DPreg ; /* move if CC = 1 (a) */
-
-IF CC R3 = R0;
-IF CC R2 = R0;
-IF CC R7 = R0;
-
-IF CC R2 = P2;
-IF CC R4 = P1;
-IF CC R0 = P0;
-IF CC R7 = P4;
-
-IF CC P0 = P2;
-IF CC P4 = P5;
-IF CC P1 = P3;
-IF CC P5 = P4;
-
-IF CC P0 = R2;
-IF CC P4 = R3;
-IF CC P5 = R7;
-IF CC P2 = R6;
-
-//IF ! CC DPreg = DPreg ; /* move if CC = 0 (a) */
-IF !CC R3 = R0;
-IF !CC R2 = R0;
-IF !CC R7 = R0;
-
-IF !CC R2 = P2;
-IF !CC R4 = P1;
-IF !CC R0 = P0;
-IF !CC R7 = P4;
-
-IF !CC P0 = P2;
-IF !CC P4 = P5;
-IF !CC P1 = P3;
-IF !CC P5 = P4;
-
-IF !CC P0 = R2;
-IF !CC P4 = R3;
-IF !CC P5 = R7;
-IF !CC P2 = R6;
-
-//Dreg = Dreg_lo (Z) ; /* (a) */
-
-R0 = R0.L(Z);
-R2 = R1.L(Z);
-R1 = R2.L(Z);
-R7 = R6.L(Z);
-
-//Dreg = Dreg_lo (X) ; /* (a)*/
-R0 = R0.L(X);
-R2 = R1.L(X);
-R1 = R2.L(X);
-R7 = R6.L(X);
-
-R0 = R0.L;
-R2 = R1.L;
-R1 = R2.L;
-R7 = R6.L;
-
-//A0.X = Dreg_lo ; /* least significant 8 bits of Dreg into A0.X (b) */
-A0.X = R0.L;
-A0.X = R1.L;
-
-//A1.X = Dreg_lo ; /* least significant 8 bits of Dreg into A1.X (b) */
-A1.X = R0.L;
-A1.X = R1.L;
-
-//Dreg_lo = A0.X ; /* 8-bit A0.X, sign-extended, into least significant 16 bits of Dreg (b) */
-R0.L = A0.X;
-R1.L = A0.X;
-R7.L = A0.X;
-
-//Dreg_lo = A1.X ; /* 8-bit A1.X, sign-extended, into least significant 16 bits of Dreg (b) */
-R0.L = A1.X;
-R1.L = A1.X;
-R7.L = A1.X;
-
-//A0.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A0.W (b) */
-A0.L = R0.L;
-A0.L = R1.L;
-A0.L = R6.L;
-
-//A1.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A1.W (b) */
-A1.L = R0.L;
-A1.L = R1.L;
-A1.L = R6.L;
-
-//A0.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A0.W (b) */
-A0.H = R0.H;
-A0.H = R1.H;
-A0.H = R6.H;
-//A1.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A1.W (b) */
-A1.H = R0.H;
-A1.H = R1.H;
-A1.H = R6.H;
-
-//Dreg_lo = A0 (opt_mode) ; /* move A0 to lower half of Dreg (b) */
-R0.L = A0;
-R1.L = A0;
-
-R0.L = A0(FU);
-R1.L = A0(FU);
-
-R0.L = A0(IS);
-R1.L = A0(IS);
-
-R0.L = A0(IU);
-R1.L = A0(IU);
-
-R0.L = A0(T);
-R1.L = A0(T);
-
-R0.L = A0(S2RND);
-R1.L = A0(S2RND);
-
-R0.L = A0(ISS2);
-R1.L = A0(ISS2);
-
-R0.L = A0(IH);
-R1.L = A0(IH);
-
-//Dreg_hi = A1 (opt_mode) ; /* move A1 to upper half of Dreg (b) */
-R0.H = A1;
-R1.H = A1;
-
-R0.H = A1(FU);
-R1.H = A1(FU);
-
-R0.H = A1(IS);
-R1.H = A1(IS);
-
-R0.H = A1(IU);
-R1.H = A1(IU);
-
-R0.H = A1(T);
-R1.H = A1(T);
-
-R0.H = A1(S2RND);
-R1.H = A1(S2RND);
-
-R0.H = A1(ISS2);
-R1.H = A1(ISS2);
-
-R0.H = A1(IH);
-R1.H = A1(IH);
-
-
-//Dreg_lo = A0, Dreg_hi = A1 (opt_mode) ; /* move both values at once; must go to the lower and upper halves of the same Dreg (b)*/
-
-R0.L = A0, R0.H = A1;
-R1.L = A0, R1.H = A1;
-
-R0.L = A0, R0.H = A1(FU);
-R1.L = A0, R1.H = A1(FU);
-
-R0.L = A0, R0.H = A1(IS);
-R1.L = A0, R1.H = A1(IS);
-
-R0.L = A0, R0.H = A1(IU);
-R1.L = A0, R1.H = A1(IU);
-
-R0.L = A0, R0.H = A1(T);
-R1.L = A0, R1.H = A1(T);
-
-R0.L = A0, R0.H = A1(S2RND);
-R1.L = A0, R1.H = A1(S2RND);
-
-R0.L = A0, R0.H = A1(ISS2);
-R1.L = A0, R1.H = A1(ISS2);
-
-R0.L = A0, R0.H = A1(IH);
-R1.L = A0, R1.H = A1(IH);
-
-//Dreg_hi = A1, Dreg_lo = AO (opt_mode) ; /* move both values at once; must go to the upper and lower halves of the same Dreg (b) */
-
-R0.H = A1,R0.L = A0;
-R1.H = A1,R1.L = A0;
-
-R0.H = A1,R0.L = A0 (FU);
-R1.H = A1,R1.L = A0 (FU);
-
-R0.H = A1,R0.L = A0 (IS);
-R1.H = A1,R1.L = A0 (IS);
-
-R0.H = A1,R0.L = A0 (IU);
-R1.H = A1,R1.L = A0 (IU);
-
-R0.H = A1,R0.L = A0 (T);
-R1.H = A1,R1.L = A0 (T);
-
-R0.H = A1,R0.L = A0 (S2RND);
-R1.H = A1,R1.L = A0 (S2RND);
-
-R0.H = A1,R0.L = A0 (ISS2);
-R1.H = A1,R1.L = A0 (ISS2);
-
-R0.H = A1,R0.L = A0 (IH);
-R1.H = A1,R1.L = A0 (IH);
-
-//Dreg = Dreg_byte (Z) ; /* (a)*/
-
-R0 = R1.B(Z);
-R0 = R2.B(Z);
-
-R7 = R1.B(Z);
-R7 = R2.B(Z);
-
-//Dreg = Dreg_byte (X) ; /* (a) */
-R0 = R1.B(X);
-R0 = R2.B(X);
-
-R7 = R1.B(X);
-R7 = R2.B(X);
-
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/parallel.d b/binutils-2.17/gas/testsuite/gas/bfin/parallel.d deleted file mode 100644 index 26aee7bf..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/parallel.d +++ /dev/null @@ -1,226 +0,0 @@ -#objdump: -d -#name: parallel -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 0a ce 13 8a R5=DEPOSIT\(R3,R2\) \|\| I0\+=2 \|\| NOP; - 4: 60 9f 00 00 - 8: 0a ce 37 c0 R0=DEPOSIT\(R7,R6\)\(X\) \|\| I1\+=4 \|\| NOP; - c: 69 9f 00 00 - 10: 0a ce 0a 08 R4=EXTRACT\(R2,R1.L\) \(Z\) \|\| I2-=M0 \|\| NOP; - 14: 72 9e 00 00 - 18: 0a ce 10 04 R2=EXTRACT\(R0,R2.L\) \(Z\) \|\| I3\+=M1 \|\| NOP; - 1c: 67 9e 00 00 - 20: 0a ce 23 4e R7=EXTRACT\(R3,R4.L\)\(X\) \|\| I3\+=M1\(BREV\) \|\| NOP; - 24: e7 9e 00 00 - 28: 0a ce 0e 4a R5=EXTRACT\(R6,R1.L\)\(X\) \|\| I0-=2 \|\| NOP; - 2c: 64 9f 00 00 - 30: 08 ce 08 00 BITMUX \(R1,R0,A0 \)\(ASR\) \|\| I1-=4 \|\| NOP; - 34: 6d 9f 00 00 - 38: 08 ce 13 00 BITMUX \(R2,R3,A0 \)\(ASR\) \|\| I0\+=2 \|\| NOP; - 3c: 60 9f 00 00 - 40: 08 ce 25 40 BITMUX \(R4,R5,A0 \)\(ASL\) \|\| SP=\[P0\] \|\| NOP; - 44: 46 91 00 00 - 48: 08 ce 3e 40 BITMUX \(R7,R6,A0 \)\(ASL\) \|\| FP=\[P1\+\+\] \|\| NOP; - 4c: 4f 90 00 00 - 50: 06 ce 00 ca R5.L=ONES R0 \|\| P0=\[FP--\] \|\| NOP; - 54: f8 90 00 00 - 58: 06 ce 02 ce R7.L=ONES R2 \|\| P1=\[P5\+0x18\] \|\| NOP; - 5c: a9 ad 00 00 - 60: 10 cc 00 00 A0= ABS A0 \|\| P2=\[SP\+0x3c\] \|\| R0=\[I0\]; - 64: f2 af 00 9d - 68: 10 cc 00 40 A0= ABS A1 \|\| P3=\[FP-60\] \|\| R1=\[I1\+\+M0\]; - 6c: 1b b9 89 9d - 70: 30 cc 00 00 A1= ABS A0 \|\| P4=\[FP-4\] \|\| R2=\[I1\+\+\]; - 74: fc b9 0a 9c - 78: 30 cc 00 40 A1= ABS A1 \|\| FP=\[SP\] \|\| R3=\[I2--\]; - 7c: 77 91 93 9c - 80: 10 cc 00 c0 A1= ABS A0,A0= ABS A0 \|\| R4=\[P5\+0x38\] \|\| R0.H=W\[I0\]; - 84: ac a3 40 9d - 88: 07 cc 10 80 R0= ABS R2 \|\| B\[SP\]=R0 \|\| R1.H=W\[I1\+\+\]; - 8c: 30 9b 49 9c - 90: 02 cc 10 a8 R4.L=R2.H\+R0.L \(S\) \|\| B\[FP\]=R0 \|\| R2.H=W\[I2--\]; - 94: 38 9b d2 9c - 98: 22 cc 09 aa R5.H=R1.H\+R1.L \(S\) \|\| B\[P0\]=R0 \|\| R3.L=W\[I3\]; - 9c: 00 9b 3b 9d - a0: 02 cc 35 0c R6.L=R6.L\+R5.L \(NS\) \|\| B\[P1\]=R0 \|\| R4.L=W\[I3\+\+\]; - a4: 08 9b 3c 9c - a8: 05 cc 01 98 R4.L=R0\+R1\(RND20\) \|\| B\[P2\]=R0 \|\| R5.L=W\[I2--\]; - ac: 10 9b b5 9c - b0: 25 cc 28 96 R3.H=R5\+R0\(RND20\) \|\| R0=B\[P0\]\(X\) \|\| \[I0\]=R6; - b4: 40 99 06 9f - b8: 05 cc 3d d2 R1.L=R7-R5\(RND20\) \|\| R0=B\[P4\] \(Z\) \|\| \[I1\+\+\]=R7; - bc: 20 99 0f 9e - c0: 05 cc 01 04 R2.L=R0\+R1\(RND12\) \|\| R1=B\[SP\]\(X\) \|\| \[I2--\]=R7; - c4: 71 99 97 9e - c8: 25 cc 3e 0e R7.H=R7\+R6\(RND12\) \|\| R1=B\[P0\]\(X\) \|\| \[I3\+\+M1\]=R6; - cc: 41 99 be 9f - d0: 05 cc 1a 4a R5.L=R3-R2\(RND12\) \|\| R1=B\[P1\] \(Z\) \|\| W\[I3\]=R5.H; - d4: 09 99 5d 9f - d8: 25 cc 0a 44 R2.H=R1-R2\(RND12\) \|\| R1=B\[P2\] \(Z\) \|\| W\[I2\+\+\]=R4.H; - dc: 11 99 54 9e - e0: 07 ce 25 0c R6.L=EXPADJ \(R5,R4.L\) \|\| R1=B\[P3\] \(Z\) \|\| W\[I1--\]=R3.H; - e4: 19 99 cb 9e - e8: 07 ce 08 ca R5.L=EXPADJ \(R0.H,R1.L\) \|\| R1=B\[P4\] \(Z\) \|\| W\[I0\]=R2.L; - ec: 21 99 22 9f - f0: 07 ce 2b 48 R4.L=EXPADJ \(R3,R5.L\) \(V\) \|\| R1=B\[P5\] \(Z\) \|\| W\[I0\+\+\]=R1.L; - f4: 29 99 21 9e - f8: 07 cc 2a 0c R6=MAX\(R5,R2\) \|\| R2=B\[P0\]\(X\) \|\| W\[I1--\]=R0.L; - fc: 42 99 a8 9e - 100: 07 cc 0b 00 R0=MAX\(R1,R3\) \|\| B\[P1\]=R2 \|\| NOP; - 104: 0a 9b 00 00 - 108: 07 cc 13 4a R5=MIN\(R2,R3\) \|\| B\[P2\]=R2 \|\| R0=\[I1\+\+\]; - 10c: 12 9b 08 9c - 110: 07 cc 38 48 R4=MIN\(R7,R0\) \|\| B\[P3\]=R2 \|\| R1=\[I1\+\+\]; - 114: 1a 9b 09 9c - 118: 0b cc 00 c0 A0-=A1 \|\| B\[P4\]=R2 \|\| R2=\[I1\+\+\]; - 11c: 22 9b 0a 9c - 120: 0b cc 00 e0 A0-=A1\(W32\) \|\| B\[P5\]=R2 \|\| R3=\[I1\+\+\]; - 124: 2a 9b 0b 9c - 128: 0b cc 00 80 A0\+=A1 \|\| B\[SP\]=R2 \|\| R4=\[I1\+\+\]; - 12c: 32 9b 0c 9c - 130: 0b cc 00 a0 A0\+=A1\(W32\) \|\| B\[FP\]=R2 \|\| R5=\[I1\+\+\]; - 134: 3a 9b 0d 9c - 138: 0b cc 00 0e R7=\(A0\+=A1\) \|\| B\[SP\]=R3 \|\| R6=\[I1\+\+\]; - 13c: 33 9b 0e 9c - 140: 0b cc 00 4c R6.L=\(A0\+=A1\) \|\| B\[FP\]=R3 \|\| R7=\[I1\+\+\]; - 144: 3b 9b 0f 9c - 148: 2b cc 00 40 R0.H=\(A0\+=A1\) \|\| B\[P0\]=R3 \|\| R7=\[I0\+\+\]; - 14c: 03 9b 07 9c - 150: 00 ca 0a 24 R0 = R1.H \* R2.L \|\| B\[P1\]=R3 \|\| R1=\[I0\+\+\]; - 154: 0b 9b 01 9c - 158: 20 ca 68 26 R1 = R5.H \* R0.H \(S2RND\) \|\| B\[P2\]=R3 \|\| R2=\[I0\+\+\]; - 15c: 13 9b 02 9c - 160: 80 ca db 23 R7 = R3.L \* R3.H \(FU\) \|\| B\[P3\]=R3 \|\| R3=\[I0\+\+\]; - 164: 1b 9b 03 9c - 168: 28 cb 15 27 R4 = R2.H \* R5.H \(ISS2\) \|\| B\[P4\]=R3 \|\| R0=\[I0\+\+\]; - 16c: 23 9b 00 9c - 170: 08 cb 0b 20 R0 = R1.L \* R3.L \(IS\) \|\| B\[P5\]=R3 \|\| R5=\[I0\+\+\]; - 174: 2b 9b 05 9c - 178: 08 ca a8 25 R6 = R5.H \* R0.L \|\| B\[FP\]=R4 \|\| R7=\[I0\+\+\]; - 17c: 3c 9b 07 9c - 180: 94 cb be 40 R2.H = R7.L \* R6.H \(M, IU\) \|\| B\[SP\]=R4 \|\| R6=\[I0\+\+\]; - 184: 34 9b 06 9c - 188: 04 ca e8 80 R3.H = R5.H \* R0.L \|\| R4=B\[P0\]\(X\) \|\| \[I0\+\+M0\]=R0; - 18c: 44 99 80 9f - 190: 14 ca 09 40 R0.H = R1.L \* R1.H \(M\) \|\| R4=B\[P1\]\(X\) \|\| \[I0\+\+M0\]=R1; - 194: 4c 99 81 9f - 198: 1c cb 3e 80 R1 = R7.H \* R6.L \(M, IS\) \|\| R4=B\[P2\]\(X\) \|\| \[I0\+\+M0\]=R2; - 19c: 54 99 82 9f - 1a0: 0c ca 02 41 R5 = R0.L \* R2.H \|\| R4=B\[P3\]\(X\) \|\| \[I0\+\+M0\]=R3; - 1a4: 5c 99 83 9f - 1a8: 1c ca b0 c0 R3 = R6.H \* R0.H \(M\) \|\| R4=B\[P4\] \(Z\) \|\| \[I0\+\+M0\]=R4; - 1ac: 24 99 84 9f - 1b0: 63 c8 2f 02 a0 = R5.L \* R7.H \(W32\) \|\| R4=B\[P5\] \(Z\) \|\| \[I0\+\+M0\]=R5; - 1b4: 2c 99 85 9f - 1b8: 03 c8 00 04 a0 = R0.H \* R0.L \|\| R5=B\[P0\]\(X\) \|\| \[I0\+\+M0\]=R6; - 1bc: 45 99 86 9f - 1c0: 83 c8 13 0a a0 \+= R2.L \* R3.H \(FU\) \|\| R5=B\[P1\] \(Z\) \|\| \[I0\+\+M0\]=R7; - 1c4: 0d 99 87 9f - 1c8: 03 c8 21 0c a0 \+= R4.H \* R1.L \|\| R5=B\[P2\] \(Z\) \|\| \[I1\+\+M1\]=R7; - 1cc: 15 99 af 9f - 1d0: 03 c9 3e 12 a0 -= R7.L \* R6.H \(IS\) \|\| R5=B\[P3\]\(X\) \|\| \[I1\+\+M1\]=R6; - 1d4: 5d 99 ae 9f - 1d8: 03 c8 2a 16 a0 -= R5.H \* R2.H \|\| R5=B\[P4\] \(Z\) \|\| \[I1\+\+M1\]=R5; - 1dc: 25 99 ad 9f - 1e0: 10 c8 08 58 a1 = R1.L \* R0.H \(M\) \|\| R5=B\[P5\]\(X\) \|\| \[I1\+\+M1\]=R4; - 1e4: 6d 99 ac 9f - 1e8: 00 c8 10 98 a1 = R2.H \* R0.L \|\| R5=B\[SP\] \(Z\) \|\| \[I1\+\+M1\]=R3; - 1ec: 35 99 ab 9f - 1f0: 70 c8 3e 98 a1 = R7.H \* R6.L \(M, W32\) \|\| R5=B\[FP\]\(X\) \|\| \[I1\+\+M1\]=R2; - 1f4: 7d 99 aa 9f - 1f8: 81 c8 1a 18 a1 \+= R3.L \* R2.L \(FU\) \|\| R0.L=W\[I0\] \|\| \[I1\+\+M1\]=R1; - 1fc: 20 9d a9 9f - 200: 01 c8 31 98 a1 \+= R6.H \* R1.L \|\| R1.L=W\[I0\] \|\| \[I1\+\+M1\]=R0; - 204: 21 9d a8 9f - 208: 02 c9 03 58 a1 -= R0.L \* R3.H \(IS\) \|\| R2.L=W\[I0\] \|\| \[I2\+\+M2\]=R0; - 20c: 22 9d d0 9f - 210: 02 c8 17 58 a1 -= R2.L \* R7.H \|\| R3.L=W\[I0\] \|\| \[I2\+\+M2\]=R1; - 214: 23 9d d1 9f - 218: 03 c8 f5 25 R7.L = \(a0 = R6.H \* R5.L\) \|\| R4.L=W\[I0\] \|\| \[I2\+\+M2\]=R2; - 21c: 24 9d d2 9f - 220: c3 c8 0a 24 R0.L = \(a0 = R1.H \* R2.L\) \(TFU\) \|\| R5.L=W\[I0\] \|\| \[I2\+\+M2\]=R3; - 224: 25 9d d3 9f - 228: 03 c8 ac 28 R2.L = \(a0 \+= R5.L \* R4.L\) \|\| R6.L=W\[I0\] \|\| \[I2\+\+M2\]=R4; - 22c: 26 9d d4 9f - 230: 43 c8 fe 2e R3.L = \(a0 \+= R7.H \* R6.H\) \(T\) \|\| R7.L=W\[I0\] \|\| \[I2\+\+M2\]=R5; - 234: 27 9d d5 9f - 238: 03 c8 1a 36 R0.L = \(a0 -= R3.H \* R2.H\) \|\| R7.L=W\[I1\+\+\] \|\| \[I2\+\+M2\]=R6; - 23c: 2f 9c d6 9f - 240: 63 c9 6c 30 R1.L = \(a0 -= R5.L \* R4.L\) \(IH\) \|\| R6.L=W\[I1\+\+\] \|\| \[I2\+\+M2\]=R7; - 244: 2e 9c d7 9f - 248: 04 c8 48 58 R1.H = \(a1 = R1.L \* R0.H\) \|\| R2.L=W\[I1\+\+\] \|\| \[I3\+\+M3\]=R7; - 24c: 2a 9c ff 9f - 250: 34 c9 83 98 R2.H = \(a1 = R0.H \* R3.L\) \(M, ISS2\) \|\| R3.L=W\[I1\+\+\] \|\| \[I3\+\+M3\]=R6; - 254: 2b 9c fe 9f - 258: 05 c8 bf 59 R6.H = \(a1 \+= R7.L \* R7.H\) \|\| R4.L=W\[I1\+\+\] \|\| \[I3\+\+M3\]=R5; - 25c: 2c 9c fd 9f - 260: 25 c8 d3 19 R7.H = \(a1 \+= R2.L \* R3.L\) \(S2RND\) \|\| R5.L=W\[I1\+\+\] \|\| \[I3\+\+M3\]=R4; - 264: 2d 9c fc 9f - 268: 06 c8 a2 d9 R6.H = \(a1 -= R4.H \* R2.H\) \|\| R6.L=W\[I1\+\+\] \|\| \[I3\+\+M3\]=R3; - 26c: 2e 9c fb 9f - 270: d6 c8 5f 99 R5.H = \(a1 -= R3.H \* R7.L\) \(M, TFU\) \|\| R7.L=W\[I1\+\+\] \|\| \[I3\+\+M3\]=R2; - 274: 2f 9c fa 9f - 278: 0b c8 0a 20 R0 = \(a0 = R1.L \* R2.L\) \|\| R1.L=W\[I2--\] \|\| \[I3\+\+M3\]=R1; - 27c: b1 9c f9 9f - 280: 0b c9 8a 20 R2 = \(a0 = R1.L \* R2.L\) \(IS\) \|\| R1.L=W\[I2--\] \|\| \[I3\+\+M3\]=R0; - 284: b1 9c f8 9f - 288: 0b c8 3e 2d R4 = \(a0 \+= R7.H \* R6.L\) \|\| R2.L=W\[I2--\] \|\| R0.H=W\[I0\]; - 28c: b2 9c 40 9d - 290: 2b c8 ab 2b R6 = \(a0 \+= R5.L \* R3.H\) \(S2RND\) \|\| R3.L=W\[I2--\] \|\| R1.H=W\[I1\]; - 294: b3 9c 49 9d - 298: 0b c8 97 35 R6 = \(a0 -= R2.H \* R7.L\) \|\| R4.L=W\[I2--\] \|\| R2.H=W\[I2\]; - 29c: b4 9c 52 9d - 2a0: 8b c8 06 33 R4 = \(a0 -= R0.L \* R6.H\) \(FU\) \|\| R5.L=W\[I2--\] \|\| R3.H=W\[I3\]; - 2a4: b5 9c 5b 9d - 2a8: 0c c8 81 99 R7 = \(a1 = R0.H \* R1.L\) \|\| R6.L=W\[I2--\] \|\| R4.H=W\[I3\]; - 2ac: b6 9c 5c 9d - 2b0: 9c c8 13 d9 R5 = \(a1 = R2.H \* R3.H\) \(M, FU\) \|\| R7.L=W\[I2--\] \|\| R4.H=W\[I2\]; - 2b4: b7 9c 54 9d - 2b8: 0d c8 bd 18 R3 = \(a1 \+= R7.L \* R5.L\) \|\| W\[P0\]=R0.L \|\| R6.H=W\[I1\]; - 2bc: 00 8a 4e 9d - 2c0: 2d c9 17 d8 R1 = \(a1 \+= R2.H \* R7.H\) \(ISS2\) \|\| W\[P0\]=R1.L \|\| R7.H=W\[I0\]; - 2c4: 40 8a 47 9d - 2c8: 0e c8 80 58 R3 = \(a1 -= R0.L \* R0.H\) \|\| W\[P0\]=R2.L \|\| R7.L=W\[I0\+\+\]; - 2cc: 80 8a 27 9c - 2d0: 1e c9 17 59 R5 = \(a1 -= R2.L \* R7.H\) \(M, IS\) \|\| W\[P0\]=R3.L \|\| R6.L=W\[I1\+\+\]; - 2d4: c0 8a 2e 9c - 2d8: 07 cc 10 ee R7=-R2\(S\) \|\| W\[P0\]=R4.L \|\| R5.L=W\[I2\+\+\]; - 2dc: 00 8b 35 9c - 2e0: 0e cc 00 00 A0=-A0 \|\| W\[P0\]=R5.L \|\| R4.L=W\[I3\+\+\]; - 2e4: 40 8b 3c 9c - 2e8: 0e cc 00 40 A0=-A1 \|\| W\[P0\]=R6.L \|\| R3.L=W\[I3--\]; - 2ec: 80 8b bb 9c - 2f0: 2e cc 00 00 A1=-A0 \|\| W\[P0\]=R7.L \|\| R2.L=W\[I1\+\+\]; - 2f4: c0 8b 2a 9c - 2f8: 2e cc 00 40 A1=-A1 \|\| W\[P1\]=R0 \|\| R1.L=W\[I2--\]; - 2fc: 08 97 b1 9c - 300: 0e cc 00 c0 A1=-A1,A0=-A0 \|\| W\[P1\]=R1 \|\| R0.L=W\[I1--\]; - 304: 09 97 a8 9c - 308: 0c cc 18 ca R5.L=R3\(RND\) \|\| W\[P1\]=R2 \|\| R0=\[I0\+\+M3\]; - 30c: 0a 97 e0 9d - 310: 2c cc 00 cc R6.H=R0\(RND\) \|\| W\[P1\]=R3 \|\| R1=\[I1\+\+M2\]; - 314: 0b 97 c9 9d - 318: 08 cc 00 20 A0=A0\(S\) \|\| W\[P1\]=R4 \|\| R2=\[I2\+\+M1\]; - 31c: 0c 97 b2 9d - 320: 08 cc 00 60 A1=A1\(S\) \|\| W\[P1\]=R5 \|\| R3=\[I3\+\+M0\]; - 324: 0d 97 9b 9d - 328: 08 cc 00 a0 A1=A1\(S\),A0=A0\(S\) \|\| R6=W\[P1\] \(Z\) \|\| \[I0\]=R0; - 32c: 0e 95 00 9f - 330: 05 ce 00 0a R5.L=SIGNBITS R0 \|\| R7=W\[P1\] \(Z\) \|\| \[I1\]=R0; - 334: 0f 95 08 9f - 338: 05 ce 07 80 R0.L=SIGNBITS R7.H \|\| R1=W\[P2\+\+\]\(X\) \|\| \[I2\]=R0; - 33c: 51 94 10 9f - 340: 06 ce 00 06 R3.L=SIGNBITS A0 \|\| R2=W\[P2\+\+\]\(X\) \|\| \[I3\]=R0; - 344: 52 94 18 9f - 348: 06 ce 00 4e R7.L=SIGNBITS A1 \|\| R3=W\[P2\+\+\] \(Z\) \|\| \[I0\]=R1; - 34c: 13 94 01 9f - 350: 03 cc 37 ea R5.L=R6.H-R7.H \(S\) \|\| R4=W\[P2\+\+\]\(X\) \|\| \[I1\]=R1; - 354: 54 94 09 9f - 358: 23 cc 1b 40 R0.H=R3.L-R3.H \(NS\) \|\| R5=W\[P2\+\+\]\(X\) \|\| \[I2\]=R2; - 35c: 55 94 12 9f - 360: 07 cc 10 84 R2= ABS R2 || R1=\[I0\+\+\] || NOP; - 364: 01 9c 00 00 - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/parallel.s b/binutils-2.17/gas/testsuite/gas/bfin/parallel.s deleted file mode 100644 index d5b10dd2..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/parallel.s +++ /dev/null @@ -1,141 +0,0 @@ - .section .text;
- R5 = Deposit (r3, r2) || I0 += 2;
- r0 = DEPOSIT (r7, R6) (X) || I1 += 4;
- r4 = extract (r2, r1.L) (z) || I2 -= M0;
- R2 = EXTRACT (r0, r2.l) (Z) || i3 += m1;
-
- r7 = ExtracT (r3, r4.L) (X) || I3 += M1 (breV);
- r5 = ExtRACt (R6, R1.L) (x) || i0 -= 2;
-
- BITMUX(R1, R0, A0) (ASR) || I1 -= 4;
- Bitmux (r2, R3, a0) (aSr) || I0 += 2;
-
- bitmux (r4, r5, a0) (asl) || Sp = [P0];
- BiTMux (R7, r6, a0) (ASl) || FP = [P1++];
-
- R5.l = ones r0 || P0 = [fp--];
- r7.L = Ones R2 || p1 = [P5 + 24];
-
- a0 = abs a0 || p2 = [Sp+60] || r0 = [i0];
- A0 = ABS A1 || P3 = [FP-60] || R1 = [I1++M0];
- A1 = Abs a0 || P4 = [fp-4] || r2 = [i1++];
- a1 = aBs A1 || fp = [sp] || r3 = [I2--];
- A1 = abs a1, a0 = ABS A0 || R4=[p5+56] || r0.h = w [I0];
- r0 = abs r2 || B[sp] = r0 || R1.H = W[I1++];
-
- r4.L = R2.h + r0.L (s) || b [fp] = r0 || r2.H = w [i2--];
- r5.H = R1.H + R1.L (S) || b [p0] = r0 || R3.l = W[I3];
- r6.L = R6.L + r5.l (NS) || b [p1] = r0 || r4.L =w [i3++];
-
- r4.l = r0 + r1 (RND20) || b [p2] = r0 || R5.l = W [i2--];
- R3.H = r5 + r0 (rnd20) || r0 = b [p0] (x) || [i0] = R6;
- r1.L = r7 - R5 (rND20) || r0 = b [p4] (z) || [I1++] = R7;
-
- r2.L = R0 + R1 (rnd12) || r1 = b [sp] (x) || [I2--]= r7;
- r7.H = r7 + r6 (RND12) || r1 = b [p0] (x)|| [I3++m1]=r6;
- r5.l = r3 - R2 (rNd12) || r1 = b [p1] (z) || W [ i3 ] = r5.h;
- r2.h = R1 - R2 (Rnd12) || r1 = b [p2] (z) || w [I2++] = R4.H;
-
-
- r6.L = EXPADJ (r5, r4.l) || r1 = b [p3] (z) || W[I1--]=r3.h;
- R5.l = ExpAdj (r0.h, r1.l) || r1 = b [p4] (z) || w[i0]=r2.l;
- R4.L = expadj (R3, R5.L) (V) || r1 = b [p5] (z) || W [I0++] = R1.L;
-
- R6 = MAX (r5, R2) || r2 = b [p0] (x) || W[i1--]=R0.l;
- r0 = max (r1, r3) || b [p1] = r2 || NoP;
-
- r5 = mIn (r2, R3) || b [p2] = r2 || r0 = [i1++];
- R4 = Min (r7, R0) || b [p3] = r2 || r1 = [i1++];
-
-
- A0 -= A1 || b [p4] = r2 || r2 = [i1++];
- a0 -= a1 (w32) || b [p5] = r2 || r3 = [i1++];
-
- a0 += a1 || b [sp] = r2 || r4 = [i1++];
- A0 += A1 (w32) || b [fp] = r2 || r5 = [i1++];
- r7 = ( a0 += a1) || b [sp] = r3 || r6 = [i1++];
- r6.l = (A0 += a1) || b [fp] = r3 || r7 = [i1++];
- R0.H = (a0 += A1) || b [p0] = r3 || r7 = [i0++];
-
-
- R0.l = r1.h * r2.l || b [p1] = r3 || r1 = [i0++];
- r1.L = r5.H * r0.H (s2rnd) || b [p2] = r3 || r2 = [i0++];
- r7.l = r3.l * r3.H (FU) || b [p3] = r3 || r3 = [i0++];
- r4 = r2.H * r5.H (iSS2) || b [p4] = r3 || r0 = [i0++];
- r0 = r1.l * r3.l (is) || b [p5] = r3 || r5 = [i0++];
- r6 = R5.H * r0.l || b [fp] = r4 || r7 = [i0++];
-
- r2.h = r7.l * r6.H (M, iu) || b [sp] = r4 || r6 = [i0++];
- r3.H = r5.H * r0.L || r4 = b [p0] (x) || [I0++M0] = R0;
- R0.H = r1.L * r1.H (M) || r4 = b [p1] (x) || [i0++M0] = R1;
- r1 = r7.H * r6.L (M, is) || r4 = b [p2] (x) || [i0++M0] = R2;
- R5 = r0.l * r2.h || r4 = b [p3] (x) || [i0++m0] = R3;
- r3 = r6.H * r0.H (m) || r4 = b [p4] (z) || [i0++m0] = R4;
-
- a0 = r5.l * R7.H (w32) || r4 = b [p5] (z) || [i0++m0] = R5;
- a0 = r0.h * r0.l || r5 = b [p0] (x) || [i0++M0] =R6;
- A0 += R2.L * r3.H (FU) || r5 = b [p1] (z) || [i0++M0]=R7;
- A0 += r4.h * r1.L || r5 = b [p2] (z) || [I1++M1] = R7;
- a0 -= r7.l * r6.H (Is) || r5 = b [p3] (x) || [i1++m1] = r6;
- A0 -= R5.H * r2.H || r5 = b [p4] (z) || [i1++m1]=r5;
-
- a1 = r1.L * r0.H (M) || r5 = b [p5] (x) || [i1++m1]=r4;
- A1 = r2.h * r0.L || r5 = b [sp] (z) || [i1++m1] = r3;
- A1 = R7.H * R6.L (M, W32) || r5 = b [fp] (x) || [i1++m1] =r2;
-
- a1 += r3.l * r2.l (fu) || r0.l = w [i0] || [i1++m1] = r1;
- a1 += R6.H * r1.L || r1.l = w [i0] || [i1++m1] = R0;
- A1 -= r0.L * R3.H (is) || r2.l = w [i0] || [i2++m2] = R0;
- a1 -= r2.l * r7.h || r3.l = w [i0] || [I2++M2] =R1;
-
- r7.l = (a0 = r6.H * r5.L) || r4.l = w [i0] || [i2++m2] = r2;
- r0.L = (A0 = r1.h * R2.l) (tfu) || r5.l = w [i0] || [I2++m2] = R3;
- R2.L = (a0 += r5.L * r4.L) || r6.l = w [i0] || [I2++m2] = R4;
- r3.l = (A0 += r7.H * r6.h) (T) || r7.l = w [i0] || [ i2 ++ m2] = R5;
- r0.l = (a0 -= r3.h * r2.h) || r7.l = w [i1++] || [i2++m2] = r6;
- r1.l = (a0 -= r5.L * r4.L) (iH) || r6.l = w [i1++] || [i2++m2] = R7;
-
- r1.H = (a1 = r1.l * R0.H) || r2.l = w [i1++] || [i3++m3] = R7;
- r2.h = (A1 = r0.H * r3.L) (M, Iss2) || r3.l = w [i1++] || [i3++m3] = r6;
- R6.H = (a1 += r7.l * r7.H) || r4.l = w [i1++] || [i3++m3] = R5;
- r7.h = (a1 += R2.L * R3.L) (S2rnd) || r5.l = w [i1++] || [i3++m3] = r4;
- r6.H = (A1 -= R4.h * r2.h) || r6.l = w [i1++] || [i3++m3] = r3;
- r5.h = (a1 -= r3.H * r7.L) (M, tFu) || r7.l = w [i1++] || [i3++m3] = r2;
-
- R0 = (A0 = R1.L * R2.L) || R1.L = W [I2--] || [i3++m3] = r1;
- R2 = (A0 = r1.l * r2.l) (is) || R1.L = W [I2--] || [i3++m3] = r0;
- r4 = (a0 += r7.h * r6.L) || R2.L = W [I2--] || r0.h = w[i0];
- r6 = (A0 += R5.L * r3.h) (s2RND) || R3.L = W [I2--] || R1.H = w[i1];
- R6 = (a0 -= r2.h * r7.l) || R4.L = W [I2--] || r2.h = w[i2];
- r4 = (A0 -= R0.L * r6.H) (FU) || R5.L = W [I2--] || r3.h = w[i3];
-
- r7 = (a1 = r0.h * r1.l) || R6.L = W [I2--] || r4.h = w[i3];
- R5 = (A1 = r2.H * r3.H) (M, fu) || R7.L = W [I2--] || r4.h = W[i2];
- R3 = (A1 += r7.l * r5.l) || w [p0] = r0.L || r6.h = W[i1];
- r1 = (a1 += r2.h * r7.h) (iss2) || w [p0] = r1.L || r7.h = w[i0];
- r3 = (A1 -= r0.l * R0.H) || w [p0] = r2.L || r7.L = w[I0++];
- R5 = (a1 -= R2.l * R7.h) (m, is) || w [p0] = r3.L || R6.L = W [i1++];
-
- r7 = -R2(s) || w [p0] = r4.L || r5.l = w[i2++];
- A0 = -A0 || w [p0] = r5.L || r4.l = w[i3++];
- a0 = -a1 || w [p0] = r6.L || r3.L = w [i3--];
- A1 = -A0 || w [p0] = r7.L || r2.l = W [i1++];
- a1 = -A1 || w [p1] = r0 || r1.L = w [i2--];
- a1 = -a1, a0 = -a0 || w [p1] = r1 || r0.l = w [i1--];
-
- R5.L = r3 (rnd) || w [p1] = r2 || r0 = [i0++m3];
- r6.H = r0 (RND) || w [p1] = r3 || r1 = [i1++m2];
-
- A0 = A0 (S) || w [p1] = r4 || r2 = [i2++m1];
- a1 = a1 (s) || w [p1] = r5 || r3 = [i3++m0];
- A1 = a1 (S), a0 = A0 (s) || r6 = w [p1] (z) || [i0] = r0;
-
- R5.l = signbits r0 || r7 = w [p1] (z) || [i1] = R0;
- r0.L = SIGNbits r7.H || r1 = w [p2++](x) || [I2] = r0;
- r3.l = signBits A0 || r2 = w [p2++] (x) || [I3] = R0;
- r7.L = SIGNBITS a1 || r3 = w [p2++] (z) || [i0] = R1;
-
- r5.l = R6.H - R7.h (s) || r4 = w [p2++] (x) || [i1] = r1;
- r0.H = r3.l - r3.h (NS) || r5 = w [p2++] (x) || [i2] = r2;
-
- R1 = [I0++] || R2 = ABS R2 || NOP;
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/parallel2.d b/binutils-2.17/gas/testsuite/gas/bfin/parallel2.d deleted file mode 100644 index cd508019..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/parallel2.d +++ /dev/null @@ -1,147 +0,0 @@ -#objdump: -d -#name: parallel2 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 08 cc 00 c0 A0=A1 \|\| P0=\[SP\+0x14\] \|\| NOP; - 4: 70 ad 00 00 - 8: 08 cc 00 e0 A1=A0 \|\| P0=\[P5\+0x18\] \|\| NOP; - c: a8 ad 00 00 - 10: 09 cc 00 20 A0=R0 \|\| P0=\[P4\+0x1c\] \|\| NOP; - 14: e0 ad 00 00 - 18: 09 cc 08 a0 A1=R1 \|\| P0=\[P3\+0x20\] \|\| NOP; - 1c: 18 ae 00 00 - 20: 8b c8 00 39 R4 = A0 \(FU\) \|\| P0=\[P3\+0x24\] \|\| NOP; - 24: 58 ae 00 00 - 28: 2f c9 00 19 R5 = A1 \(ISS2\) \|\| P0=\[P3\+0x28\] \|\| NOP; - 2c: 98 ae 00 00 - 30: 0b c8 80 39 R6 = A0 \|\| P0=\[P4\+0x2c\] \|\| NOP; - 34: e0 ae 00 00 - 38: 0f c8 80 19 R7 = A1 \|\| P0=\[P4\+0x30\] \|\| NOP; - 3c: 20 af 00 00 - 40: 0f c8 80 39 R7 = A1, R6 = A0 \|\| P0=\[P4\+0x34\] \|\| NOP; - 44: 60 af 00 00 - 48: 8f c8 00 38 R1 = A1, R0 = A0 \(FU\) \|\| P0=\[P4\+0x38\] \|\| NOP; - 4c: a0 af 00 00 - 50: 09 cc 28 40 A0.x=R5.L \|\| P0=\[P4\+0x3c\] \|\| NOP; - 54: e0 af 00 00 - 58: 09 cc 10 c0 A1.x=R2.L \|\| R0=\[I0\+\+M0\] \|\| NOP; - 5c: 80 9d 00 00 - 60: 0a cc 00 00 R0.L=A0.x \|\| R1=\[I0\+\+M1\] \|\| NOP; - 64: a1 9d 00 00 - 68: 0a cc 00 4e R7.L=A1.x \|\| R0=\[I0\+\+M2\] \|\| NOP; - 6c: c0 9d 00 00 - 70: 09 cc 18 00 A0.L=R3.L \|\| R0=\[I0\+\+M3\] \|\| NOP; - 74: e0 9d 00 00 - 78: 09 cc 20 80 A1.L=R4.L \|\| R0=\[I1\+\+M3\] \|\| NOP; - 7c: e8 9d 00 00 - 80: 29 cc 30 00 A0.H=R6.H \|\| R0=\[I1\+\+M2\] \|\| NOP; - 84: c8 9d 00 00 - 88: 29 cc 28 80 A1.H=R5.H \|\| R0=\[I1\+\+M1\] \|\| NOP; - 8c: a8 9d 00 00 - 90: 83 c9 00 38 R0.L = A0 \(IU\) \|\| R4=\[I1\+\+M0\] \|\| NOP; - 94: 8c 9d 00 00 - 98: 27 c8 40 18 R1.H = A1 \(S2RND\) \|\| R0=\[I2\+\+M0\] \|\| NOP; - 9c: 90 9d 00 00 - a0: 07 c8 40 18 R1.H = A1 \|\| R0=\[I2\+\+M1\] \|\| NOP; - a4: b0 9d 00 00 - a8: 67 c9 80 38 R2.H = A1, R2.L = A0 \(IH\) \|\| R0=\[I2\+\+M2\] \|\| NOP; - ac: d0 9d 00 00 - b0: 07 c8 80 38 R2.H = A1, R2.L = A0 \|\| R0=\[I2\+\+M3\] \|\| NOP; - b4: f0 9d 00 00 - b8: 47 c8 00 38 R0.H = A1, R0.L = A0 \(T\) \|\| R5=\[I3\+\+M0\] \|\| NOP; - bc: 9d 9d 00 00 - c0: 87 c8 00 38 R0.H = A1, R0.L = A0 \(FU\) \|\| R5=\[I3\+\+M1\] \|\| NOP; - c4: bd 9d 00 00 - c8: 07 c9 00 38 R0.H = A1, R0.L = A0 \(IS\) \|\| R5=\[I3\+\+M2\] \|\| NOP; - cc: dd 9d 00 00 - d0: 07 c8 00 38 R0.H = A1, R0.L = A0 \|\| R5=\[I3\+\+M3\] \|\| NOP; - d4: fd 9d 00 00 - d8: 83 ce 08 41 A0=A0>>0x1f \|\| R0=\[FP-32\] \|\| NOP; - dc: 80 b9 00 00 - e0: 83 ce f8 00 A0=A0<<0x1f \|\| R0=\[FP-28\] \|\| NOP; - e4: 90 b9 00 00 - e8: 83 ce 00 50 A1=A1>>0x0 \|\| R0=\[FP-24\] \|\| NOP; - ec: a0 b9 00 00 - f0: 83 ce 00 10 A1=A1<<0x0 \|\| R0=\[FP-20\] \|\| NOP; - f4: b0 b9 00 00 - f8: 82 ce fd 4e R7=R5<<0x1f\(S\) \|\| R0=\[FP-16\] \|\| NOP; - fc: c0 b9 00 00 - 100: 82 ce 52 07 R3=R2>>>0x16 \|\| R0=\[FP-12\] \|\| NOP; - 104: d0 b9 00 00 - 108: 80 ce 7a 52 R1.L = R2.H << 0xf \(S\) \|\| R0=\[FP-8\] \|\| NOP; - 10c: e0 b9 00 00 - 110: 80 ce f2 2b R5.H = R2.L >>> 0x2 \|\| R0=\[FP-4\] \|\| NOP; - 114: f0 b9 00 00 - 118: 00 ce 14 16 R3.L= ASHIFT R4.H BY R2.L \|\| R0=\[FP-100\] \|\| NOP; - 11c: 70 b8 00 00 - 120: 00 ce 07 6e R7.H= ASHIFT R7.L BY R0.L\(S\) \|\| R0=\[FP-104\] \|\| NOP; - 124: 60 b8 00 00 - 128: 00 ce 07 6e R7.H= ASHIFT R7.L BY R0.L\(S\) \|\| R0=\[FP-108\] \|\| NOP; - 12c: 50 b8 00 00 - 130: 02 ce 15 0c R6= ASHIFT R5 BY R2.L \|\| R0=\[FP-112\] \|\| NOP; - 134: 40 b8 00 00 - 138: 02 ce 0c 40 R0= ASHIFT R4 BY R1.L\(S\) \|\| R3=\[FP-116\] \|\| NOP; - 13c: 33 b8 00 00 - 140: 02 ce 1e 44 R2= ASHIFT R6 BY R3.L\(S\) \|\| R0=\[FP-120\] \|\| NOP; - 144: 20 b8 00 00 - 148: 03 ce 08 00 A0= ASHIFT A0 BY R1.L \|\| R0=\[FP-124\] \|\| NOP; - 14c: 10 b8 00 00 - 150: 03 ce 00 10 A1= ASHIFT A1 BY R0.L \|\| R0=\[FP-128\] \|\| NOP; - 154: 00 b8 00 00 - 158: 80 ce 8a a3 R1.H = R2.L >> 0xf \|\| R5=W\[P1--\] \(Z\) \|\| NOP; - 15c: 8d 94 00 00 - 160: 80 ce 00 8e R7.L = R0.L << 0x0 \|\| R5=W\[P2\] \(Z\) \|\| NOP; - 164: 15 95 00 00 - 168: 82 ce 0d 8b R5=R5>>0x1f \|\| R7=W\[P2\+\+\] \(Z\) \|\| NOP; - 16c: 17 94 00 00 - 170: 82 ce 60 80 R0=R0<<0xc \|\| R5=W\[P2--\] \(Z\) \|\| NOP; - 174: 95 94 00 00 - 178: 83 ce f8 41 A0=A0>>0x1 \|\| R5=W\[P2\+0x0\] \(Z\) \|\| NOP; - 17c: 15 a4 00 00 - 180: 83 ce 00 00 A0=A0<<0x0 \|\| R5=W\[P2\+0x2\] \(Z\) \|\| NOP; - 184: 55 a4 00 00 - 188: 83 ce f8 10 A1=A1<<0x1f \|\| R5=W\[P2\+0x4\] \(Z\) \|\| NOP; - 18c: 95 a4 00 00 - 190: 83 ce 80 51 A1=A1>>0x10 \|\| R5=W\[P2\+0x1e\] \(Z\) \|\| NOP; - 194: d5 a7 00 00 - 198: 00 ce 02 b2 R1.H= LSHIFT R2.H BY R0.L \|\| R5=W\[P2\+0x18\] \(Z\) \|\| NOP; - 19c: 15 a7 00 00 - 1a0: 00 ce 08 90 R0.L= LSHIFT R0.H BY R1.L \|\| R5=W\[P2\+0x16\] \(Z\) \|\| NOP; - 1a4: d5 a6 00 00 - 1a8: 00 ce 16 8e R7.L= LSHIFT R6.L BY R2.L \|\| R5=W\[P2\+0x14\] \(Z\) \|\| NOP; - 1ac: 95 a6 00 00 - 1b0: 02 ce 1c 8a R5=SHIFT R4 BY R3.L \|\| R4=W\[P2\+0x12\] \(Z\) \|\| NOP; - 1b4: 54 a6 00 00 - 1b8: 03 ce 30 40 A0= LSHIFT A0 BY R6.L \|\| R5=W\[P2\+0x10\] \(Z\) \|\| NOP; - 1bc: 15 a6 00 00 - 1c0: 03 ce 28 50 A1= LSHIFT A1 BY R5.L \|\| R5=W\[P2\+0xe\] \(Z\) \|\| NOP; - 1c4: d5 a5 00 00 - 1c8: 82 ce 07 cf R7= ROT R7 BY -32 \|\| R5=W\[P2\+0xc\] \(Z\) \|\| NOP; - 1cc: 95 a5 00 00 - 1d0: 82 ce 0f cd R6= ROT R7 BY -31 \|\| R5=W\[P2\+0xa\] \(Z\) \|\| NOP; - 1d4: 55 a5 00 00 - 1d8: 82 ce ff ca R5= ROT R7 BY 0x1f \|\| R6=W\[P2\+0x8\] \(Z\) \|\| NOP; - 1dc: 16 a5 00 00 - 1e0: 82 ce f7 c8 R4= ROT R7 BY 0x1e \|\| R5=W\[P2\+0x6\] \(Z\) \|\| NOP; - 1e4: d5 a4 00 00 - 1e8: 83 ce 00 80 A0= ROT A0 BY 0x0 \|\| R5=W\[P3\] \(Z\) \|\| NOP; - 1ec: 1d 95 00 00 - 1f0: 83 ce 50 80 A0= ROT A0 BY 0xa \|\| R5=W\[P3\+\+\] \(Z\) \|\| NOP; - 1f4: 1d 94 00 00 - 1f8: 83 ce 60 91 A1= ROT A1 BY -20 \|\| R5=W\[P3--\] \(Z\) \|\| NOP; - 1fc: 9d 94 00 00 - 200: 83 ce 00 91 A1= ROT A1 BY -32 \|\| R5=W\[P4\] \(Z\) \|\| NOP; - 204: 25 95 00 00 - 208: 02 ce 11 c0 R0= ROT R1 BY R2.L \|\| R5=W\[P4\+\+\] \(Z\) \|\| NOP; - 20c: 25 94 00 00 - 210: 02 ce 1c c0 R0= ROT R4 BY R3.L \|\| R5=W\[P4--\] \(Z\) \|\| NOP; - 214: a5 94 00 00 - 218: 03 ce 38 80 A0= ROT A0 BY R7.L \|\| R5=W\[P5\] \(Z\) \|\| NOP; - 21c: 2d 95 00 00 - 220: 03 ce 30 90 A1= ROT A1 BY R6.L \|\| R5=W\[P5\+\+\] \(Z\) \|\| NOP; - 224: 2d 94 00 00 - 228: 03 c8 00 18 mnop \|\| R5=W\[P5--\] \(Z\) \|\| NOP; - 22c: ad 94 00 00 diff --git a/binutils-2.17/gas/testsuite/gas/bfin/parallel2.s b/binutils-2.17/gas/testsuite/gas/bfin/parallel2.s deleted file mode 100644 index 064e98fb..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/parallel2.s +++ /dev/null @@ -1,80 +0,0 @@ - .section .text;
- A0 = A1 || P0 = [sp+20];
- a1 = a0 || P0 = [p5+24];
- a0 = R0 || P0 = [P4+28];
- A1 = r1 || P0 = [P3+32];
-
- R4 = A0 (fu) || P0 = [p3+36];
- r5 = A1 (ISS2) || P0 = [P3+40];
- R6 = a0 || P0 = [P4+44];
- R7 = A1 || P0 = [P4+48];
- R6 = A0, R7 = a1 || P0 = [P4+52];
- r1 = a1, r0 = a0 (fu) || P0 = [P4+56];
-
- A0.X = r5.l || p0 = [p4+60];
- a1.X = r2.L || r0 = [i0 ++ m0];
- r0.l = a0.x || r1 = [i0 ++ m1];
- R7.l = A1.X || r0 = [i0 ++ m2];
- A0.L = r3.l || r0 = [i0 ++ m3];
- a1.l = r4.l || r0 = [i1 ++ m3];
- A0.h = r6.H || r0 = [i1 ++ m2];
- A1.H = r5.h || r0 = [i1 ++ m1];
- r0.l = A0 (iu) || r4 = [i1 ++ m0];
- R1.H = A1 (s2rnd) || r0 = [i2 ++ m0];
- r1.h = a1 || r0 = [i2 ++ m1];
- R2.l = A0, r2.H = A1 (IH) || r0 = [i2 ++ m2];
- R2.l = A0, r2.H = A1 || r0 = [i2 ++ m3];
- r0.H = A1, R0.L = a0 (t) || r5 = [i3 ++ m0];
- r0.H = A1, R0.L = a0 (fu) || r5 = [i3 ++ m1];
- r0.H = A1, R0.L = a0 (is) || r5 = [i3 ++ m2];
- r0.H = A1, R0.L = a0 || r5 = [i3 ++ m3];
-
- A0 = A0 >> 31 || r0 = [fp - 32];
- a0 = a0 << 31 || r0 = [fp - 28];
- a1 = a1 >> 0 || r0 = [fp - 24];
- A1 = A1 << 0 || r0 = [fp - 20];
- r7 = r5 << 31 (s) || r0 = [fp - 16];
- R3 = r2 >>> 22 || r0 = [fp - 12];
- r1.L = R2.H << 15 (S) || r0 = [fp - 8];
- r5.h = r2.l >>> 2 || r0 = [fp - 4];
-
- r3.l = Ashift r4.h by r2.l || r0 = [fp - 100];
- R7.H = ASHIFT R7.L by R0.L (S) || r0 = [fp - 104];
- r7.h = ashift r7.l by r0.l (s) || r0 = [fp - 108];
- r6 = AShiFT R5 by R2.L || r0 = [fp - 112];
- R0 = Ashift R4 by r1.l (s) || r3 = [fp - 116];
- r2 = ashift r6 BY r3.L (S) || r0 = [fp - 120];
- A0 = Ashift a0 by r1.l || r0 = [fp - 124];
- a1 = ASHIFT a1 by r0.L || r0 = [fp - 128];
-
- r1.H = r2.l >> 15 || R5 = W [P1--] (z);
- r7.l = r0.L << 0 || R5 = W [P2] (z);
- r5 = r5 >> 31 || R7 = W [P2++] (z);
- r0 = r0 << 12 || R5 = W [P2--] (z);
- A0 = A0 >> 1 || R5 = W [P2+0] (z);
- A0 = A0 << 0 || R5 = W [P2+2] (z);
- a1 = A1 << 31 || R5 = W [P2+4] (z);
- a1 = a1 >> 16 || R5 = W [P2+30] (z);
-
- R1.H = LShift r2.h by r0.l || R5 = W [P2+24] (z);
- r0.l = LSHIFT r0.h by r1.l || R5 = W [P2+22] (z);
- r7.L = lshift r6.L BY r2.l || R5 = W [P2+20] (z);
- r5 = LShIft R4 bY r3.L || R4 = W [P2+18] (z);
- A0 = Lshift a0 By R6.L || R5 = W [P2+16] (z);
- A1 = LsHIFt a1 by r5.l || R5 = W [P2+14] (z);
-
- r7 = ROT r7 by -32 || R5 = W [P2+12] (z);
- R6 = Rot r7 by -31 || R5 = W [P2+10] (z);
- R5 = RoT R7 by 31 || R6 = W [P2+8] (z);
- R4 = Rot r7 by 30 || R5 = W [P2+6] (z);
- a0 = rot A0 by 0 || R5 = W [P3] (z);
- A0 = ROT a0 BY 10 || R5 = W [P3++] (z);
- A1 = ROT A1 by -20 || R5 = W [P3--] (z);
- A1 = ROT a1 By -32 || R5 = W [P4] (z);
-
- r0 = rot r1 by r2.L || R5 = W [P4++] (z);
- R0 = Rot R4 BY R3.L || R5 = W [P4--] (z);
- A0 = ROT A0 by r7.l || R5 = W [P5] (z);
- A1 = rot a1 bY r6.l || R5 = W [P5++] (z);
-
- NOp || R5 = W [P5--] (z);
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/parallel3.d b/binutils-2.17/gas/testsuite/gas/bfin/parallel3.d deleted file mode 100644 index afada020..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/parallel3.d +++ /dev/null @@ -1,159 +0,0 @@ -#objdump: -d -#name: parallel3 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 0c cc 0d 08 R4.H=R4.L=SIGN\(R1.H\)\*R5.H\+SIGN\(R1.L\)\*R5.L\) \|\| \[P0\]=P0 \|\| NOP; - 4: 40 93 00 00 - 8: 09 ce 15 8e R7=VIT_MAX\(R5,R2\)\(ASL\) \|\| \[P0\+\+\]=P0 \|\| NOP; - c: 40 92 00 00 - 10: 09 ce 30 c0 R0=VIT_MAX\(R0,R6\)\(ASR\) \|\| \[P0--\]=P0 \|\| NOP; - 14: c0 92 00 00 - 18: 09 ce 03 0a R5.L=VIT_MAX \(R3\) \(ASL\) \|\| \[P0\+0x4\]=P0 \|\| NOP; - 1c: 40 bc 00 00 - 20: 09 ce 02 44 R2.L=VIT_MAX \(R2\) \(ASR\) \|\| \[P0\+0x8\]=P0 \|\| NOP; - 24: 80 bc 00 00 - 28: 06 cc 28 8a R5= ABS R5\(V\) \|\| \[P0\+0x3c\]=P0 \|\| NOP; - 2c: c0 bf 00 00 - 30: 06 cc 00 84 R2= ABS R0\(V\) \|\| \[P0\+0x38\]=P0 \|\| NOP; - 34: 80 bf 00 00 - 38: 00 cc 1a 0a R5=R3\+\|\+R2 \|\| \[P0\+0x34\]=P0 \|\| NOP; - 3c: 40 bf 00 00 - 40: 00 cc 1a 3a R5=R3\+\|\+R2 \(SCO\) \|\| \[P1\]=P0 \|\| NOP; - 44: 48 93 00 00 - 48: 00 cc 06 8e R7=R0-\|\+R6 \|\| \[P1\+\+\]=P0 \|\| NOP; - 4c: 48 92 00 00 - 50: 00 cc 0b a4 R2=R1-\|\+R3 \(S\) \|\| \[P1--\]=P0 \|\| NOP; - 54: c8 92 00 00 - 58: 00 cc 02 48 R4=R0\+\|-R2 \|\| \[P1\+0x30\]=P0 \|\| NOP; - 5c: 08 bf 00 00 - 60: 00 cc 0a 5a R5=R1\+\|-R2 \(CO\) \|\| \[P1\+0x2c\]=P0 \|\| NOP; - 64: c8 be 00 00 - 68: 00 cc 1c cc R6=R3-\|-R4 \|\| \[P1\+0x28\]=P0 \|\| NOP; - 6c: 88 be 00 00 - 70: 00 cc 2e de R7=R5-\|-R6 \(CO\) \|\| \[P2\]=P0 \|\| NOP; - 74: 50 93 00 00 - 78: 01 cc 63 bf R5=R4\+\|\+R3,R7=R4-\|-R3\(SCO,ASR\) \|\| \[P2\+\+\]=P0 \|\| NOP; - 7c: 50 92 00 00 - 80: 01 cc 1e c2 R0=R3\+\|\+R6,R1=R3-\|-R6\(ASL\) \|\| \[P2--\]=P0 \|\| NOP; - 84: d0 92 00 00 - 88: 21 cc ca 2d R7=R1\+\|-R2,R6=R1-\|\+R2\(S\) \|\| \[P2\+0x24\]=P0 \|\| NOP; - 8c: 50 be 00 00 - 90: 21 cc 53 0a R1=R2\+\|-R3,R5=R2-\|\+R3 \|\| \[P2\+0x20\]=P0 \|\| NOP; - 94: 10 be 00 00 - 98: 04 cc 41 8d R5=R0\+R1,R6=R0-R1 \(NS\) \|\| \[P3\]=P0 \|\| NOP; - 9c: 58 93 00 00 - a0: 04 cc 39 a6 R0=R7\+R1,R3=R7-R1 \(S\) \|\| \[P3\+\+\]=P0 \|\| NOP; - a4: 58 92 00 00 - a8: 11 cc c0 0b R7=A1\+A0,R5=A1-A0 \(NS\) \|\| \[P3--\]=P0 \|\| NOP; - ac: d8 92 00 00 - b0: 11 cc c0 6c R3=A0\+A1,R6=A0-A1 \(S\) \|\| \[P3\+0x1c\]=P0 \|\| NOP; - b4: d8 bd 00 00 - b8: 81 ce 8b 03 R1=R3>>>0xf \(V\) \|\| \[P3\+0x18\]=P0 \|\| NOP; - bc: 98 bd 00 00 - c0: 81 ce e0 09 R4=R0>>>0x4 \(V\) \|\| \[P4\]=P0 \|\| NOP; - c4: 60 93 00 00 - c8: 81 ce 00 4a R5=R0<<0x0 \(V, S\) \|\| \[P4\+\+\]=P0 \|\| NOP; - cc: 60 92 00 00 - d0: 81 ce 62 44 R2=R2<<0xc \(V, S\) \|\| \[P4--\]=P0 \|\| NOP; - d4: e0 92 00 00 - d8: 01 ce 15 0e R7= ASHIFT R5 BY R2.L\(V\) \|\| \[P4\+0x18\]=P0 \|\| NOP; - dc: a0 bd 00 00 - e0: 01 ce 02 40 R0= ASHIFT R2 BY R0.L\(V,S\) \|\| \[P4\+0x14\]=P0 \|\| NOP; - e4: 60 bd 00 00 - e8: 81 ce 8a 8b R5=R2 >> 0xf \(V\) \|\| \[P4\+0x10\]=P0 \|\| NOP; - ec: 20 bd 00 00 - f0: 81 ce 11 80 R0=R1<<0x2 \(V\) \|\| \[P4\+0xc\]=P0 \|\| NOP; - f4: e0 bc 00 00 - f8: 01 ce 11 88 R4=SHIFT R1 BY R2.L\(V\) \|\| \[P5\]=P0 \|\| NOP; - fc: 68 93 00 00 - 100: 06 cc 01 0c R6=MAX\(R0,R1\)\(V\) \|\| \[P5\+\+\]=P0 \|\| NOP; - 104: 68 92 00 00 - 108: 06 cc 17 40 R0=MIN\(R2,R7\)\(V\) \|\| \[P5--\]=P0 \|\| NOP; - 10c: e8 92 00 00 - 110: 04 ca be 66 R2.H = R7.L \* R6.H, R2 = R7.H \* R6.H \|\| \[P5\+0x8\]=P0 \|\| NOP; - 114: a8 bc 00 00 - 118: 04 ca 08 e1 R4.H = R1.H \* R0.H, R4 = R1.L \* R0.L \|\| \[P5\+0x4\]=P0 \|\| NOP; - 11c: 68 bc 00 00 - 120: 04 ca 1a a0 R0.H = R3.H \* R2.L, R0 = R3.L \* R2.L \|\| \[P5\]=P0 \|\| NOP; - 124: 68 93 00 00 - 128: 94 ca 5a e1 R5.H = R3.H \* R2.H \(M\), R5 = R3.L \* R2.L \(FU\) \|\| \[SP\]=P0 \|\| NOP; - 12c: 70 93 00 00 - 130: 2c ca 27 e0 R1 = R4.H \* R7.H, R0 = R4.L \* R7.L \(S2RND\) \|\| \[SP\+\+\]=P0 \|\| NOP; - 134: 70 92 00 00 - 138: 0c ca 95 27 R7 = R2.L \* R5.L, R6 = R2.H \* R5.H \|\| \[SP--\]=P0 \|\| NOP; - 13c: f0 92 00 00 - 140: 24 cb 3e e0 R0.H = R7.H \* R6.H, R0 = R7.L \* R6.L \(ISS2\) \|\| \[SP\+0x3c\]=P0 \|\| NOP; - 144: f0 bf 00 00 - 148: 04 cb c1 e0 R3.H = R0.H \* R1.H, R3 = R0.L \* R1.L \(IS\) \|\| \[FP\]=P0 \|\| NOP; - 14c: 78 93 00 00 - 150: 00 c8 13 46 a1 = R2.L \* R3.H, a0 = R2.H \* R3.H \|\| \[FP\+\+\]=P0 \|\| NOP; - 154: 78 92 00 00 - 158: 01 c8 08 c0 a1 \+= R1.H \* R0.H, a0 = R1.L \* R0.L \|\| \[FP--\]=P0 \|\| NOP; - 15c: f8 92 00 00 - 160: 60 c8 2f c8 a1 = R5.H \* R7.H, a0 \+= R5.L \* R7.L \(W32\) \|\| \[FP\+0x0\]=P0 \|\| NOP; - 164: 38 bc 00 00 - 168: 01 c9 01 c0 a1 \+= R0.H \* R1.H, a0 = R0.L \* R1.L \(IS\) \|\| \[FP\+0x3c\]=P0 \|\| NOP; - 16c: f8 bf 00 00 - 170: 90 c8 1c c8 a1 = R3.H \* R4.H \(M\), a0 \+= R3.L \* R4.L \(FU\) \|\| \[P0\]=P1 \|\| NOP; - 174: 41 93 00 00 - 178: 01 c8 24 96 a1 \+= R4.H \* R4.L, a0 -= R4.H \* R4.H \|\| \[P0\]=P2 \|\| NOP; - 17c: 42 93 00 00 - 180: 25 c9 3e e8 R0.H = \(a1 \+= R7.H \* R6.H\), R0.L = \(a0 \+= R7.L \* R6.L\) \(ISS2\) \|\| \[P0\]=P3 \|\| NOP; - 184: 43 93 00 00 - 188: 27 c8 81 28 R2.H = A1, R2.L = \(a0 \+= R0.L \* R1.L\) \(S2RND\) \|\| \[P0\]=P4 \|\| NOP; - 18c: 44 93 00 00 - 190: 04 c8 d1 c9 R7.H = \(a1 = R2.H \* R1.H\), a0 \+= R2.L \* R1.L \|\| \[P0\]=P5 \|\| NOP; - 194: 45 93 00 00 - 198: 04 c8 be 66 R2.H = \(a1 = R7.L \* R6.H\), R2.L = \(a0 = R7.H \* R6.H\) \|\| \[P0\]=FP \|\| NOP; - 19c: 47 93 00 00 - 1a0: 05 c8 9a e1 R6.H = \(a1 \+= R3.H \* R2.H\), R6.L = \(a0 = R3.L \* R2.L\) \|\| \[P0\]=SP \|\| NOP; - 1a4: 46 93 00 00 - 1a8: 05 c8 f5 a7 R7.H = \(a1 \+= R6.H \* R5.L\), R7.L = \(a0 = R6.H \* R5.H\) \|\| \[P0\]=R1 \|\| NOP; - 1ac: 01 93 00 00 - 1b0: 14 c8 3c a8 R0.H = \(a1 = R7.H \* R4.L\) \(M\), R0.L = \(a0 \+= R7.L \* R4.L\) \|\| \[P0\+\+\]=R2 \|\| NOP; - 1b4: 02 92 00 00 - 1b8: 94 c8 5a e9 R5.H = \(a1 = R3.H \* R2.H\) \(M\), R5.L = \(a0 \+= R3.L \* R2.L\) \(FU\) \|\| \[P1--\]=R3 \|\| NOP; - 1bc: 8b 92 00 00 - 1c0: 05 c9 1a e0 R0.H = \(a1 \+= R3.H \* R2.H\), R0.L = \(a0 = R3.L \* R2.L\) \(IS\) \|\| \[I0\]=R0 \|\| NOP; - 1c4: 00 9f 00 00 - 1c8: 1c c8 b7 d0 R3 = \(a1 = R6.H \* R7.H\) \(M\), a0 -= R6.L \* R7.L \|\| \[I0\+\+\]=R1 \|\| NOP; - 1cc: 01 9e 00 00 - 1d0: 1c c8 3c 2e R1 = \(a1 = R7.L \* R4.L\) \(M\), R0 = \(a0 \+= R7.H \* R4.H\) \|\| \[I0--\]=R2 \|\| NOP; - 1d4: 82 9e 00 00 - 1d8: 2d c9 3e e8 R1 = \(a1 \+= R7.H \* R6.H\), R0 = \(a0 \+= R7.L \* R6.L\) \(ISS2\) \|\| \[I1\]=R3 \|\| NOP; - 1dc: 0b 9f 00 00 - 1e0: 0d c8 37 e1 R5 = \(a1 \+= R6.H \* R7.H\), R4 = \(a0 = R6.L \* R7.L\) \|\| \[I1\+\+\]=R3 \|\| NOP; - 1e4: 0b 9e 00 00 - 1e8: 0d c8 9d f1 R7 = \(a1 \+= R3.H \* R5.H\), R6 = \(a0 -= R3.L \* R5.L\) \|\| \[I1--\]=R3 \|\| NOP; - 1ec: 8b 9e 00 00 - 1f0: 0e c8 37 c9 R5 = \(a1 -= R6.H \* R7.H\), a0 \+= R6.L \* R7.L \|\| \[I2\]=R0 \|\| NOP; - 1f4: 10 9f 00 00 - 1f8: 0c c8 b7 e0 R3 = \(a1 = R6.H \* R7.H\), R2 = \(a0 = R6.L \* R7.L\) \|\| \[I2\+\+\]=R0 \|\| NOP; - 1fc: 10 9e 00 00 - 200: 9c c8 1f e9 R5 = \(a1 = R3.H \* R7.H\) \(M\), R4 = \(a0 \+= R3.L \* R7.L\) \(FU\) \|\| \[I2--\]=R0 \|\| NOP; - 204: 90 9e 00 00 - 208: 2f c8 81 28 R3 = A1, R2 = \(a0 \+= R0.L \* R1.L\) \(S2RND\) \|\| \[I3\]=R7 \|\| NOP; - 20c: 1f 9f 00 00 - 210: 0d c9 1a e0 R1 = \(a1 \+= R3.H \* R2.H\), R0 = \(a0 = R3.L \* R2.L\) \(IS\) \|\| \[I3\+\+\]=R7 \|\| NOP; - 214: 1f 9e 00 00 - 218: 0f cc 08 c0 R0=-R1\(V\) \|\| \[I3--\]=R6 \|\| NOP; - 21c: 9e 9e 00 00 - 220: 0f cc 10 ce R7=-R2\(V\) \|\| \[P0\+\+P1\]=R0 \|\| NOP; - 224: 08 88 00 00 - 228: 04 ce 08 8e R7=PACK\(R0.H,R1.L\) \|\| \[P0\+\+P1\]=R3 \|\| NOP; - 22c: c8 88 00 00 - 230: 04 ce 31 cc R6=PACK\(R1.H,R6.H\) \|\| \[P0\+\+P2\]=R0 \|\| NOP; - 234: 10 88 00 00 - 238: 04 ce 12 4a R5=PACK\(R2.L,R2.H\) \|\| \[P0\+\+P3\]=R4 \|\| NOP; - 23c: 18 89 00 00 - 240: 0d cc 10 82 \(R0,R1\) = SEARCH R2\(LT\) \|\| R2=\[P0\+0x4\] \|\| NOP; - 244: 42 a0 00 00 - 248: 0d cc 80 cf \(R6,R7\) = SEARCH R0\(LE\) \|\| R5=\[P0--\] \|\| NOP; - 24c: 85 90 00 00 - 250: 0d cc c8 0c \(R3,R6\) = SEARCH R1\(GT\) \|\| R0=\[P0\+0x14\] \|\| NOP; - 254: 40 a1 00 00 - 258: 0d cc 18 4b \(R4,R5\) = SEARCH R3\(GE\) \|\| R1=\[P0\+\+\] \|\| NOP; - 25c: 01 90 00 00 diff --git a/binutils-2.17/gas/testsuite/gas/bfin/parallel3.s b/binutils-2.17/gas/testsuite/gas/bfin/parallel3.s deleted file mode 100644 index 538fad70..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/parallel3.s +++ /dev/null @@ -1,95 +0,0 @@ - .section .text;
- r4.h = r4.l = Sign (R1.h) * R5.h + Sign(r1.L) * R5.L|| [p0] = P0;
-
- R7 = Vit_Max (R5, r2) (ASL)|| [p0++] = P0;
- r0 = VIT_MAX (r0, r6) (asr)|| [p0--] = P0;
- r5.l = vit_max (R3) (asL)|| [p0+4] = P0;
- r2.L = VIT_Max (r2) (Asr)|| [p0+8] = P0;
-
- R5 = ABS R5 (V)|| [p0+60] = P0;
- r2 = abs r0 (v)|| [p0+56] = P0;
-
- R5 = r3 +|+ R2|| [p0+52] = P0;
- r5 = r3 +|+ r2 (Sco)|| [p1] = P0;
- r7 = R0 -|+ r6|| [p1++] = P0;
- r2 = R1 -|+ R3 (S)|| [p1--] = P0;
- R4 = R0 +|- R2|| [p1+48] = P0;
- R5 = r1 +|- r2 (CO)|| [p1+44] = P0;
- r6 = r3 -|- R4|| [p1+40] = P0;
- r7 = R5 -|- R6 (co)|| [p2] = P0;
-
- r5 = r4 +|+ r3, R7 = r4 -|- r3 (Sco, ASR)|| [p2++] = P0;
- R0 = R3 +|+ r6, R1 = R3 -|- R6 (ASL)|| [p2--] = P0;
- R7 = R1 +|- R2, R6 = R1 -|+ R2 (S)|| [p2+36] = P0;
- r1 = r2 +|- r3, r5 = r2 -|+ r3|| [p2+32] = P0;
-
- R5 = R0 + R1, R6 = R0 - R1|| [p3] = P0;
- r0 = r7 + r1, r3 = r7 - r1 (s)|| [p3++] = P0;
-
- r7 = A1 + A0, r5 = A1 - A0|| [p3--] = P0;
- r3 = a0 + a1, r6 = a0 - a1 (s)|| [p3+28] = P0;
-
- R1 = R3 >>> 15 (V)|| [p3+24] = P0;
- r4 = r0 >>> 4 (v)|| [p4] = P0;
- r5 = r0 << 0 (v,s)|| [p4++] = P0;
- r2 = r2 << 12 (v, S)|| [p4--] = P0;
-
- R7 = ASHIFT R5 BY R2.L (V)|| [p4+24] = P0;
- r0 = Ashift r2 by r0.L (v, s)|| [p4+20] = P0;
-
- R5 = r2 >> 15 (V)|| [p4+16] = P0;
- r0 = R1 << 2 (v)|| [p4+12] = P0;
-
- R4 = lshift r1 by r2.L (v)|| [p5] = P0;
-
- R6 = MAX (R0, R1) (V)|| [p5++] = P0;
- r0 = min (r2, r7) (v)|| [p5--] = P0;
-
- r2.h = r7.l * r6.h, r2.l = r7.h * r6.h|| [p5+8] = P0;
- R4.L = R1.L * R0.L, R4.H = R1.H * R0.H|| [p5+4] = P0;
- R0.h = R3.H * r2.l, r0.l=r3.l * r2.l|| [p5] = P0;
- r5.h = r3.h * r2.h (M), r5.l = r3.L * r2.L (fu)|| [sp] = P0;
- R0 = r4.l * r7.l, r1 = r4.h * r7.h (s2rnd)|| [sp++] = P0;
- R7 = R2.l * r5.l, r6 = r2.h * r5.h|| [sp--] = P0;
- R0.L = R7.L * R6.L, R0.H = R7.H * R6.H (ISS2)|| [sp+60] = P0;
- r3.h = r0.h * r1.h, r3.l = r0.l * r1.l (is)|| [fp] = P0;
-
- a1 = r2.l * r3.h, a0 = r2.h * R3.H|| [fp++] = P0;
- A0 = R1.l * R0.L, A1 += R1.h * R0.h|| [fp--] = P0;
- A1 = R5.h * R7.H, A0 += r5.L * r7.l (w32)|| [fp+0] = P0;
- a1 += r0.H * r1.H, A0 = R0.L * R1.l (is)|| [fp+60] = P0;
- a1 = r3.h * r4.h (m), a0 += r3.l * R4.L (FU)|| [p0] = P1;
- A1 += r4.H * R4.L, a0 -= r4.h * r4.h|| [p0] = P2;
-
- r0.l = (a0 += R7.l * R6.L), R0.H = (A1 += R7.H * R6.H) (Iss2)|| [p0] = P3;
- r2.H = A1, r2.l = (a0 += r0.L * r1.L) (s2rnd)|| [p0] = P4;
- r7.h = (a1 = r2.h * r1.h), a0 += r2.l * r1.l|| [p0] = P5;
- R2.H = (A1 = R7.L * R6.H), R2.L = (A0 = R7.H * R6.h)|| [p0] = fp;
- r6.L = (A0 = R3.L * r2.L), R6.H = (A1 += R3.H * R2.H)|| [p0] = sp;
- R7.h = (a1 += r6.h * r5.l), r7.l = (a0=r6.h * r5.h)|| [p0] = r1;
- r0.h = (A1 = r7.h * R4.l) (M), R0.l = (a0 += r7.l * r4.l)|| [p0++] = r2;
- R5.H = (a1 = r3.h * r2.h) (m), r5.l= (a0 += r3.l * r2.l) (fu)|| [p1--] = r3;
- r0.h = (A1 += R3.h * R2.h), R0.L = ( A0 = R3.L * R2.L) (is)|| [i0] = r0;
-
- R3 = (A1 = R6.H * R7.H) (M), A0 -= R6.L * R7.L|| [i0++] = r1;
- r1 = (a1 = r7.l * r4.l) (m), r0 = (a0 += r7.h * r4.h)|| [i0--] = r2;
- R0 = (a0 += r7.l * r6.l), r1 = (a1+= r7.h * r6.h) (ISS2)|| [i1] = r3;
- r4 = (a0 = r6.l * r7.l), r5 = (a1 += r6.h * r7.h)|| [i1++] = r3;
- R7 = (A1 += r3.h * r5.H), R6 = (A0 -= r3.l * r5.l)|| [i1--] = r3;
- r5 = (a1 -= r6.h * r7.h), a0 += r6.l * r7.l|| [i2] = r0;
- R3 = (A1 = r6.h * R7.h), R2 = (A0 = R6.l * r7.l)|| [i2++] = r0;
- R5 = (A1 = r3.h * r7.h) (M), r4 = (A0 += R3.l * r7.l) (fu)|| [i2--] = R0;
- R3 = a1, r2 = (a0 += r0.l *r1.l) (s2rnd)|| [i3] = R7;
- r1 = (a1 += r3.h * r2.h), r0 = (a0 = r3.l * r2.l) (is)|| [i3++] = R7;
-
- R0 = - R1 (V)|| [i3--] = R6;
- r7 = - r2 (v)|| [p0++p1] = R0;
-
- R7 = Pack (r0.h, r1.l)|| [p0++p1] = R3;
- r6 = PACK (r1.H, r6.H)|| [p0++p2] = r0;
- R5 = pack (R2.L, R2.H)|| [p0++p3] = r4;
-
- (R0, R1) = search R2 (lt)|| r2 = [p0+4];
- (r6, r7) = Search r0 (LE)|| r5 = [p0--];
- (r3, r6) = SEARCH r1 (Gt)|| r0 = [p0+20];
- (r4, R5) = sEARch r3 (gE)|| r1 = [p0++];
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/parallel4.d b/binutils-2.17/gas/testsuite/gas/bfin/parallel4.d deleted file mode 100644 index 5b5d85f4..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/parallel4.d +++ /dev/null @@ -1,67 +0,0 @@ -#objdump: -d -#name: parallel4 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 0d ce 15 0e R7=ALIGN8\(R5,R2\) \|\| \[I0\]=R0 \|\| NOP; - 4: 00 9f 00 00 - 8: 0d ce 08 4a R5=ALIGN16\(R0,R1\) \|\| \[I0\+\+\]=R0 \|\| NOP; - c: 00 9e 00 00 - 10: 0d ce 05 84 R2=ALIGN24\(R5,R0\) \|\| \[I0--\]=R0 \|\| NOP; - 14: 80 9e 00 00 - 18: 12 cc 00 c0 DISALGNEXCPT \|\| \[I1\]=R0 \|\| NOP; - 1c: 08 9f 00 00 - 20: 17 cc 02 0a R5=BYTEOP3P\(R1:0x0,R3:0x2\)\(LO\) \|\| \[I1\+\+\]=R0 \|\| NOP; - 24: 08 9e 00 00 - 28: 37 cc 02 00 R0=BYTEOP3P\(R1:0x0,R3:0x2\)\(HI\) \|\| \[I1--\]=R0 \|\| NOP; - 2c: 88 9e 00 00 - 30: 17 cc 02 22 R1=BYTEOP3P\(R1:0x0,R3:0x2\)\(LO, R\) \|\| \[I2\]=R0 \|\| NOP; - 34: 10 9f 00 00 - 38: 37 cc 02 24 R2=BYTEOP3P\(R1:0x0,R3:0x2\)\(HI, R\) \|\| \[I2\+\+\]=R0 \|\| NOP; - 3c: 10 9e 00 00 - 40: 0c cc 40 45 R5=A1.L\+A1.H,R2=A0.L\+A0.H \|\| \[I2--\]=R0 \|\| NOP; - 44: 90 9e 00 00 - 48: 15 cc 82 06 \(R2,R3\)=BYTEOP16P\(R1:0x0,R3:0x2\) \|\| \[I3\]=R0 \|\| NOP; - 4c: 18 9f 00 00 - 50: 15 cc 82 21 \(R6,R0\)=BYTEOP16P\(R1:0x0,R3:0x2\) \(R\) \|\| \[I3\+\+\]=R0 \|\| NOP; - 54: 18 9e 00 00 - 58: 14 cc 02 4e R7=BYTEOP1P\(R1:0x0,R3:0x2\)\(T\) \|\| \[I3--\]=R0 \|\| NOP; - 5c: 98 9e 00 00 - 60: 14 cc 02 44 R2=BYTEOP1P\(R1:0x0,R3:0x2\)\(T\) \|\| \[P0\]=R0 \|\| NOP; - 64: 00 93 00 00 - 68: 14 cc 02 26 R3=BYTEOP1P\(R1:0x0,R3:0x2\)\(R\) \|\| \[P0\+\+\]=R0 \|\| NOP; - 6c: 00 92 00 00 - 70: 14 cc 02 6e R7=BYTEOP1P\(R1:0x0,R3:0x2\)\(T, R\) \|\| \[P0--\]=R0 \|\| NOP; - 74: 80 92 00 00 - 78: 16 cc 02 00 R0=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDL\) \|\| \[P1\]=R0 \|\| NOP; - 7c: 08 93 00 00 - 80: 36 cc 02 02 R1=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDH\) \|\| \[P1\+\+\]=R0 \|\| NOP; - 84: 08 92 00 00 - 88: 16 cc 02 44 R2=BYTEOP2P\(R1:0x0,R3:0x2\)\(TL\) \|\| \[P1--\]=R0 \|\| NOP; - 8c: 88 92 00 00 - 90: 36 cc 02 46 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(TH\) \|\| \[P2\]=R0 \|\| NOP; - 94: 10 93 00 00 - 98: 16 cc 02 28 R4=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDL, R\) \|\| \[P2\+\+\]=R0 \|\| NOP; - 9c: 10 92 00 00 - a0: 36 cc 02 2a R5=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDH, R\) \|\| \[P2--\]=R0 \|\| NOP; - a4: 90 92 00 00 - a8: 16 cc 02 6c R6=BYTEOP2P\(R1:0x0,R3:0x2\)\(TL, R\) \|\| \[P3\]=R0 \|\| NOP; - ac: 18 93 00 00 - b0: 36 cc 02 6e R7=BYTEOP2P\(R1:0x0,R3:0x2\)\(TH, R\) \|\| \[P3\+\+\]=R0 \|\| NOP; - b4: 18 92 00 00 - b8: 18 cc 03 0a R5=BYTEPACK\(R0,R3\) \|\| \[P3--\]=R0 \|\| NOP; - bc: 98 92 00 00 - c0: 15 cc 82 45 \(R6,R2\)=BYTEOP16M\(R1:0x0,R3:0x2\) \|\| \[P4\]=R0 \|\| NOP; - c4: 20 93 00 00 - c8: 15 cc 02 6a \(R0,R5\)=BYTEOP16M\(R1:0x0,R3:0x2\) \(R\) \|\| \[P4\+\+\]=R0 \|\| NOP; - cc: 20 92 00 00 - d0: 12 cc 02 00 SAA\(R1:0x0,R3:0x2\) \|\| \[P4--\]=R0 \|\| NOP; - d4: a0 92 00 00 - d8: 12 cc 02 20 SAA\(R1:0x0,R3:0x2\) \(R\) \|\| \[P5\]=R0 \|\| NOP; - dc: 28 93 00 00 - e0: 18 cc c0 45 \(R7,R2\) = BYTEUNPACK R1:0x0 \|\| \[P5\+\+\]=R0 \|\| NOP; - e4: 28 92 00 00 - e8: 18 cc 90 69 \(R6,R4\) = BYTEUNPACK R3:0x2 \(R\) \|\| \[P5--\]=R0 \|\| NOP; - ec: a8 92 00 00 diff --git a/binutils-2.17/gas/testsuite/gas/bfin/parallel4.s b/binutils-2.17/gas/testsuite/gas/bfin/parallel4.s deleted file mode 100644 index 899050d4..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/parallel4.s +++ /dev/null @@ -1,43 +0,0 @@ - .section .text;
- R7 = Align8 (r5, r2) || [i0] = r0;
- R5 = ALIGN16 (R0, R1) || [i0++] = r0;
- r2 = ALIGN24 (r5, r0) || [i0--] = r0;
-
- DISAlgnExcpt || [i1] = r0;
-
- R5 = Byteop3p (r1:0, r3:2) (lO)
- || [i1++] = r0;
- R0 = BYTEOP3P (R1:0, R3:2) (HI) || // comment test
- [i1--] = r0;
- R1 = byteop3p (r1:0, r3:2) (LO, r) || [i2] = r0;
- r2 = ByteOp3P (r1:0, R3:2) (hi, R) || [i2++] = r0;
-
- R5 = A1.l + A1.h, R2 = a0.l + a0.h || [i2--] = r0;
-
- (r2, r3) = BYTEOP16P (R1:0, R3:2) || [i3] = r0;
- (R6, R0) = byteop16p (r1:0, r3:2) (r) || [i3++] = r0;
-
- R7 = BYTEOP1P (R1:0, R3:2) (t) || [i3--] = r0;
- r2 = byteop1p (r1:0, r3:2) (t) || [p0] = r0;
- R3 = ByteOp1P (r1:0, R3:2) (R) || [p0++] = r0;
- r7 = byteOP1P (R1:0, r3:2) (T, r) || [p0--] = r0;
-
- R0 = BYTEOP2P (R1:0, R3:2) (RNDL) || [p1] = r0;
- r1 = byteop2p (r1:0, r3:2) (rndh) || [p1++] = r0;
- R2 = Byteop2p (R1:0, R3:2) (tL) || [p1--] = r0;
- R3 = Byteop2p (r1:0, r3:2) (TH) || [p2] = r0;
- r4 = ByTEOP2P (r1:0, R3:2) (Rndl, R) || [p2++] = r0;
- R5 = byTeOp2p (R1:0, r3:2) (rndH, r) || [p2--] = r0;
- r6 = BYTEop2p (r1:0, r3:2) (tl, R) || [p3] = r0;
- R7 = byteop2p (r1:0, R3:2) (TH, r) || [p3++] = r0;
-
- R5 = BytePack (R0, R3) || [p3--] = r0;
-
- (R6, R2) = ByteOp16M (r1:0, r3:2) || [p4] = r0;
- (r0, r5) = byteop16m (R1:0, R3:2) (r) || [p4++] = r0;
-
- saa (r1:0, r3:2) || [p4--] = r0;
- SAA (R1:0, R3:2) (r) || [p5] = r0;
-
- (R7, R2) = byteunpack R1:0 || [p5++] = r0;
- (R6, R4) = BYTEUNPACK r3:2 (R) || [p5--] = r0;
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/reloc.d b/binutils-2.17/gas/testsuite/gas/bfin/reloc.d deleted file mode 100644 index c2e402d2..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/reloc.d +++ /dev/null @@ -1,20 +0,0 @@ -#objdump: -r -#name: reloc -.*: +file format .* - -RELOCATION RECORDS FOR \[\.text\]: -OFFSET TYPE VALUE -0*0004 R_pcrel24 _call_data1 -0*0008 R_rimm16 .data -0*000a R_pcrel12_jump_s .text\+0x00000018 -0*000e R_pcrel24 call_data1\+0x00000008 -0*0012 R_huimm16 .data\+0x00000002 -0*0016 R_luimm16 .data\+0x00000004 -0*001a R_huimm16 load_extern1 - - -RELOCATION RECORDS FOR \[\.data\]: -OFFSET TYPE VALUE -0*0006 R_byte_data load_extern1 - - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/reloc.s b/binutils-2.17/gas/testsuite/gas/bfin/reloc.s deleted file mode 100644 index 51162d9c..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/reloc.s +++ /dev/null @@ -1,19 +0,0 @@ - .extern load_extern1; - .extern call_data1; - .data -load_data1: .word 4567; -load_data2: .word 8901; -load_data3: .word 1243; -load_data4: .byte load_extern1; - .text - jump exit; - call _call_data1; - r5 = load_data1; - jump exit-4; - call call_data1+8; - r5.H = load_data2; - r7.L = load_data3; - r1.h = load_extern1; - -exit: - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/shift.d b/binutils-2.17/gas/testsuite/gas/bfin/shift.d deleted file mode 100644 index b355f72d..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/shift.d +++ /dev/null @@ -1,75 +0,0 @@ -#objdump: -dr -#name: shift -.*: +file format .* - -Disassembly of section .text: - -00000000 <add_with_shift>: - 0: 88 45 P0=\(P0\+P1\)<<1; - 2: ea 45 P2=\(P2\+P5\)<<2; - 4: 4f 41 R7=\(R7\+R1\)<<2; - 6: 03 41 R3=\(R3\+R0\)<<1; - -00000008 <shift_with_add>: - 8: 44 5f P5=P4\+\(P0<<2\); - a: 0a 5c P0=P2\+\(P1<<1\); - -0000000c <arithmetic_shift>: - c: 83 c6 08 41 A0=A0>>0x1f; - 10: 83 c6 f8 00 A0=A0<<0x1f; - 14: 83 c6 00 50 A1=A1>>0x0; - 18: 83 c6 00 10 A1=A1<<0x0; - 1c: 82 c6 fd 4e R7=R5<<0x1f\(S\); - 20: 82 c6 52 07 R3=R2>>>0x16; - 24: 80 c6 7a 52 R1.L = R2.H << 0xf \(S\); - 28: 80 c6 f2 2b R5.H = R2.L >>> 0x2; - 2c: 00 4f R0<<=0x0; - 2e: f9 4d R1>>>=0x1f; - 30: 08 40 R0>>>=R1; - 32: 8a 40 R2<<=R1; - 34: 00 c6 14 16 R3.L= ASHIFT R4.H BY R2.L; - 38: 00 c6 07 6e R7.H= ASHIFT R7.L BY R0.L\(S\); - 3c: 00 c6 07 6e R7.H= ASHIFT R7.L BY R0.L\(S\); - 40: 02 c6 15 0c R6= ASHIFT R5 BY R2.L; - 44: 02 c6 0c 40 R0= ASHIFT R4 BY R1.L\(S\); - 48: 02 c6 1e 44 R2= ASHIFT R6 BY R3.L\(S\); - 4c: 03 c6 08 00 A0= ASHIFT A0 BY R1.L; - 50: 03 c6 00 10 A1= ASHIFT A1 BY R0.L; - -00000054 <logical_shift>: - 54: 00 45 P0=P0>>1; - 56: d1 44 P1=P2>>2; - 58: c9 5a P3=P1<<1; - 5a: 6c 44 P4=P5<<2; - 5c: f8 4e R0>>=0x1f; - 5e: ff 4f R7<<=0x1f; - 60: 80 c6 8a a3 R1.H = R2.L >> 0xf; - 64: 80 c6 00 8e R7.L = R0.L << 0x0; - 68: 82 c6 0d 8b R5=R5>>0x1f; - 6c: 82 c6 60 80 R0=R0<<0xc; - 70: 83 c6 f8 41 A0=A0>>0x1; - 74: 83 c6 00 00 A0=A0<<0x0; - 78: 83 c6 f8 10 A1=A1<<0x1f; - 7c: 83 c6 80 51 A1=A1>>0x10; - 80: 7d 40 R5>>=R7; - 82: 86 40 R6<<=R0; - 84: 00 c6 02 b2 R1.H= LSHIFT R2.H BY R0.L; - 88: 00 c6 08 90 R0.L= LSHIFT R0.H BY R1.L; - 8c: 00 c6 16 8e R7.L= LSHIFT R6.L BY R2.L; - 90: 02 c6 1c 8a R5=SHIFT R4 BY R3.L; - 94: 03 c6 30 40 A0= LSHIFT A0 BY R6.L; - 98: 03 c6 28 50 A1= LSHIFT A1 BY R5.L; - -0000009c <rotate>: - 9c: 82 c6 07 cf R7= ROT R7 BY -32; - a0: 82 c6 0f cd R6= ROT R7 BY -31; - a4: 82 c6 ff ca R5= ROT R7 BY 0x1f; - a8: 82 c6 f7 c8 R4= ROT R7 BY 0x1e; - ac: 83 c6 00 80 A0= ROT A0 BY 0x0; - b0: 83 c6 50 80 A0= ROT A0 BY 0xa; - b4: 83 c6 60 91 A1= ROT A1 BY -20; - b8: 83 c6 00 91 A1= ROT A1 BY -32; - bc: 02 c6 11 c0 R0= ROT R1 BY R2.L; - c0: 02 c6 1c c0 R0= ROT R4 BY R3.L; - c4: 03 c6 38 80 A0= ROT A0 BY R7.L; - c8: 03 c6 30 90 A1= ROT A1 BY R6.L; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/shift.s b/binutils-2.17/gas/testsuite/gas/bfin/shift.s deleted file mode 100644 index b146f7d4..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/shift.s +++ /dev/null @@ -1,87 +0,0 @@ - .text - .global add_with_shift -add_with_shift: - P0 = (P0 + p1) << 1; - P2 = (p2 + p5) << 2; - r7 = (R7 + r1) << 2; - r3 = (r3 + R0) << 1; - - .text - .global shift_with_add -shift_with_add: - P5 = p4 + (P0 << 2); - P0 = p2 + (p1 << 1); - - .text - .global arithmetic_shift -arithmetic_shift: - A0 = A0 >> 31; - a0 = a0 << 31; - a1 = a1 >> 0; - A1 = A1 << 0; - r7 = r5 << 31 (s); - R3 = r2 >>> 22; - r1.L = R2.H << 15 (S); - r5.h = r2.l >>> 2; - r0 <<= 0; - r1 >>>= 31; - - r0 >>>= R1; - R2 <<= R1; - r3.l = Ashift r4.h by r2.l; - R7.H = ASHIFT R7.L by R0.L (S); - r7.h = ashift r7.l by r0.l (s); - r6 = AShiFT R5 by R2.L; - R0 = Ashift R4 by r1.l (s); - r2 = ashift r6 BY r3.L (S); - A0 = Ashift a0 by r1.l; - a1 = ASHIFT a1 by r0.L; - - - .text - .global logical_shift -logical_shift: - p0 = p0 >> 1; - P1 = p2 >> 2; - P3 = P1 << 1; - p4 = p5 << 2; - - r0 >>= 31; - R7 <<= 31; - r1.H = r2.l >> 15; - r7.l = r0.L << 0; - r5 = r5 >> 31; - r0 = r0 << 12; - A0 = A0 >> 1; - A0 = A0 << 0; - a1 = A1 << 31; - a1 = a1 >> 16; - - r5 >>= R7; - R6 <<= r0; - R1.H = LShift r2.h by r0.l; - r0.l = LSHIFT r0.h by r1.l; - r7.L = lshift r6.L BY r2.l; - r5 = LShIft R4 bY r3.L; - A0 = Lshift a0 By R6.L; - A1 = LsHIFt a1 by r5.l; - - .text - .global rotate -rotate: - r7 = ROT r7 by -32; - R6 = Rot r7 by -31; - R5 = RoT R7 by 31; - R4 = Rot r7 by 30; - a0 = rot A0 by 0; - A0 = ROT a0 BY 10; - A1 = ROT A1 by -20; - A1 = ROT a1 By -32; - - r0 = rot r1 by r2.L; - R0 = Rot R4 BY R3.L; - A0 = ROT A0 by r7.l; - A1 = rot a1 bY r6.l; - - - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/shift2.d b/binutils-2.17/gas/testsuite/gas/bfin/shift2.d deleted file mode 100644 index 75416b14..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/shift2.d +++ /dev/null @@ -1,222 +0,0 @@ -#objdump: -dr -#name: shift2 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 80 45 P0=\(P0\+P0\)<<1; - 2: 88 45 P0=\(P0\+P1\)<<1; - 4: 82 45 P2=\(P2\+P0\)<<1; - 6: 91 45 P1=\(P1\+P2\)<<1; - 8: c0 45 P0=\(P0\+P0\)<<2; - a: c8 45 P0=\(P0\+P1\)<<2; - c: c2 45 P2=\(P2\+P0\)<<2; - e: d1 45 P1=\(P1\+P2\)<<2; - 10: 00 41 R0=\(R0\+R0\)<<1; - 12: 08 41 R0=\(R0\+R1\)<<1; - 14: 02 41 R2=\(R2\+R0\)<<1; - 16: 11 41 R1=\(R1\+R2\)<<1; - 18: 40 41 R0=\(R0\+R0\)<<2; - 1a: 48 41 R0=\(R0\+R1\)<<2; - 1c: 42 41 R2=\(R2\+R0\)<<2; - 1e: 51 41 R1=\(R1\+R2\)<<2; - 20: 00 5c P0=P0\+\(P0<<1\); - 22: 08 5c P0=P0\+\(P1<<1\); - 24: 10 5c P0=P0\+\(P2<<1\); - 26: 11 5c P0=P1\+\(P2<<1\); - 28: 1a 5c P0=P2\+\(P3<<1\); - 2a: 40 5c P1=P0\+\(P0<<1\); - 2c: 48 5c P1=P0\+\(P1<<1\); - 2e: 50 5c P1=P0\+\(P2<<1\); - 30: 51 5c P1=P1\+\(P2<<1\); - 32: 5a 5c P1=P2\+\(P3<<1\); - 34: 00 5e P0=P0\+\(P0<<2\); - 36: 08 5e P0=P0\+\(P1<<2\); - 38: 10 5e P0=P0\+\(P2<<2\); - 3a: 11 5e P0=P1\+\(P2<<2\); - 3c: 1a 5e P0=P2\+\(P3<<2\); - 3e: 40 5e P1=P0\+\(P0<<2\); - 40: 48 5e P1=P0\+\(P1<<2\); - 42: 50 5e P1=P0\+\(P2<<2\); - 44: 51 5e P1=P1\+\(P2<<2\); - 46: 5a 5e P1=P2\+\(P3<<2\); - 48: 00 4d R0>>>=0x0; - 4a: f8 4d R0>>>=0x1f; - 4c: 28 4d R0>>>=0x5; - 4e: 05 4d R5>>>=0x0; - 50: fd 4d R5>>>=0x1f; - 52: 2d 4d R5>>>=0x5; - 54: 00 4f R0<<=0x0; - 56: f8 4f R0<<=0x1f; - 58: 28 4f R0<<=0x5; - 5a: 05 4f R5<<=0x0; - 5c: fd 4f R5<<=0x1f; - 5e: 2d 4f R5<<=0x5; - 60: 80 c6 00 00 R0.L = R0.L >>> 0x0; - 64: 80 c6 88 01 R0.L = R0.L >>> 0xf; - 68: 80 c6 00 10 R0.L = R0.H >>> 0x0; - 6c: 80 c6 88 11 R0.L = R0.H >>> 0xf; - 70: 80 c6 00 20 R0.H = R0.L >>> 0x0; - 74: 80 c6 88 21 R0.H = R0.L >>> 0xf; - 78: 80 c6 00 30 R0.H = R0.H >>> 0x0; - 7c: 80 c6 88 31 R0.H = R0.H >>> 0xf; - 80: 80 c6 01 00 R0.L = R1.L >>> 0x0; - 84: 80 c6 89 01 R0.L = R1.L >>> 0xf; - 88: 80 c6 01 10 R0.L = R1.H >>> 0x0; - 8c: 80 c6 89 11 R0.L = R1.H >>> 0xf; - 90: 80 c6 01 20 R0.H = R1.L >>> 0x0; - 94: 80 c6 89 21 R0.H = R1.L >>> 0xf; - 98: 80 c6 01 30 R0.H = R1.H >>> 0x0; - 9c: 80 c6 89 31 R0.H = R1.H >>> 0xf; - a0: 80 c6 07 00 R0.L = R7.L >>> 0x0; - a4: 80 c6 8e 03 R1.L = R6.L >>> 0xf; - a8: 80 c6 05 14 R2.L = R5.H >>> 0x0; - ac: 80 c6 8c 17 R3.L = R4.H >>> 0xf; - b0: 80 c6 03 28 R4.H = R3.L >>> 0x0; - b4: 80 c6 8a 2b R5.H = R2.L >>> 0xf; - b8: 80 c6 01 3c R6.H = R1.H >>> 0x0; - bc: 80 c6 88 3f R7.H = R0.H >>> 0xf; - c0: 80 c6 00 40 R0.L = R0.L << 0x0 \(S\); - c4: 80 c6 78 40 R0.L = R0.L << 0xf \(S\); - c8: 80 c6 00 50 R0.L = R0.H << 0x0 \(S\); - cc: 80 c6 78 50 R0.L = R0.H << 0xf \(S\); - d0: 80 c6 00 60 R0.H = R0.L << 0x0 \(S\); - d4: 80 c6 78 60 R0.H = R0.L << 0xf \(S\); - d8: 80 c6 00 70 R0.H = R0.H << 0x0 \(S\); - dc: 80 c6 78 70 R0.H = R0.H << 0xf \(S\); - e0: 80 c6 01 40 R0.L = R1.L << 0x0 \(S\); - e4: 80 c6 79 40 R0.L = R1.L << 0xf \(S\); - e8: 80 c6 01 50 R0.L = R1.H << 0x0 \(S\); - ec: 80 c6 79 50 R0.L = R1.H << 0xf \(S\); - f0: 80 c6 01 60 R0.H = R1.L << 0x0 \(S\); - f4: 80 c6 79 60 R0.H = R1.L << 0xf \(S\); - f8: 80 c6 01 70 R0.H = R1.H << 0x0 \(S\); - fc: 80 c6 79 70 R0.H = R1.H << 0xf \(S\); - 100: 80 c6 07 40 R0.L = R7.L << 0x0 \(S\); - 104: 80 c6 7e 42 R1.L = R6.L << 0xf \(S\); - 108: 80 c6 05 54 R2.L = R5.H << 0x0 \(S\); - 10c: 80 c6 7c 56 R3.L = R4.H << 0xf \(S\); - 110: 80 c6 03 68 R4.H = R3.L << 0x0 \(S\); - 114: 80 c6 7a 6a R5.H = R2.L << 0xf \(S\); - 118: 80 c6 01 7c R6.H = R1.H << 0x0 \(S\); - 11c: 80 c6 78 7e R7.H = R0.H << 0xf \(S\); - 120: 82 c6 00 00 R0=R0>>>0x0; - 124: 82 c6 08 01 R0=R0>>>0x1f; - 128: 82 c6 01 00 R0=R1>>>0x0; - 12c: 82 c6 09 01 R0=R1>>>0x1f; - 130: 82 c6 00 0e R7=R0>>>0x0; - 134: 82 c6 09 0d R6=R1>>>0x1f; - 138: 82 c6 02 0a R5=R2>>>0x0; - 13c: 82 c6 0b 09 R4=R3>>>0x1f; - 140: 82 c6 04 06 R3=R4>>>0x0; - 144: 82 c6 0d 05 R2=R5>>>0x1f; - 148: 82 c6 06 02 R1=R6>>>0x0; - 14c: 82 c6 0f 01 R0=R7>>>0x1f; - 150: 82 c6 00 40 R0=R0<<0x0\(S\); - 154: 82 c6 f8 40 R0=R0<<0x1f\(S\); - 158: 82 c6 01 40 R0=R1<<0x0\(S\); - 15c: 82 c6 f9 40 R0=R1<<0x1f\(S\); - 160: 82 c6 00 4e R7=R0<<0x0\(S\); - 164: 82 c6 f9 4c R6=R1<<0x1f\(S\); - 168: 82 c6 02 4a R5=R2<<0x0\(S\); - 16c: 82 c6 fb 48 R4=R3<<0x1f\(S\); - 170: 82 c6 04 46 R3=R4<<0x0\(S\); - 174: 82 c6 fd 44 R2=R5<<0x1f\(S\); - 178: 82 c6 06 42 R1=R6<<0x0\(S\); - 17c: 82 c6 ff 40 R0=R7<<0x1f\(S\); - 180: 83 c6 00 00 A0=A0<<0x0; - 184: 83 c6 88 01 A0=A0>>>0xf; - 188: 83 c6 08 01 A0=A0>>>0x1f; - 18c: 83 c6 00 00 A0=A0<<0x0; - 190: 83 c6 78 00 A0=A0<<0xf; - 194: 83 c6 f8 00 A0=A0<<0x1f; - 198: 83 c6 00 10 A1=A1<<0x0; - 19c: 83 c6 88 11 A1=A1>>>0xf; - 1a0: 83 c6 08 11 A1=A1>>>0x1f; - 1a4: 83 c6 00 10 A1=A1<<0x0; - 1a8: 83 c6 78 10 A1=A1<<0xf; - 1ac: 83 c6 f8 10 A1=A1<<0x1f; - 1b0: 00 40 R0>>>=R0; - 1b2: 08 40 R0>>>=R1; - 1b4: 01 40 R1>>>=R0; - 1b6: 39 40 R1>>>=R7; - 1b8: 80 40 R0<<=R0; - 1ba: 88 40 R0<<=R1; - 1bc: 81 40 R1<<=R0; - 1be: b9 40 R1<<=R7; - 1c0: 00 c6 38 16 R3.L= ASHIFT R0.H BY R7.L; - 1c4: 00 c6 38 26 R3.H= ASHIFT R0.L BY R7.L; - 1c8: 00 c6 38 36 R3.H= ASHIFT R0.H BY R7.L; - 1cc: 00 c6 38 06 R3.L= ASHIFT R0.L BY R7.L; - 1d0: 00 c6 38 56 R3.L= ASHIFT R0.H BY R7.L\(S\); - 1d4: 00 c6 38 66 R3.H= ASHIFT R0.L BY R7.L\(S\); - 1d8: 00 c6 38 76 R3.H= ASHIFT R0.H BY R7.L\(S\); - 1dc: 00 c6 38 46 R3.L= ASHIFT R0.L BY R7.L\(S\); - 1e0: 02 c6 3a 08 R4= ASHIFT R2 BY R7.L; - 1e4: 02 c6 3a 48 R4= ASHIFT R2 BY R7.L\(S\); - 1e8: 03 c6 38 00 A0= ASHIFT A0 BY R7.L; - 1ec: 03 c6 38 10 A1= ASHIFT A1 BY R7.L; - 1f0: 13 45 P3=P2>>1; - 1f2: db 44 P3=P3>>2; - 1f4: 2d 5b P4=P5<<1; - 1f6: 48 44 P0=P1<<2; - 1f8: 8b 4e R3>>=0x11; - 1fa: 8b 4f R3<<=0x11; - 1fc: 80 c6 e0 87 R3.L = R0.L >> 0x4; - 200: 80 c6 e0 97 R3.L = R0.H >> 0x4; - 204: 80 c6 60 a6 R3.H = R0.L << 0xc; - 208: 80 c6 70 b6 R3.H = R0.H << 0xe; - 20c: 82 c6 e6 87 R3=R6>>0x4; - 210: 82 c6 26 86 R3=R6<<0x4; - 214: 83 c6 c8 41 A0=A0>>0x7; - 218: 83 c6 38 51 A1=A1>>0x19; - 21c: 83 c6 38 00 A0=A0<<0x7; - 220: 83 c6 70 10 A1=A1<<0xe; - 224: 43 40 R3>>=R0; - 226: 8b 40 R3<<=R1; - 228: 00 c6 10 86 R3.L= LSHIFT R0.L BY R2.L; - 22c: 00 c6 10 a6 R3.H= LSHIFT R0.L BY R2.L; - 230: 03 c6 38 40 A0= LSHIFT A0 BY R7.L; - 234: 03 c6 38 50 A1= LSHIFT A1 BY R7.L; - 238: 82 c6 f9 c8 R4= ROT R1 BY 0x1f; - 23c: 82 c6 01 c9 R4= ROT R1 BY -32; - 240: 82 c6 29 c8 R4= ROT R1 BY 0x5; - 244: 83 c6 b0 80 A0= ROT A0 BY 0x16; - 248: 83 c6 00 81 A0= ROT A0 BY -32; - 24c: 83 c6 f8 80 A0= ROT A0 BY 0x1f; - 250: 83 c6 00 91 A1= ROT A1 BY -32; - 254: 83 c6 f8 90 A1= ROT A1 BY 0x1f; - 258: 83 c6 b0 90 A1= ROT A1 BY 0x16; - 25c: 02 c6 11 c8 R4= ROT R1 BY R2.L; - 260: 03 c6 18 80 A0= ROT A0 BY R3.L; - 264: 03 c6 38 90 A1= ROT A1 BY R7.L; - 268: 80 c6 01 80 R0.L = R1.L << 0x0; - 26c: 80 c6 09 80 R0.L = R1.L << 0x1; - 270: 80 c6 11 80 R0.L = R1.L << 0x2; - 274: 80 c6 21 80 R0.L = R1.L << 0x4; - 278: 80 c6 01 80 R0.L = R1.L << 0x0; - 27c: 80 c6 f9 81 R0.L = R1.L >> 0x1; - 280: 80 c6 f1 81 R0.L = R1.L >> 0x2; - 284: 80 c6 e1 81 R0.L = R1.L >> 0x4; - 288: 80 c6 f9 01 R0.L = R1.L >>> 0x1; - 28c: 80 c6 f1 01 R0.L = R1.L >>> 0x2; - 290: 80 c6 e1 01 R0.L = R1.L >>> 0x4; - 294: 80 c6 01 90 R0.L = R1.H << 0x0; - 298: 80 c6 09 90 R0.L = R1.H << 0x1; - 29c: 80 c6 11 90 R0.L = R1.H << 0x2; - 2a0: 80 c6 21 90 R0.L = R1.H << 0x4; - 2a4: 80 c6 01 90 R0.L = R1.H << 0x0; - 2a8: 80 c6 f9 91 R0.L = R1.H >> 0x1; - 2ac: 80 c6 f1 91 R0.L = R1.H >> 0x2; - 2b0: 80 c6 e1 91 R0.L = R1.H >> 0x4; - 2b4: 80 c6 f9 11 R0.L = R1.H >>> 0x1; - 2b8: 80 c6 f1 11 R0.L = R1.H >>> 0x2; - 2bc: 80 c6 e1 11 R0.L = R1.H >>> 0x4; - 2c0: 80 c6 01 50 R0.L = R1.H << 0x0 \(S\); - 2c4: 80 c6 09 50 R0.L = R1.H << 0x1 \(S\); - 2c8: 80 c6 11 50 R0.L = R1.H << 0x2 \(S\); - 2cc: 80 c6 21 50 R0.L = R1.H << 0x4 \(S\); - 2d0: 80 c6 f9 51 R0.L = R1.H >>> 0x1 \(S\); - 2d4: 80 c6 f1 51 R0.L = R1.H >>> 0x2 \(S\); - 2d8: 80 c6 e1 51 R0.L = R1.H >>> 0x4 \(S\); diff --git a/binutils-2.17/gas/testsuite/gas/bfin/shift2.s b/binutils-2.17/gas/testsuite/gas/bfin/shift2.s deleted file mode 100755 index 69377bcd..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/shift2.s +++ /dev/null @@ -1,290 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//9 SHIFT/ROTATE OPERATIONS
-//
-
-//Preg = ( Preg + Preg ) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */
-P0 = (P0+P0)<<1;
-P0 = (P0+P1)<<1;
-P2 = (P2+P0)<<1;
-P1 = (P1+P2)<<1;
-
-//P0 = (P2+P0)<<1;
-
-//Preg = ( Preg + Preg ) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */
-P0 = (P0+P0)<<2;
-P0 = (P0+P1)<<2;
-P2 = (P2+P0)<<2;
-P1 = (P1+P2)<<2;
-
-//P0 = (P2+P0)<<2;
-
-//Dreg = (Dreg + Dreg) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */
-R0 = (R0+R0)<<1;
-R0 = (R0+R1)<<1;
-R2 = (R2+R0)<<1;
-R1 = (R1+R2)<<1;
-
-//R0 = (R2+R0)<<1;
-
-
-//Dreg = (Dreg + Dreg) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */
-R0 = (R0+R0)<<2;
-R0 = (R0+R1)<<2;
-R2 = (R2+R0)<<2;
-R1 = (R1+R2)<<2;
-
-//R0 = (R2+R0)<<2;
-
-//Preg = Preg + ( Preg << 1 ) ; /* adder_pntr + (src_pntr x 2) (a) */
-P0 = P0 + (P0 << 1);
-P0 = P0 + (P1 << 1);
-P0 = P0 + (P2 << 1);
-P0 = P1 + (P2 << 1);
-P0 = P2 + (P3 << 1);
-P1 = P0 + (P0 << 1);
-P1 = P0 + (P1 << 1);
-P1 = P0 + (P2 << 1);
-P1 = P1 + (P2 << 1);
-P1 = P2 + (P3 << 1);
-
-//Preg = Preg + ( Preg << 2 ) ; /* adder_pntr + (src_pntr x 4) (a) */
-P0 = P0 + (P0 << 2);
-P0 = P0 + (P1 << 2);
-P0 = P0 + (P2 << 2);
-P0 = P1 + (P2 << 2);
-P0 = P2 + (P3 << 2);
-P1 = P0 + (P0 << 2);
-P1 = P0 + (P1 << 2);
-P1 = P0 + (P2 << 2);
-P1 = P1 + (P2 << 2);
-P1 = P2 + (P3 << 2);
-
-//Dreg >>>= uimm5 ; /* arithmetic right shift (a) */
-R0 >>>= 0;
-R0 >>>= 31;
-R0 >>>= 5;
-R5 >>>= 0;
-R5 >>>= 31;
-R5 >>>= 5;
-
-//Dreg <<= uimm5 ; /* logical left shift (a) */
-R0 <<= 0;
-R0 <<= 31;
-R0 <<= 5;
-R5 <<= 0;
-R5 <<= 31;
-R5 <<= 5;
-//Dreg_lo_hi = Dreg_lo_hi >>> uimm4 ; /* arithmetic right shift (b) */
-R0.L = R0.L >>> 0;
-R0.L = R0.L >>> 15;
-R0.L = R0.H >>> 0;
-R0.L = R0.H >>> 15;
-R0.H = R0.L >>> 0;
-R0.H = R0.L >>> 15;
-R0.H = R0.H >>> 0;
-R0.H = R0.H >>> 15;
-
-R0.L = R1.L >>> 0;
-R0.L = R1.L >>> 15;
-R0.L = R1.H >>> 0;
-R0.L = R1.H >>> 15;
-R0.H = R1.L >>> 0;
-R0.H = R1.L >>> 15;
-R0.H = R1.H >>> 0;
-R0.H = R1.H >>> 15;
-
-R0.L = R7.L >>> 0;
-R1.L = R6.L >>> 15;
-R2.L = R5.H >>> 0;
-R3.L = R4.H >>> 15;
-R4.H = R3.L >>> 0;
-R5.H = R2.L >>> 15;
-R6.H = R1.H >>> 0;
-R7.H = R0.H >>> 15;
-
-//Dreg_lo_hi = Dreg_lo_hi << uimm4 (S) ; /* arithmetic left shift (b) */
-R0.L = R0.L << 0(S);
-R0.L = R0.L << 15(S);
-R0.L = R0.H << 0(S);
-R0.L = R0.H << 15(S);
-R0.H = R0.L << 0(S);
-R0.H = R0.L << 15(S);
-R0.H = R0.H << 0(S);
-R0.H = R0.H << 15(S);
-
-R0.L = R1.L << 0(S);
-R0.L = R1.L << 15(S);
-R0.L = R1.H << 0(S);
-R0.L = R1.H << 15(S);
-R0.H = R1.L << 0(S);
-R0.H = R1.L << 15(S);
-R0.H = R1.H << 0(S);
-R0.H = R1.H << 15(S);
-
-R0.L = R7.L << 0(S);
-R1.L = R6.L << 15(S);
-R2.L = R5.H << 0(S);
-R3.L = R4.H << 15(S);
-R4.H = R3.L << 0(S);
-R5.H = R2.L << 15(S);
-R6.H = R1.H << 0(S);
-R7.H = R0.H << 15(S);
-//Dreg = Dreg >>> uimm5 ; /* arithmetic right shift (b) */
-R0 = R0 >>> 0;
-R0 = R0 >>> 31;
-R0 = R1 >>> 0;
-R0 = R1 >>> 31;
-R7 = R0 >>> 0;
-R6 = R1 >>> 31;
-R5 = R2 >>> 0;
-R4 = R3 >>> 31;
-R3 = R4 >>> 0;
-R2 = R5 >>> 31;
-R1 = R6 >>> 0;
-R0 = R7 >>> 31;
-
-//Dreg = Dreg << uimm5 (S) ; /* arithmetic left shift (b) */
-R0 = R0 << 0(S);
-R0 = R0 << 31(S);
-R0 = R1 << 0(S);
-R0 = R1 << 31(S);
-R7 = R0 << 0(S);
-R6 = R1 << 31(S);
-R5 = R2 << 0(S);
-R4 = R3 << 31(S);
-R3 = R4 << 0(S);
-R2 = R5 << 31(S);
-R1 = R6 << 0(S);
-R0 = R7 << 31(S);
-//A0 = A0 >>> uimm5 ; /* arithmetic right shift (b) */
-A0 = A0 >>> 0;
-A0 = A0 >>> 15;
-A0 = A0 >>> 31;
-
-//A0 = A0 << uimm5 ; /* logical left shift (b) */
-A0 = A0 << 0;
-A0 = A0 << 15;
-A0 = A0 << 31;
-
-//A1 = A1 >>> uimm5 ; /* arithmetic right shift (b) */
-A1 = A1 >>> 0;
-A1 = A1 >>> 15;
-A1 = A1 >>> 31;
-
-//A1 = A1 << uimm5 ; /* logical left shift (b) */
-A1 = A1 << 0;
-A1 = A1 << 15;
-A1 = A1 << 31;
-
-//Dreg >>>= Dreg ; /* arithmetic right shift (a) */
-R0 >>>= R0;
-R0 >>>= R1;
-R1 >>>= R0;
-R1 >>>= R7;
-
-//Dreg <<= Dreg ; /* logical left shift (a) */
-R0 <<= R0;
-R0 <<= R1;
-R1 <<= R0;
-R1 <<= R7;
-
-//Dreg_lo_hi = ASHIFT Dreg_lo_hi BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */
-r3.l = ashift r0.h by r7.l ; /* shift, half-word */
-r3.h = ashift r0.l by r7.l ;
-r3.h = ashift r0.h by r7.l ;
-r3.l = ashift r0.l by r7.l ;
-r3.l = ashift r0.h by r7.l(s) ; /* shift, half-word, saturated */
-r3.h = ashift r0.l by r7.l(s) ; /* shift, half-word, saturated */
-r3.h = ashift r0.h by r7.l(s) ;
-r3.l = ashift r0.l by r7.l (s) ;
-
-//Dreg = ASHIFT Dreg BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */
-r4 = ashift r2 by r7.l ; /* shift, word */
-r4 = ashift r2 by r7.l (s) ; /* shift, word, saturated */
-
-//A0 = ASHIFT A0 BY Dreg_lo ; /* arithmetic right shift (b)*/
-A0 = ashift A0 by r7.l ; /* shift, Accumulator */
-
-//A1 = ASHIFT A1 BY Dreg_lo ; /* arithmetic right shift (b)*/
-A1 = ashift A1 by r7.l ; /* shift, Accumulator */
-
-p3 = p2 >> 1 ; /* pointer right shift by 1 */
-p3 = p3 >> 2 ; /* pointer right shift by 2 */
-p4 = p5 << 1 ; /* pointer left shift by 1 */
-p0 = p1 << 2 ; /* pointer left shift by 2 */
-r3 >>= 17 ; /* data right shift */
-r3 <<= 17 ; /* data left shift */
-r3.l = r0.l >> 4 ; /* data right shift, half-word register */
-r3.l = r0.h >> 4 ; /* same as above; half-word register combinations are arbitrary */
-r3.h = r0.l << 12 ; /* data left shift, half-word register */
-r3.h = r0.h << 14 ; /* same as above; half-word register combinations are arbitrary */
-
-r3 = r6 >> 4 ; /* right shift, 32-bit word */
-r3 = r6 << 4 ; /* left shift, 32-bit word */
-
-a0 = a0 >> 7 ; /* Accumulator right shift */
-a1 = a1 >> 25 ; /* Accumulator right shift */
-a0 = a0 << 7 ; /* Accumulator left shift */
-a1 = a1 << 14 ; /* Accumulator left shift */
-
-r3 >>= r0 ; /* data right shift */
-r3 <<= r1 ; /* data left shift */
-
-r3.l = lshift r0.l by r2.l ; /* shift direction controlled by sign of R2.L */
-r3.h = lshift r0.l by r2.l ;
-
-a0 = lshift a0 by r7.l ;
-a1 = lshift a1 by r7.l ;
-
-r4 = rot r1 by 31 ; /* rotate left */
-r4 = rot r1 by -32 ; /* rotate right */
-r4 = rot r1 by 5 ; /* rotate right */
-
-a0 = rot a0 by 22 ; /* rotate Accumulator left */
-a0 = rot a0 by -32 ; /* rotate Accumulator left */
-a0 = rot a0 by 31 ; /* rotate Accumulator left */
-
-a1 = rot a1 by -32 ; /* rotate Accumulator right */
-a1 = rot a1 by 31 ; /* rotate Accumulator right */
-a1 = rot a1 by 22 ; /* rotate Accumulator right */
-
-r4 = rot r1 by r2.l ;
-a0 = rot a0 by r3.l ;
-a1 = rot a1 by r7.l ;
-
-r0.l = r1.l << 0;
-r0.l = r1.l << 1;
-r0.l = r1.l << 2;
-r0.l = r1.l << 4;
-r0.l = r1.l >> 0;
-r0.l = r1.l >> 1;
-r0.l = r1.l >> 2;
-r0.l = r1.l >> 4;
-r0.l = r1.l >>> 1;
-r0.l = r1.l >>> 2;
-r0.l = r1.l >>> 4;
-
-r0.l = r1.h << 0;
-r0.l = r1.h << 1;
-r0.l = r1.h << 2;
-r0.l = r1.h << 4;
-r0.l = r1.h >> 0;
-r0.l = r1.h >> 1;
-r0.l = r1.h >> 2;
-r0.l = r1.h >> 4;
-r0.l = r1.h >>> 1;
-r0.l = r1.h >>> 2;
-r0.l = r1.h >>> 4;
-
-r0.l = r1.h << 0 (S);
-r0.l = r1.h << 1 (S);
-r0.l = r1.h << 2 (S);
-r0.l = r1.h << 4 (S);
-r0.l = r1.h >>> 1 (S);
-r0.l = r1.h >>> 2 (S);
-r0.l = r1.h >>> 4 (S);
-
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/stack.d b/binutils-2.17/gas/testsuite/gas/bfin/stack.d deleted file mode 100644 index fd067548..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/stack.d +++ /dev/null @@ -1,42 +0,0 @@ -#objdump: -dr -#name: stack -.*: +file format .* -Disassembly of section .text: - -00000000 <push>: - 0: 7a 01 \[--SP\] = SYSCFG; - 2: 70 01 \[--SP\] = LC0; - 4: 47 01 \[--SP\] = R7; - 6: 61 01 \[--SP\] = A0.w; - 8: 76 01 \[--SP\] = CYCLES; - a: 5a 01 \[--SP\] = B2; - c: 55 01 \[--SP\] = M1; - e: 48 01 \[--SP\] = P0; - -00000010 <push_multiple>: - 10: d0 05 \[--SP\] = \(R7:2, P5:0\); - 12: 70 05 \[--SP\] = \(R7:6\); - 14: c2 04 \[--SP\] = \(P5:2\); - -00000016 <pop>: - 16: 38 01 USP = \[SP\+\+\]; - 18: 3b 01 RETI = \[SP\+\+\]; - 1a: 10 01 I0 = \[SP\+\+\]; - 1c: 39 01 SEQSTAT = \[SP\+\+\]; - 1e: 1e 01 L2 = \[SP\+\+\]; - 20: 35 90 R5=\[SP\+\+\]; - 22: 77 90 FP=\[SP\+\+\]; - -00000024 <pop_multiple>: - 24: a8 05 \(R7:5, P5:0\) = \[SP\+\+\]; - 26: 30 05 \(R7:6\) = \[SP\+\+\]; - 28: 84 04 \(P5:4\) = \[SP\+\+\]; - -0000002a <link>: - 2a: 00 e8 02 00 LINK 0x8; - 2e: 00 e8 ff ff LINK 0x3fffc; - 32: 00 e8 01 80 LINK 0x20004; - -00000036 <unlink>: - 36: 01 e8 00 00 UNLINK; - ... diff --git a/binutils-2.17/gas/testsuite/gas/bfin/stack.s b/binutils-2.17/gas/testsuite/gas/bfin/stack.s deleted file mode 100644 index 9826beff..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/stack.s +++ /dev/null @@ -1,49 +0,0 @@ - .text - .global push -push: - [--Sp] = syscfg; - [--SP] = Lc0; - [--sp] = R7; - [--sp] = A0.W; - [--sP] = Cycles; - [--Sp] = b2; - [--sp] = m1; - [--SP] = P0; - - .text - .global push_multiple -push_multiple: - [--sp] = (r7:2, p5:0); - [--SP] = (R7:6); - [--Sp] = (p5:2); - - .text - .global pop -pop: - usp = [ Sp++]; - Reti = [sp++]; - i0 = [sp++]; - Seqstat = [sp++]; - L2 = [sp++]; - R5 = [SP ++ ]; - Fp = [Sp ++]; - - .text - .global pop_multiple -pop_multiple: - (R7:5, P5:0) = [sp++]; - (r7:6) = [SP++]; - (P5:4) = [Sp++]; - - .text - .global link -link: - link 8; - link 0x3fffc; - link 0x20004; - - .text - .global unlink -unlink: - unlink; - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/stack2.d b/binutils-2.17/gas/testsuite/gas/bfin/stack2.d deleted file mode 100644 index 42a4b6d6..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/stack2.d +++ /dev/null @@ -1,83 +0,0 @@ -#objdump: -dr -#name: stack2 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 40 01 \[--SP\] = R0; - 2: 46 01 \[--SP\] = R6; - 4: 48 01 \[--SP\] = P0; - 6: 4c 01 \[--SP\] = P4; - 8: 50 01 \[--SP\] = I0; - a: 51 01 \[--SP\] = I1; - c: 54 01 \[--SP\] = M0; - e: 55 01 \[--SP\] = M1; - 10: 5c 01 \[--SP\] = L0; - 12: 5d 01 \[--SP\] = L1; - 14: 58 01 \[--SP\] = B0; - 16: 59 01 \[--SP\] = B1; - 18: 60 01 \[--SP\] = A0.x; - 1a: 62 01 \[--SP\] = A1.x; - 1c: 61 01 \[--SP\] = A0.w; - 1e: 63 01 \[--SP\] = A1.w; - 20: 66 01 \[--SP\] = ASTAT; - 22: 67 01 \[--SP\] = RETS; - 24: 7b 01 \[--SP\] = RETI; - 26: 7c 01 \[--SP\] = RETX; - 28: 7d 01 \[--SP\] = RETN; - 2a: 7e 01 \[--SP\] = RETE; - 2c: 70 01 \[--SP\] = LC0; - 2e: 73 01 \[--SP\] = LC1; - 30: 71 01 \[--SP\] = LT0; - 32: 74 01 \[--SP\] = LT1; - 34: 72 01 \[--SP\] = LB0; - 36: 75 01 \[--SP\] = LB1; - 38: 76 01 \[--SP\] = CYCLES; - 3a: 77 01 \[--SP\] = CYCLES2; - 3c: 78 01 \[--SP\] = USP; - 3e: 79 01 \[--SP\] = SEQSTAT; - 40: 7a 01 \[--SP\] = SYSCFG; - 42: c0 05 \[--SP\] = \(R7:0, P5:0\); - 44: 40 05 \[--SP\] = \(R7:0\); - 46: c0 04 \[--SP\] = \(P5:0\); - 48: 30 90 R0=\[SP\+\+\]; - 4a: 36 90 R6=\[SP\+\+\]; - 4c: 70 90 P0=\[SP\+\+\]; - 4e: 74 90 P4=\[SP\+\+\]; - 50: 10 01 I0 = \[SP\+\+\]; - 52: 11 01 I1 = \[SP\+\+\]; - 54: 14 01 M0 = \[SP\+\+\]; - 56: 15 01 M1 = \[SP\+\+\]; - 58: 1c 01 L0 = \[SP\+\+\]; - 5a: 1d 01 L1 = \[SP\+\+\]; - 5c: 18 01 B0 = \[SP\+\+\]; - 5e: 19 01 B1 = \[SP\+\+\]; - 60: 20 01 A0.x = \[SP\+\+\]; - 62: 22 01 A1.x = \[SP\+\+\]; - 64: 21 01 A0.w = \[SP\+\+\]; - 66: 23 01 A1.w = \[SP\+\+\]; - 68: 26 01 ASTAT = \[SP\+\+\]; - 6a: 27 01 RETS = \[SP\+\+\]; - 6c: 3b 01 RETI = \[SP\+\+\]; - 6e: 3c 01 RETX = \[SP\+\+\]; - 70: 3d 01 RETN = \[SP\+\+\]; - 72: 3e 01 RETE = \[SP\+\+\]; - 74: 30 01 LC0 = \[SP\+\+\]; - 76: 33 01 LC1 = \[SP\+\+\]; - 78: 31 01 LT0 = \[SP\+\+\]; - 7a: 34 01 LT1 = \[SP\+\+\]; - 7c: 32 01 LB0 = \[SP\+\+\]; - 7e: 35 01 LB1 = \[SP\+\+\]; - 80: 36 01 CYCLES = \[SP\+\+\]; - 82: 37 01 CYCLES2 = \[SP\+\+\]; - 84: 38 01 USP = \[SP\+\+\]; - 86: 39 01 SEQSTAT = \[SP\+\+\]; - 88: 3a 01 SYSCFG = \[SP\+\+\]; - 8a: 80 05 \(R7:0, P5:0\) = \[SP\+\+\]; - 8c: 00 05 \(R7:0\) = \[SP\+\+\]; - 8e: 80 04 \(P5:0\) = \[SP\+\+\]; - 90: 00 e8 00 00 LINK 0x0; - 94: 00 e8 02 00 LINK 0x8; - 98: 00 e8 ff ff LINK 0x3fffc; - 9c: 01 e8 00 00 UNLINK; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/stack2.s b/binutils-2.17/gas/testsuite/gas/bfin/stack2.s deleted file mode 100755 index 5d7f2c23..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/stack2.s +++ /dev/null @@ -1,125 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//5 STACK CONTROL
-//
-
-//[ -- SP ] = allreg ; /* predecrement SP (a) */
-
-[--SP ] = R0;
-[--SP ] = R6;
-
-[--SP ] = P0;
-[--SP ] = P4;
-
-[--SP ] = I0;
-[--SP ] = I1;
-
-[--SP ] = M0;
-[--SP ] = M1;
-
-[--SP ] = L0;
-[--SP ] = L1;
-
-[--SP ] = B0;
-[--SP ] = B1;
-
-[--SP ] = A0.X;
-[--SP ] = A1.X;
-
-[--SP ] = A0.W;
-[--SP ] = A1.W;
-
-[--SP ] = ASTAT;
-[--SP ] = RETS;
-[--SP ] = RETI;
-[--SP ] = RETX;
-[--SP ] = RETN;
-[--SP ] = RETE;
-[--SP ] = LC0;
-[--SP ] = LC1;
-[--SP ] = LT0;
-[--SP ] = LT1;
-[--SP ] = LB0;
-[--SP ] = LB1;
-[--SP ] = CYCLES;
-[--SP ] = CYCLES2;
-//[--SP ] = EMUDAT;
-[--SP ] = USP;
-[--SP ] = SEQSTAT;
-[--SP ] = SYSCFG;
-
-
-//[ -- SP ] = ( R7 : Dreglim , P5 : Preglim ) ; /* Dregs and indexed Pregs (a) */
-[--SP ] = ( R7:0, P5:0);
-
-
-//[ -- SP ] = ( R7 : Dreglim ) ; /* Dregs, only (a) */
-[--SP ] = ( R7:0);
-
-//[ -- SP ] = ( P5 : Preglim ) ; /* indexed Pregs, only (a) */
-[--SP ] = (P5:0);
-
-
-//mostreg = [ SP ++ ] ; /* post-increment SP; does not apply to Data Registers and Pointer Registers (a) */
-
-R0= [ SP ++ ] ;
-R6= [ SP ++ ] ;
-
-P0= [ SP ++ ] ;
-P4= [ SP ++ ] ;
-
-I0= [ SP ++ ] ;
-I1= [ SP ++ ] ;
-
-M0= [ SP ++ ] ;
-M1= [ SP ++ ] ;
-
-L0= [ SP ++ ] ;
-L1= [ SP ++ ] ;
-
-B0= [ SP ++ ] ;
-B1= [ SP ++ ] ;
-
-A0.X= [ SP ++ ] ;
-A1.X= [ SP ++ ] ;
-
-A0.W= [ SP ++ ] ;
-A1.W= [ SP ++ ] ;
-
-ASTAT= [ SP ++ ] ;
-RETS= [ SP ++ ] ;
-RETI= [ SP ++ ] ;
-RETX= [ SP ++ ] ;
-RETN= [ SP ++ ] ;
-RETE= [ SP ++ ] ;
-LC0= [ SP ++ ] ;
-LC1= [ SP ++ ] ;
-LT0= [ SP ++ ] ;
-LT1= [ SP ++ ] ;
-LB0= [ SP ++ ] ;
-LB1= [ SP ++ ] ;
-CYCLES= [ SP ++ ] ;
-CYCLES2= [ SP ++ ] ;
-//EMUDAT= [ SP ++ ] ;
-USP= [ SP ++ ] ;
-SEQSTAT= [ SP ++ ] ;
-SYSCFG= [ SP ++ ] ;
-
-//( R7 : Dreglim, P5 : Preglim ) = [ SP ++ ] ; /* Dregs and indexed Pregs (a) */
-( R7:0, P5:0) = [ SP++ ];
-
-//( R7 : Dreglim ) = [ SP ++ ] ; /* Dregs, only (a) */
-( R7:0) = [ SP++ ];
-
-//( P5 : Preglim ) = [ SP ++ ] ; /* indexed Pregs, only (a) */
-( P5:0) = [ SP++ ];
-
-//LINK uimm18m4 ; /* allocate a stack frame of specified size (b) */
-LINK 0X0;
-LINK 0X8;
-LINK 0x3FFFC;
-
-UNLINK ; /* de-allocate the stack frame (b)*/
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/store.d b/binutils-2.17/gas/testsuite/gas/bfin/store.d deleted file mode 100644 index 0e553c17..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/store.d +++ /dev/null @@ -1,55 +0,0 @@ -#objdump: -dr -#name: store -.*: +file format .* -Disassembly of section .text: - -00000000 <store_pointer_register>: - 0: 78 93 \[FP\]=P0; - 2: 71 92 \[SP\+\+\]=P1; - 4: fd 92 \[FP--\]=P5; - 6: d6 bf \[P2\+0x3c\]=SP; - 8: 28 e7 ff 7f \[P5\+0x1fffc\]=P0; - c: 3a bc \[FP\+0x0\]=P2; - e: f9 bb \[FP-4\]=P1; - 10: 08 ba \[FP-128\]=P0; - -00000012 <store_data_register>: - 12: 10 93 \[P2\]=R0; - 14: 2a 92 \[P5\+\+\]=R2; - 16: bf 92 \[FP--\]=R7; - 18: b5 b3 \[SP\+0x38\]=R5; - 1a: 33 e6 fc 3b \[SP\+0xeff0\]=R3; - 1e: 38 e6 01 c0 \[FP\+-65532\]=R0; - 22: 4f 88 \[FP\+\+P1\]=R1; - 24: 86 ba \[FP-96\]=R6; - 26: 01 9f \[I0\]=R1; - 28: 12 9e \[I2\+\+\]=R2; - 2a: 9c 9e \[I3--\]=R4; - 2c: 8f 9f \[I1\+\+M0\]=R7; - -0000002e <store_data_register_half>: - 2e: 5c 9f W\[I3\]=R4.H; - 30: 40 9e W\[I0\+\+\]=R0.H; - 32: d7 9e W\[I2--\]=R7.H; - 34: b6 8d W\[SP\]=R6.H; - 36: 07 8d W\[FP\+\+P0\]=R4.H; - -00000038 <store_low_data_register_half>: - 38: 20 9f W\[I0\]=R0.L; - 3a: 2f 9e W\[I1\+\+\]=R7.L; - 3c: b1 9e W\[I2--\]=R1.L; - 3e: b6 8a W\[SP\]=R2.L; - 40: 13 97 W\[P2\]=R3; - 42: 1d 96 W\[P3\+\+\]=R5; - 44: bc 96 W\[FP--\]=R4; - 46: cf b7 W\[P1\+0x1e\]=R7; - 48: 56 e6 ff 7f W\[P2\+0xfffe\]=R6; - 4c: 79 e6 98 a1 W\[FP\+-48336\]=R1; - 50: 56 8b W\[SP\+\+P2\]=R5.L; - -00000052 <store_byte>: - 52: 39 9b B\[FP\]=R1; - 54: 00 9a B\[P0\+\+\]=R0; - 56: ba 9a B\[FP--\]=R2; - 58: 97 e6 19 00 B\[P2\+0x19\]=R7; - 5c: be e6 01 80 B\[FP\+-32767\]=R6; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/store.s b/binutils-2.17/gas/testsuite/gas/bfin/store.s deleted file mode 100644 index 05abe8eb..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/store.s +++ /dev/null @@ -1,61 +0,0 @@ - .text - .global store_pointer_register -store_pointer_register: - [FP] = P0; - [Sp ++] = p1; - [fp --] = P5; - [p2 + 60] = Sp; - [P5 + 131068] = P0; - [Fp -0]= p2; - [fp -4] = P1; - [Fp - 128] = p0; - - .text - .global store_data_register -store_data_register: - [p2] = r0; - [P5 ++] = R2; - [fp--] = R7; - [SP + 56] = R5; - [sp+0xeff0]=R3; - [FP - 0xfffc] = R0; - [fp ++ P1] = r1; - [FP - 96] = r6; - - [i0] = r1; - [I2++] = R2; - [i3--] = R4; - [i1 ++ m0] = r7; - - .text - .global store_data_register_half -store_data_register_half: - w [ i3] = R4.h; - W[I0++] = r0.h; - W [ i2--] = r7.H; - w[Sp] = R6.h; - W [ Fp++P0] = r4.h; - - .text - .global store_low_data_register_half -store_low_data_register_half: - W [I0] = r0.l; - w [i1++] = r7.L; - W[I2--] = R1.l; - w [SP] = r2.l; - W[P2] = r3; - w [p3 ++ ] = R5; - W [fp--] = R4; - W [P1+30]=r7; - w[p2+0xfffe] = R6; - w [FP-0xbcd0] = r1; - W [sp ++ P2] = r5.L; - - .text - .global store_byte -store_byte: - b [Fp] = R1; - B[P0++] = r0; - B [fp --] = r2; - B [ p2 + 25] = R7; - b[FP - 0x7FFF] = r6; diff --git a/binutils-2.17/gas/testsuite/gas/bfin/vector.d b/binutils-2.17/gas/testsuite/gas/bfin/vector.d deleted file mode 100644 index fd8bd0a3..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/vector.d +++ /dev/null @@ -1,105 +0,0 @@ -#objdump: -dr -#name: vector -.*: +file format .* - -Disassembly of section .text: - -00000000 <add_on_sign>: - 0: 0c c4 0d 08 R4.H=R4.L=SIGN\(R1.H\)\*R5.H\+SIGN\(R1.L\)\*R5.L\); - -00000004 <vit_max>: - 4: 09 c6 15 8e R7=VIT_MAX\(R5,R2\)\(ASL\); - 8: 09 c6 30 c0 R0=VIT_MAX\(R0,R6\)\(ASR\); - c: 09 c6 03 0a R5.L=VIT_MAX \(R3\) \(ASL\); - 10: 09 c6 02 44 R2.L=VIT_MAX \(R2\) \(ASR\); - -00000014 <vector_abs>: - 14: 06 c4 28 8a R5= ABS R5\(V\); - 18: 06 c4 00 84 R2= ABS R0\(V\); - -0000001c <vector_add_sub>: - 1c: 00 c4 1a 0a R5=R3\+\|\+R2 ; - 20: 00 c4 1a 3a R5=R3\+\|\+R2 \(SCO\); - 24: 00 c4 06 8e R7=R0-\|\+R6 ; - 28: 00 c4 0b a4 R2=R1-\|\+R3 \(S\); - 2c: 00 c4 02 48 R4=R0\+\|-R2 ; - 30: 00 c4 0a 5a R5=R1\+\|-R2 \(CO\); - 34: 00 c4 1c cc R6=R3-\|-R4 ; - 38: 00 c4 2e de R7=R5-\|-R6 \(CO\); - 3c: 01 c4 63 bf R5=R4\+\|\+R3,R7=R4-\|-R3\(SCO,ASR\); - 40: 01 c4 1e c2 R0=R3\+\|\+R6,R1=R3-\|-R6\(ASL\); - 44: 21 c4 ca 2d R7=R1\+\|-R2,R6=R1-\|\+R2\(S\); - 48: 21 c4 53 0a R1=R2\+\|-R3,R5=R2-\|\+R3; - 4c: 04 c4 41 8d R5=R0\+R1,R6=R0-R1 \(NS\); - 50: 04 c4 39 a6 R0=R7\+R1,R3=R7-R1 \(S\); - 54: 11 c4 [c-f][[:xdigit:]] 0b R7=A1\+A0,R5=A1-A0 \(NS\); - 58: 11 c4 [c-f][[:xdigit:]] 6c R3=A0\+A1,R6=A0-A1 \(S\); - -0000005c <vector_ashift>: - 5c: 81 c6 8b 03 R1=R3>>>0xf \(V\); - 60: 81 c6 e0 09 R4=R0>>>0x4 \(V\); - 64: 81 c6 00 4a R5=R0<<0x0 \(V, S\); - 68: 81 c6 62 44 R2=R2<<0xc \(V, S\); - 6c: 01 c6 15 0e R7= ASHIFT R5 BY R2.L\(V\); - 70: 01 c6 02 40 R0= ASHIFT R2 BY R0.L\(V,S\); - -00000074 <vector_lshift>: - 74: 81 c6 8a 8b R5=R2 >> 0xf \(V\); - 78: 81 c6 11 80 R0=R1<<0x2 \(V\); - 7c: 01 c6 11 88 R4=SHIFT R1 BY R2.L\(V\); - -00000080 <vector_max>: - 80: 06 c4 01 0c R6=MAX\(R0,R1\)\(V\); - -00000084 <vector_min>: - 84: 06 c4 17 40 R0=MIN\(R2,R7\)\(V\); - -00000088 <vector_mul>: - 88: 04 c2 be 66 R2.H = R7.L \* R6.H, R2 = R7.H \* R6.H; - 8c: 04 c2 08 e1 R4.H = R1.H \* R0.H, R4 = R1.L \* R0.L; - 90: 04 c2 1a a0 R0.H = R3.H \* R2.L, R0 = R3.L \* R2.L; - 94: 94 c2 5a e1 R5.H = R3.H \* R2.H \(M\), R5 = R3.L \* R2.L \(FU\); - 98: 2c c2 27 e0 R1 = R4.H \* R7.H, R0 = R4.L \* R7.L \(S2RND\); - 9c: 0c c2 95 27 R7 = R2.L \* R5.L, R6 = R2.H \* R5.H; - a0: 24 c3 3e e0 R0.H = R7.H \* R6.H, R0 = R7.L \* R6.L \(ISS2\); - a4: 04 c3 c1 e0 R3.H = R0.H \* R1.H, R3 = R0.L \* R1.L \(IS\); - a8: 00 c0 13 46 a1 = R2.L \* R3.H, a0 = R2.H \* R3.H; - ac: 01 c0 08 c0 a1 \+= R1.H \* R0.H, a0 = R1.L \* R0.L; - b0: 60 c0 2f c8 a1 = R5.H \* R7.H, a0 \+= R5.L \* R7.L \(W32\); - b4: 01 c1 01 c0 a1 \+= R0.H \* R1.H, a0 = R0.L \* R1.L \(IS\); - b8: 90 c0 1c c8 a1 = R3.H \* R4.H \(M\), a0 \+= R3.L \* R4.L \(FU\); - bc: 01 c0 24 96 a1 \+= R4.H \* R4.L, a0 -= R4.H \* R4.H; - c0: 25 c1 3e e8 R0.H = \(a1 \+= R7.H \* R6.H\), R0.L = \(a0 \+= R7.L \* R6.L\) \(ISS2\); - c4: 27 c0 81 28 R2.H = A1, R2.L = \(a0 \+= R0.L \* R1.L\) \(S2RND\); - c8: 04 c0 d1 c9 R7.H = \(a1 = R2.H \* R1.H\), a0 \+= R2.L \* R1.L; - cc: 04 c0 be 66 R2.H = \(a1 = R7.L \* R6.H\), R2.L = \(a0 = R7.H \* R6.H\); - d0: 05 c0 9a e1 R6.H = \(a1 \+= R3.H \* R2.H\), R6.L = \(a0 = R3.L \* R2.L\); - d4: 05 c0 f5 a7 R7.H = \(a1 \+= R6.H \* R5.L\), R7.L = \(a0 = R6.H \* R5.H\); - d8: 14 c0 3c a8 R0.H = \(a1 = R7.H \* R4.L\) \(M\), R0.L = \(a0 \+= R7.L \* R4.L\); - dc: 94 c0 5a e9 R5.H = \(a1 = R3.H \* R2.H\) \(M\), R5.L = \(a0 \+= R3.L \* R2.L\) \(FU\); - e0: 05 c1 1a e0 R0.H = \(a1 \+= R3.H \* R2.H\), R0.L = \(a0 = R3.L \* R2.L\) \(IS\); - e4: 1c c0 b7 d0 R3 = \(a1 = R6.H \* R7.H\) \(M\), a0 -= R6.L \* R7.L; - e8: 1c c0 3c 2e R1 = \(a1 = R7.L \* R4.L\) \(M\), R0 = \(a0 \+= R7.H \* R4.H\); - ec: 2d c1 3e e8 R1 = \(a1 \+= R7.H \* R6.H\), R0 = \(a0 \+= R7.L \* R6.L\) \(ISS2\); - f0: 0d c0 37 e1 R5 = \(a1 \+= R6.H \* R7.H\), R4 = \(a0 = R6.L \* R7.L\); - f4: 0d c0 9d f1 R7 = \(a1 \+= R3.H \* R5.H\), R6 = \(a0 -= R3.L \* R5.L\); - f8: 0e c0 37 c9 R5 = \(a1 -= R6.H \* R7.H\), a0 \+= R6.L \* R7.L; - fc: 0c c0 b7 e0 R3 = \(a1 = R6.H \* R7.H\), R2 = \(a0 = R6.L \* R7.L\); - 100: 9c c0 1f e9 R5 = \(a1 = R3.H \* R7.H\) \(M\), R4 = \(a0 \+= R3.L \* R7.L\) \(FU\); - 104: 2f c0 81 28 R3 = A1, R2 = \(a0 \+= R0.L \* R1.L\) \(S2RND\); - 108: 0d c1 1a e0 R1 = \(a1 \+= R3.H \* R2.H\), R0 = \(a0 = R3.L \* R2.L\) \(IS\); - -0000010c <vector_negate>: - 10c: 0f c4 08 c0 R0=-R1\(V\); - 110: 0f c4 10 ce R7=-R2\(V\); - -00000114 <vector_pack>: - 114: 04 c6 08 8e R7=PACK\(R0.H,R1.L\); - 118: 04 c6 31 cc R6=PACK\(R1.H,R6.H\); - 11c: 04 c6 12 4a R5=PACK\(R2.L,R2.H\); - -00000120 <vector_search>: - 120: 0d c4 10 82 \(R0,R1\) = SEARCH R2\(LT\); - 124: 0d c4 80 cf \(R6,R7\) = SEARCH R0\(LE\); - 128: 0d c4 c8 0c \(R3,R6\) = SEARCH R1\(GT\); - 12c: 0d c4 18 4b \(R4,R5\) = SEARCH R3\(GE\); diff --git a/binutils-2.17/gas/testsuite/gas/bfin/vector.s b/binutils-2.17/gas/testsuite/gas/bfin/vector.s deleted file mode 100644 index 670869a6..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/vector.s +++ /dev/null @@ -1,131 +0,0 @@ - .text - .global add_on_sign -add_on_sign: - r4.h = r4.l = Sign (R1.h) * R5.h + Sign(r1.L) * R5.L; - - .text - .global vit_max -vit_max: - R7 = Vit_Max (R5, r2) (ASL); - r0 = VIT_MAX (r0, r6) (asr); - r5.l = vit_max (R3) (asL); - r2.L = VIT_Max (r2) (Asr); - - .text - .global vector_abs -vector_abs: - R5 = ABS R5 (V); - r2 = abs r0 (v); - - .text - .global vector_add_sub -vector_add_sub: - R5 = r3 +|+ R2; - r5 = r3 +|+ r2 (Sco); - r7 = R0 -|+ r6; - r2 = R1 -|+ R3 (S); - R4 = R0 +|- R2; - R5 = r1 +|- r2 (CO); - r6 = r3 -|- R4; - r7 = R5 -|- R6 (co); - - r5 = r4 +|+ r3, R7 = r4 -|- r3 (Sco, ASR); - R0 = R3 +|+ r6, R1 = R3 -|- R6 (ASL); - R7 = R1 +|- R2, R6 = R1 -|+ R2 (S); - r1 = r2 +|- r3, r5 = r2 -|+ r3; - - R5 = R0 + R1, R6 = R0 - R1; - r0 = r7 + r1, r3 = r7 - r1 (s); - - r7 = A1 + A0, r5 = A1 - A0; - r3 = a0 + a1, r6 = a0 - a1 (s); - - .text - .global vector_ashift -vector_ashift: - R1 = R3 >>> 15 (V); - r4 = r0 >>> 4 (v); - r5 = r0 << 0 (v,s); - r2 = r2 << 12 (v, S); - - R7 = ASHIFT R5 BY R2.L (V); - r0 = Ashift r2 by r0.L (v, s); - - .text - .global vector_lshift -vector_lshift: - R5 = r2 >> 15 (V); - r0 = R1 << 2 (v); - - R4 = lshift r1 by r2.L (v); - - .text - .global vector_max -vector_max: - R6 = MAX (R0, R1) (V); - - .text - .global vector_min -vector_min: - r0 = min (r2, r7) (v); - - .text - .global vector_mul -vector_mul: - r2.h = r7.l * r6.h, r2.l = r7.h * r6.h; - R4.L = R1.L * R0.L, R4.H = R1.H * R0.H; - R0.h = R3.H * r2.l, r0.l=r3.l * r2.l; - r5.h = r3.h * r2.h (M), r5.l = r3.L * r2.L (fu); - R0 = r4.l * r7.l, r1 = r4.h * r7.h (s2rnd); - R7 = R2.l * r5.l, r6 = r2.h * r5.h; - R0.L = R7.L * R6.L, R0.H = R7.H * R6.H (ISS2); - r3.h = r0.h * r1.h, r3.l = r0.l * r1.l (is); - - a1 = r2.l * r3.h, a0 = r2.h * R3.H; - A0 = R1.l * R0.L, A1 += R1.h * R0.h; - A1 = R5.h * R7.H, A0 += r5.L * r7.l (w32); - a1 += r0.H * r1.H, A0 = R0.L * R1.l (is); - a1 = r3.h * r4.h (m), a0 += r3.l * R4.L (FU); - A1 += r4.H * R4.L, a0 -= r4.h * r4.h; - - r0.l = (a0 += R7.l * R6.L), R0.H = (A1 += R7.H * R6.H) (Iss2); - r2.H = A1, r2.l = (a0 += r0.L * r1.L) (s2rnd); - r7.h = (a1 = r2.h * r1.h), a0 += r2.l * r1.l; - R2.H = (A1 = R7.L * R6.H), R2.L = (A0 = R7.H * R6.h); - r6.L = (A0 = R3.L * r2.L), R6.H = (A1 += R3.H * R2.H); - R7.h = (a1 += r6.h * r5.l), r7.l = (a0=r6.h * r5.h); - r0.h = (A1 = r7.h * R4.l) (M), R0.l = (a0 += r7.l * r4.l); - R5.H = (a1 = r3.h * r2.h) (m), r5.l= (a0 += r3.l * r2.l) (fu); - r0.h = (A1 += R3.h * R2.h), R0.L = ( A0 = R3.L * R2.L) (is); - - R3 = (A1 = R6.H * R7.H) (M), A0 -= R6.L * R7.L; - r1 = (a1 = r7.l * r4.l) (m), r0 = (a0 += r7.h * r4.h); - R0 = (a0 += r7.l * r6.l), r1 = (a1+= r7.h * r6.h) (ISS2); - r4 = (a0 = r6.l * r7.l), r5 = (a1 += r6.h * r7.h); - R7 = (A1 += r3.h * r5.H), R6 = (A0 -= r3.l * r5.l); - r5 = (a1 -= r6.h * r7.h), a0 += r6.l * r7.l; - R3 = (A1 = r6.h * R7.h), R2 = (A0 = R6.l * r7.l); - R5 = (A1 = r3.h * r7.h) (M), r4 = (A0 += R3.l * r7.l) (fu); - R3 = a1, r2 = (a0 += r0.l *r1.l) (s2rnd); - r1 = (a1 += r3.h * r2.h), r0 = (a0 = r3.l * r2.l) (is); - - .text - .global vector_negate -vector_negate: - R0 = - R1 (V); - r7 = - r2 (v); - - .text - .global vector_pack -vector_pack: - R7 = Pack (r0.h, r1.l); - r6 = PACK (r1.H, r6.H); - R5 = pack (R2.L, R2.H); - - .text - .global vector_search -vector_search: - (R0, R1) = search R2 (lt); - (r6, r7) = Search r0 (LE); - (r3, r6) = SEARCH r1 (Gt); - (r4, R5) = sEARch r3 (gE); diff --git a/binutils-2.17/gas/testsuite/gas/bfin/vector2.d b/binutils-2.17/gas/testsuite/gas/bfin/vector2.d deleted file mode 100644 index 57f3a91e..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/vector2.d +++ /dev/null @@ -1,471 +0,0 @@ -#objdump: -dr -#name: vector2 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 0c c4 13 0e R7.H=R7.L=SIGN\(R2.H\)\*R3.H\+SIGN\(R2.L\)\*R3.L\); - 4: 0c c4 0a 00 R0.H=R0.L=SIGN\(R1.H\)\*R2.H\+SIGN\(R1.L\)\*R2.L\); - 8: 0c c4 25 06 R3.H=R3.L=SIGN\(R4.H\)\*R5.H\+SIGN\(R4.L\)\*R5.L\); - c: 0c c4 38 0c R6.H=R6.L=SIGN\(R7.H\)\*R0.H\+SIGN\(R7.L\)\*R0.L\); - 10: 0c c4 13 02 R1.H=R1.L=SIGN\(R2.H\)\*R3.H\+SIGN\(R2.L\)\*R3.L\); - 14: 0c c4 2e 08 R4.H=R4.L=SIGN\(R5.H\)\*R6.H\+SIGN\(R5.L\)\*R6.L\); - 18: 0c c4 01 0e R7.H=R7.L=SIGN\(R0.H\)\*R1.H\+SIGN\(R0.L\)\*R1.L\); - 1c: 0c c4 1c 04 R2.H=R2.L=SIGN\(R3.H\)\*R4.H\+SIGN\(R3.L\)\*R4.L\); - 20: 09 c6 13 8a R5=VIT_MAX\(R3,R2\)\(ASL\); - 24: 09 c6 01 ce R7=VIT_MAX\(R1,R0\)\(ASR\); - 28: 09 c6 11 80 R0=VIT_MAX\(R1,R2\)\(ASL\); - 2c: 09 c6 2c c6 R3=VIT_MAX\(R4,R5\)\(ASR\); - 30: 09 c6 07 8c R6=VIT_MAX\(R7,R0\)\(ASL\); - 34: 09 c6 1a c2 R1=VIT_MAX\(R2,R3\)\(ASR\); - 38: 09 c6 35 88 R4=VIT_MAX\(R5,R6\)\(ASL\); - 3c: 09 c6 08 ce R7=VIT_MAX\(R0,R1\)\(ASR\); - 40: 09 c6 23 84 R2=VIT_MAX\(R3,R4\)\(ASL\); - 44: 09 c6 3e ca R5=VIT_MAX\(R6,R7\)\(ASR\); - 48: 09 c6 01 06 R3.L=VIT_MAX \(R1\) \(ASL\); - 4c: 09 c6 01 46 R3.L=VIT_MAX \(R1\) \(ASR\); - 50: 09 c6 01 00 R0.L=VIT_MAX \(R1\) \(ASL\); - 54: 09 c6 03 44 R2.L=VIT_MAX \(R3\) \(ASR\); - 58: 09 c6 05 08 R4.L=VIT_MAX \(R5\) \(ASL\); - 5c: 09 c6 07 4c R6.L=VIT_MAX \(R7\) \(ASR\); - 60: 09 c6 02 02 R1.L=VIT_MAX \(R2\) \(ASL\); - 64: 09 c6 04 46 R3.L=VIT_MAX \(R4\) \(ASR\); - 68: 09 c6 06 0a R5.L=VIT_MAX \(R6\) \(ASL\); - 6c: 09 c6 00 4e R7.L=VIT_MAX \(R0\) \(ASR\); - 70: 06 c4 08 86 R3= ABS R1\(V\); - 74: 06 c4 00 80 R0= ABS R0\(V\); - 78: 06 c4 08 80 R0= ABS R1\(V\); - 7c: 06 c4 18 84 R2= ABS R3\(V\); - 80: 06 c4 28 88 R4= ABS R5\(V\); - 84: 06 c4 38 8c R6= ABS R7\(V\); - 88: 06 c4 00 82 R1= ABS R0\(V\); - 8c: 06 c4 10 86 R3= ABS R2\(V\); - 90: 06 c4 20 8a R5= ABS R4\(V\); - 94: 06 c4 30 8e R7= ABS R6\(V\); - 98: 00 c4 1c 0a R5=R3\+\|\+R4 ; - 9c: 00 c4 0a 00 R0=R1\+\|\+R2 ; - a0: 00 c4 25 06 R3=R4\+\|\+R5 ; - a4: 00 c4 38 0c R6=R7\+\|\+R0 ; - a8: 00 c4 13 02 R1=R2\+\|\+R3 ; - ac: 00 c4 1d 08 R4=R3\+\|\+R5 ; - b0: 00 c4 1f 0c R6=R3\+\|\+R7 ; - b4: 00 c4 0a 20 R0=R1\+\|\+R2 \(S\); - b8: 00 c4 25 26 R3=R4\+\|\+R5 \(S\); - bc: 00 c4 38 2c R6=R7\+\|\+R0 \(S\); - c0: 00 c4 13 22 R1=R2\+\|\+R3 \(S\); - c4: 00 c4 1d 28 R4=R3\+\|\+R5 \(S\); - c8: 00 c4 1f 2c R6=R3\+\|\+R7 \(S\); - cc: 00 c4 0a 10 R0=R1\+\|\+R2 \(CO\); - d0: 00 c4 25 16 R3=R4\+\|\+R5 \(CO\); - d4: 00 c4 38 1c R6=R7\+\|\+R0 \(CO\); - d8: 00 c4 13 12 R1=R2\+\|\+R3 \(CO\); - dc: 00 c4 1d 18 R4=R3\+\|\+R5 \(CO\); - e0: 00 c4 1f 1c R6=R3\+\|\+R7 \(CO\); - e4: 00 c4 0a 30 R0=R1\+\|\+R2 \(SCO\); - e8: 00 c4 25 36 R3=R4\+\|\+R5 \(SCO\); - ec: 00 c4 38 3c R6=R7\+\|\+R0 \(SCO\); - f0: 00 c4 13 32 R1=R2\+\|\+R3 \(SCO\); - f4: 00 c4 1d 38 R4=R3\+\|\+R5 \(SCO\); - f8: 00 c4 1f 3c R6=R3\+\|\+R7 \(SCO\); - fc: 00 c4 01 ac R6=R0-\|\+R1 \(S\); - 100: 00 c4 0a 80 R0=R1-\|\+R2 ; - 104: 00 c4 25 86 R3=R4-\|\+R5 ; - 108: 00 c4 38 8c R6=R7-\|\+R0 ; - 10c: 00 c4 13 82 R1=R2-\|\+R3 ; - 110: 00 c4 1d 88 R4=R3-\|\+R5 ; - 114: 00 c4 1f 8c R6=R3-\|\+R7 ; - 118: 00 c4 0a a0 R0=R1-\|\+R2 \(S\); - 11c: 00 c4 25 a6 R3=R4-\|\+R5 \(S\); - 120: 00 c4 38 ac R6=R7-\|\+R0 \(S\); - 124: 00 c4 13 a2 R1=R2-\|\+R3 \(S\); - 128: 00 c4 1d a8 R4=R3-\|\+R5 \(S\); - 12c: 00 c4 1f ac R6=R3-\|\+R7 \(S\); - 130: 00 c4 0a 90 R0=R1-\|\+R2 \(CO\); - 134: 00 c4 25 96 R3=R4-\|\+R5 \(CO\); - 138: 00 c4 38 9c R6=R7-\|\+R0 \(CO\); - 13c: 00 c4 13 92 R1=R2-\|\+R3 \(CO\); - 140: 00 c4 1d 98 R4=R3-\|\+R5 \(CO\); - 144: 00 c4 1f 9c R6=R3-\|\+R7 \(CO\); - 148: 00 c4 0a b0 R0=R1-\|\+R2 \(SCO\); - 14c: 00 c4 25 b6 R3=R4-\|\+R5 \(SCO\); - 150: 00 c4 38 bc R6=R7-\|\+R0 \(SCO\); - 154: 00 c4 13 b2 R1=R2-\|\+R3 \(SCO\); - 158: 00 c4 1d b8 R4=R3-\|\+R5 \(SCO\); - 15c: 00 c4 1f bc R6=R3-\|\+R7 \(SCO\); - 160: 00 c4 11 50 R0=R2\+\|-R1 \(CO\); - 164: 00 c4 0a 40 R0=R1\+\|-R2 ; - 168: 00 c4 25 46 R3=R4\+\|-R5 ; - 16c: 00 c4 38 4c R6=R7\+\|-R0 ; - 170: 00 c4 13 42 R1=R2\+\|-R3 ; - 174: 00 c4 1d 48 R4=R3\+\|-R5 ; - 178: 00 c4 1f 4c R6=R3\+\|-R7 ; - 17c: 00 c4 0a 60 R0=R1\+\|-R2 \(S\); - 180: 00 c4 25 66 R3=R4\+\|-R5 \(S\); - 184: 00 c4 38 6c R6=R7\+\|-R0 \(S\); - 188: 00 c4 13 62 R1=R2\+\|-R3 \(S\); - 18c: 00 c4 1d 68 R4=R3\+\|-R5 \(S\); - 190: 00 c4 1f 6c R6=R3\+\|-R7 \(S\); - 194: 00 c4 0a 50 R0=R1\+\|-R2 \(CO\); - 198: 00 c4 25 56 R3=R4\+\|-R5 \(CO\); - 19c: 00 c4 38 5c R6=R7\+\|-R0 \(CO\); - 1a0: 00 c4 13 52 R1=R2\+\|-R3 \(CO\); - 1a4: 00 c4 1d 58 R4=R3\+\|-R5 \(CO\); - 1a8: 00 c4 1f 5c R6=R3\+\|-R7 \(CO\); - 1ac: 00 c4 0a 70 R0=R1\+\|-R2 \(SCO\); - 1b0: 00 c4 25 76 R3=R4\+\|-R5 \(SCO\); - 1b4: 00 c4 38 7c R6=R7\+\|-R0 \(SCO\); - 1b8: 00 c4 13 72 R1=R2\+\|-R3 \(SCO\); - 1bc: 00 c4 1d 78 R4=R3\+\|-R5 \(SCO\); - 1c0: 00 c4 1f 7c R6=R3\+\|-R7 \(SCO\); - 1c4: 00 c4 1e fe R7=R3-\|-R6 \(SCO\); - 1c8: 00 c4 0a c0 R0=R1-\|-R2 ; - 1cc: 00 c4 25 c6 R3=R4-\|-R5 ; - 1d0: 00 c4 38 cc R6=R7-\|-R0 ; - 1d4: 00 c4 13 c2 R1=R2-\|-R3 ; - 1d8: 00 c4 1d c8 R4=R3-\|-R5 ; - 1dc: 00 c4 1f cc R6=R3-\|-R7 ; - 1e0: 00 c4 0a e0 R0=R1-\|-R2 \(S\); - 1e4: 00 c4 25 e6 R3=R4-\|-R5 \(S\); - 1e8: 00 c4 38 ec R6=R7-\|-R0 \(S\); - 1ec: 00 c4 13 e2 R1=R2-\|-R3 \(S\); - 1f0: 00 c4 1d e8 R4=R3-\|-R5 \(S\); - 1f4: 00 c4 1f ec R6=R3-\|-R7 \(S\); - 1f8: 00 c4 0a d0 R0=R1-\|-R2 \(CO\); - 1fc: 00 c4 25 d6 R3=R4-\|-R5 \(CO\); - 200: 00 c4 38 dc R6=R7-\|-R0 \(CO\); - 204: 00 c4 13 d2 R1=R2-\|-R3 \(CO\); - 208: 00 c4 1d d8 R4=R3-\|-R5 \(CO\); - 20c: 00 c4 1f dc R6=R3-\|-R7 \(CO\); - 210: 00 c4 0a f0 R0=R1-\|-R2 \(SCO\); - 214: 00 c4 25 f6 R3=R4-\|-R5 \(SCO\); - 218: 00 c4 38 fc R6=R7-\|-R0 \(SCO\); - 21c: 00 c4 13 f2 R1=R2-\|-R3 \(SCO\); - 220: 00 c4 1d f8 R4=R3-\|-R5 \(SCO\); - 224: 00 c4 1f fc R6=R3-\|-R7 \(SCO\); - 228: 01 c4 5c 0f R5=R3\+\|\+R4,R7=R3-\|-R4; - 22c: 01 c4 0a 0e R0=R1\+\|\+R2,R7=R1-\|-R2; - 230: 01 c4 e5 0c R3=R4\+\|\+R5,R6=R4-\|-R5; - 234: 01 c4 b8 0b R6=R7\+\|\+R0,R5=R7-\|-R0; - 238: 01 c4 53 08 R1=R2\+\|\+R3,R4=R2-\|-R3; - 23c: 01 c4 1d 07 R4=R3\+\|\+R5,R3=R3-\|-R5; - 240: 01 c4 9f 05 R6=R3\+\|\+R7,R2=R3-\|-R7; - 244: 01 c4 0a 2e R0=R1\+\|\+R2,R7=R1-\|-R2\(S\); - 248: 01 c4 e5 2c R3=R4\+\|\+R5,R6=R4-\|-R5\(S\); - 24c: 01 c4 b8 2b R6=R7\+\|\+R0,R5=R7-\|-R0\(S\); - 250: 01 c4 53 28 R1=R2\+\|\+R3,R4=R2-\|-R3\(S\); - 254: 01 c4 1d 27 R4=R3\+\|\+R5,R3=R3-\|-R5\(S\); - 258: 01 c4 9f 25 R6=R3\+\|\+R7,R2=R3-\|-R7\(S\); - 25c: 01 c4 0a 1e R0=R1\+\|\+R2,R7=R1-\|-R2\(CO\); - 260: 01 c4 e5 1c R3=R4\+\|\+R5,R6=R4-\|-R5\(CO\); - 264: 01 c4 b8 1b R6=R7\+\|\+R0,R5=R7-\|-R0\(CO\); - 268: 01 c4 53 18 R1=R2\+\|\+R3,R4=R2-\|-R3\(CO\); - 26c: 01 c4 1d 17 R4=R3\+\|\+R5,R3=R3-\|-R5\(CO\); - 270: 01 c4 9f 15 R6=R3\+\|\+R7,R2=R3-\|-R7\(CO\); - 274: 01 c4 0a 3e R0=R1\+\|\+R2,R7=R1-\|-R2\(SCO\); - 278: 01 c4 e5 3c R3=R4\+\|\+R5,R6=R4-\|-R5\(SCO\); - 27c: 01 c4 b8 3b R6=R7\+\|\+R0,R5=R7-\|-R0\(SCO\); - 280: 01 c4 53 38 R1=R2\+\|\+R3,R4=R2-\|-R3\(SCO\); - 284: 01 c4 1d 37 R4=R3\+\|\+R5,R3=R3-\|-R5\(SCO\); - 288: 01 c4 9f 35 R6=R3\+\|\+R7,R2=R3-\|-R7\(SCO\); - 28c: 01 c4 0a 8e R0=R1\+\|\+R2,R7=R1-\|-R2\(ASR\); - 290: 01 c4 e5 8c R3=R4\+\|\+R5,R6=R4-\|-R5\(ASR\); - 294: 01 c4 b8 8b R6=R7\+\|\+R0,R5=R7-\|-R0\(ASR\); - 298: 01 c4 53 88 R1=R2\+\|\+R3,R4=R2-\|-R3\(ASR\); - 29c: 01 c4 1d 87 R4=R3\+\|\+R5,R3=R3-\|-R5\(ASR\); - 2a0: 01 c4 9f 85 R6=R3\+\|\+R7,R2=R3-\|-R7\(ASR\); - 2a4: 01 c4 0a ce R0=R1\+\|\+R2,R7=R1-\|-R2\(ASL\); - 2a8: 01 c4 e5 cc R3=R4\+\|\+R5,R6=R4-\|-R5\(ASL\); - 2ac: 01 c4 b8 cb R6=R7\+\|\+R0,R5=R7-\|-R0\(ASL\); - 2b0: 01 c4 53 c8 R1=R2\+\|\+R3,R4=R2-\|-R3\(ASL\); - 2b4: 01 c4 1d c7 R4=R3\+\|\+R5,R3=R3-\|-R5\(ASL\); - 2b8: 01 c4 9f c5 R6=R3\+\|\+R7,R2=R3-\|-R7\(ASL\); - 2bc: 01 c4 0a ae R0=R1\+\|\+R2,R7=R1-\|-R2\(S,ASR\); - 2c0: 01 c4 e5 ac R3=R4\+\|\+R5,R6=R4-\|-R5\(S,ASR\); - 2c4: 01 c4 b8 ab R6=R7\+\|\+R0,R5=R7-\|-R0\(S,ASR\); - 2c8: 01 c4 53 a8 R1=R2\+\|\+R3,R4=R2-\|-R3\(S,ASR\); - 2cc: 01 c4 1d a7 R4=R3\+\|\+R5,R3=R3-\|-R5\(S,ASR\); - 2d0: 01 c4 9f a5 R6=R3\+\|\+R7,R2=R3-\|-R7\(S,ASR\); - 2d4: 01 c4 0a 9e R0=R1\+\|\+R2,R7=R1-\|-R2\(CO,ASR\); - 2d8: 01 c4 e5 9c R3=R4\+\|\+R5,R6=R4-\|-R5\(CO,ASR\); - 2dc: 01 c4 b8 9b R6=R7\+\|\+R0,R5=R7-\|-R0\(CO,ASR\); - 2e0: 01 c4 53 98 R1=R2\+\|\+R3,R4=R2-\|-R3\(CO,ASR\); - 2e4: 01 c4 1d 97 R4=R3\+\|\+R5,R3=R3-\|-R5\(CO,ASR\); - 2e8: 01 c4 9f 95 R6=R3\+\|\+R7,R2=R3-\|-R7\(CO,ASR\); - 2ec: 01 c4 0a be R0=R1\+\|\+R2,R7=R1-\|-R2\(SCO,ASR\); - 2f0: 01 c4 e5 bc R3=R4\+\|\+R5,R6=R4-\|-R5\(SCO,ASR\); - 2f4: 01 c4 b8 bb R6=R7\+\|\+R0,R5=R7-\|-R0\(SCO,ASR\); - 2f8: 01 c4 53 b8 R1=R2\+\|\+R3,R4=R2-\|-R3\(SCO,ASR\); - 2fc: 01 c4 1d b7 R4=R3\+\|\+R5,R3=R3-\|-R5\(SCO,ASR\); - 300: 01 c4 9f b5 R6=R3\+\|\+R7,R2=R3-\|-R7\(SCO,ASR\); - 304: 01 c4 0a ee R0=R1\+\|\+R2,R7=R1-\|-R2\(S,ASL\); - 308: 01 c4 e5 ec R3=R4\+\|\+R5,R6=R4-\|-R5\(S,ASL\); - 30c: 01 c4 b8 eb R6=R7\+\|\+R0,R5=R7-\|-R0\(S,ASL\); - 310: 01 c4 53 e8 R1=R2\+\|\+R3,R4=R2-\|-R3\(S,ASL\); - 314: 01 c4 1d e7 R4=R3\+\|\+R5,R3=R3-\|-R5\(S,ASL\); - 318: 01 c4 9f e5 R6=R3\+\|\+R7,R2=R3-\|-R7\(S,ASL\); - 31c: 01 c4 0a de R0=R1\+\|\+R2,R7=R1-\|-R2\(CO,ASL\); - 320: 01 c4 e5 dc R3=R4\+\|\+R5,R6=R4-\|-R5\(CO,ASL\); - 324: 01 c4 b8 db R6=R7\+\|\+R0,R5=R7-\|-R0\(CO,ASL\); - 328: 01 c4 53 d8 R1=R2\+\|\+R3,R4=R2-\|-R3\(CO,ASL\); - 32c: 01 c4 1d d7 R4=R3\+\|\+R5,R3=R3-\|-R5\(CO,ASL\); - 330: 01 c4 9f d5 R6=R3\+\|\+R7,R2=R3-\|-R7\(CO,ASL\); - 334: 01 c4 0a fe R0=R1\+\|\+R2,R7=R1-\|-R2\(SCO,ASL\); - 338: 01 c4 e5 fc R3=R4\+\|\+R5,R6=R4-\|-R5\(SCO,ASL\); - 33c: 01 c4 b8 fb R6=R7\+\|\+R0,R5=R7-\|-R0\(SCO,ASL\); - 340: 01 c4 53 f8 R1=R2\+\|\+R3,R4=R2-\|-R3\(SCO,ASL\); - 344: 01 c4 1d f7 R4=R3\+\|\+R5,R3=R3-\|-R5\(SCO,ASL\); - 348: 01 c4 9f f5 R6=R3\+\|\+R7,R2=R3-\|-R7\(SCO,ASL\); - 34c: 21 c4 5c 0f R5=R3\+\|-R4,R7=R3-\|\+R4; - 350: 21 c4 0a 0e R0=R1\+\|-R2,R7=R1-\|\+R2; - 354: 21 c4 e5 0c R3=R4\+\|-R5,R6=R4-\|\+R5; - 358: 21 c4 b8 0b R6=R7\+\|-R0,R5=R7-\|\+R0; - 35c: 21 c4 53 08 R1=R2\+\|-R3,R4=R2-\|\+R3; - 360: 21 c4 1d 07 R4=R3\+\|-R5,R3=R3-\|\+R5; - 364: 21 c4 9f 05 R6=R3\+\|-R7,R2=R3-\|\+R7; - 368: 21 c4 0a 2e R0=R1\+\|-R2,R7=R1-\|\+R2\(S\); - 36c: 21 c4 e5 2c R3=R4\+\|-R5,R6=R4-\|\+R5\(S\); - 370: 21 c4 b8 2b R6=R7\+\|-R0,R5=R7-\|\+R0\(S\); - 374: 21 c4 53 28 R1=R2\+\|-R3,R4=R2-\|\+R3\(S\); - 378: 21 c4 1d 27 R4=R3\+\|-R5,R3=R3-\|\+R5\(S\); - 37c: 21 c4 9f 25 R6=R3\+\|-R7,R2=R3-\|\+R7\(S\); - 380: 21 c4 0a 1e R0=R1\+\|-R2,R7=R1-\|\+R2\(CO\); - 384: 21 c4 e5 1c R3=R4\+\|-R5,R6=R4-\|\+R5\(CO\); - 388: 21 c4 b8 1b R6=R7\+\|-R0,R5=R7-\|\+R0\(CO\); - 38c: 21 c4 53 18 R1=R2\+\|-R3,R4=R2-\|\+R3\(CO\); - 390: 21 c4 1d 17 R4=R3\+\|-R5,R3=R3-\|\+R5\(CO\); - 394: 21 c4 9f 15 R6=R3\+\|-R7,R2=R3-\|\+R7\(CO\); - 398: 21 c4 0a 3e R0=R1\+\|-R2,R7=R1-\|\+R2\(SCO\); - 39c: 21 c4 e5 3c R3=R4\+\|-R5,R6=R4-\|\+R5\(SCO\); - 3a0: 21 c4 b8 3b R6=R7\+\|-R0,R5=R7-\|\+R0\(SCO\); - 3a4: 21 c4 53 38 R1=R2\+\|-R3,R4=R2-\|\+R3\(SCO\); - 3a8: 21 c4 1d 37 R4=R3\+\|-R5,R3=R3-\|\+R5\(SCO\); - 3ac: 21 c4 9f 35 R6=R3\+\|-R7,R2=R3-\|\+R7\(SCO\); - 3b0: 21 c4 0a 8e R0=R1\+\|-R2,R7=R1-\|\+R2\(ASR\); - 3b4: 21 c4 e5 8c R3=R4\+\|-R5,R6=R4-\|\+R5\(ASR\); - 3b8: 21 c4 b8 8b R6=R7\+\|-R0,R5=R7-\|\+R0\(ASR\); - 3bc: 21 c4 53 88 R1=R2\+\|-R3,R4=R2-\|\+R3\(ASR\); - 3c0: 21 c4 1d 87 R4=R3\+\|-R5,R3=R3-\|\+R5\(ASR\); - 3c4: 21 c4 9f 85 R6=R3\+\|-R7,R2=R3-\|\+R7\(ASR\); - 3c8: 21 c4 0a ce R0=R1\+\|-R2,R7=R1-\|\+R2\(ASL\); - 3cc: 21 c4 e5 cc R3=R4\+\|-R5,R6=R4-\|\+R5\(ASL\); - 3d0: 21 c4 b8 cb R6=R7\+\|-R0,R5=R7-\|\+R0\(ASL\); - 3d4: 21 c4 53 c8 R1=R2\+\|-R3,R4=R2-\|\+R3\(ASL\); - 3d8: 21 c4 1d c7 R4=R3\+\|-R5,R3=R3-\|\+R5\(ASL\); - 3dc: 21 c4 9f c5 R6=R3\+\|-R7,R2=R3-\|\+R7\(ASL\); - 3e0: 21 c4 0a ae R0=R1\+\|-R2,R7=R1-\|\+R2\(S,ASR\); - 3e4: 21 c4 e5 ac R3=R4\+\|-R5,R6=R4-\|\+R5\(S,ASR\); - 3e8: 21 c4 b8 ab R6=R7\+\|-R0,R5=R7-\|\+R0\(S,ASR\); - 3ec: 21 c4 53 a8 R1=R2\+\|-R3,R4=R2-\|\+R3\(S,ASR\); - 3f0: 21 c4 1d a7 R4=R3\+\|-R5,R3=R3-\|\+R5\(S,ASR\); - 3f4: 21 c4 9f a5 R6=R3\+\|-R7,R2=R3-\|\+R7\(S,ASR\); - 3f8: 21 c4 0a 9e R0=R1\+\|-R2,R7=R1-\|\+R2\(CO,ASR\); - 3fc: 21 c4 e5 9c R3=R4\+\|-R5,R6=R4-\|\+R5\(CO,ASR\); - 400: 21 c4 b8 9b R6=R7\+\|-R0,R5=R7-\|\+R0\(CO,ASR\); - 404: 21 c4 53 98 R1=R2\+\|-R3,R4=R2-\|\+R3\(CO,ASR\); - 408: 21 c4 1d 97 R4=R3\+\|-R5,R3=R3-\|\+R5\(CO,ASR\); - 40c: 21 c4 9f 95 R6=R3\+\|-R7,R2=R3-\|\+R7\(CO,ASR\); - 410: 21 c4 0a be R0=R1\+\|-R2,R7=R1-\|\+R2\(SCO,ASR\); - 414: 21 c4 e5 bc R3=R4\+\|-R5,R6=R4-\|\+R5\(SCO,ASR\); - 418: 21 c4 b8 bb R6=R7\+\|-R0,R5=R7-\|\+R0\(SCO,ASR\); - 41c: 21 c4 53 b8 R1=R2\+\|-R3,R4=R2-\|\+R3\(SCO,ASR\); - 420: 21 c4 1d b7 R4=R3\+\|-R5,R3=R3-\|\+R5\(SCO,ASR\); - 424: 21 c4 9f b5 R6=R3\+\|-R7,R2=R3-\|\+R7\(SCO,ASR\); - 428: 21 c4 0a ee R0=R1\+\|-R2,R7=R1-\|\+R2\(S,ASL\); - 42c: 21 c4 e5 ec R3=R4\+\|-R5,R6=R4-\|\+R5\(S,ASL\); - 430: 21 c4 b8 eb R6=R7\+\|-R0,R5=R7-\|\+R0\(S,ASL\); - 434: 21 c4 53 e8 R1=R2\+\|-R3,R4=R2-\|\+R3\(S,ASL\); - 438: 21 c4 1d e7 R4=R3\+\|-R5,R3=R3-\|\+R5\(S,ASL\); - 43c: 21 c4 9f e5 R6=R3\+\|-R7,R2=R3-\|\+R7\(S,ASL\); - 440: 21 c4 0a de R0=R1\+\|-R2,R7=R1-\|\+R2\(CO,ASL\); - 444: 21 c4 e5 dc R3=R4\+\|-R5,R6=R4-\|\+R5\(CO,ASL\); - 448: 21 c4 b8 db R6=R7\+\|-R0,R5=R7-\|\+R0\(CO,ASL\); - 44c: 21 c4 53 d8 R1=R2\+\|-R3,R4=R2-\|\+R3\(CO,ASL\); - 450: 21 c4 1d d7 R4=R3\+\|-R5,R3=R3-\|\+R5\(CO,ASL\); - 454: 21 c4 9f d5 R6=R3\+\|-R7,R2=R3-\|\+R7\(CO,ASL\); - 458: 21 c4 0a fe R0=R1\+\|-R2,R7=R1-\|\+R2\(SCO,ASL\); - 45c: 21 c4 e5 fc R3=R4\+\|-R5,R6=R4-\|\+R5\(SCO,ASL\); - 460: 21 c4 b8 fb R6=R7\+\|-R0,R5=R7-\|\+R0\(SCO,ASL\); - 464: 21 c4 53 f8 R1=R2\+\|-R3,R4=R2-\|\+R3\(SCO,ASL\); - 468: 21 c4 1d f7 R4=R3\+\|-R5,R3=R3-\|\+R5\(SCO,ASL\); - 46c: 21 c4 9f f5 R6=R3\+\|-R7,R2=R3-\|\+R7\(SCO,ASL\); - 470: 04 c4 81 86 R2=R0\+R1,R3=R0-R1 \(NS\); - 474: 04 c4 c1 81 R7=R0\+R1,R0=R0-R1 \(NS\); - 478: 04 c4 8a 83 R6=R1\+R2,R1=R1-R2 \(NS\); - 47c: 04 c4 53 85 R5=R2\+R3,R2=R2-R3 \(NS\); - 480: 04 c4 1c 87 R4=R3\+R4,R3=R3-R4 \(NS\); - 484: 04 c4 e5 88 R3=R4\+R5,R4=R4-R5 \(NS\); - 488: 04 c4 ae 8a R2=R5\+R6,R5=R5-R6 \(NS\); - 48c: 04 c4 77 8c R1=R6\+R7,R6=R6-R7 \(NS\); - 490: 04 c4 38 8e R0=R7\+R0,R7=R7-R0 \(NS\); - 494: 04 c4 81 a6 R2=R0\+R1,R3=R0-R1 \(S\); - 498: 04 c4 c1 a1 R7=R0\+R1,R0=R0-R1 \(S\); - 49c: 04 c4 8a a3 R6=R1\+R2,R1=R1-R2 \(S\); - 4a0: 04 c4 53 a5 R5=R2\+R3,R2=R2-R3 \(S\); - 4a4: 04 c4 1c a7 R4=R3\+R4,R3=R3-R4 \(S\); - 4a8: 04 c4 e5 a8 R3=R4\+R5,R4=R4-R5 \(S\); - 4ac: 04 c4 ae aa R2=R5\+R6,R5=R5-R6 \(S\); - 4b0: 04 c4 77 ac R1=R6\+R7,R6=R6-R7 \(S\); - 4b4: 04 c4 38 ae R0=R7\+R0,R7=R7-R0 \(S\); - 4b8: 11 c4 [0-3][[:xdigit:]] 02 R0=A1\+A0,R1=A1-A0 \(NS\); - 4bc: 11 c4 [8|9|a|b][[:xdigit:]] 06 R2=A1\+A0,R3=A1-A0 \(NS\); - 4c0: 11 c4 [0-3][[:xdigit:]] 0b R4=A1\+A0,R5=A1-A0 \(NS\); - 4c4: 11 c4 [8|9|a|b][[:xdigit:]] 0f R6=A1\+A0,R7=A1-A0 \(NS\); - 4c8: 11 c4 [4-7][[:xdigit:]] 00 R1=A1\+A0,R0=A1-A0 \(NS\); - 4cc: 11 c4 [c-f][[:xdigit:]] 04 R3=A1\+A0,R2=A1-A0 \(NS\); - 4d0: 11 c4 [4-7][[:xdigit:]] 09 R5=A1\+A0,R4=A1-A0 \(NS\); - 4d4: 11 c4 [0-3][[:xdigit:]] 22 R0=A1\+A0,R1=A1-A0 \(S\); - 4d8: 11 c4 [8|9|a|b][[:xdigit:]] 26 R2=A1\+A0,R3=A1-A0 \(S\); - 4dc: 11 c4 [0-3][[:xdigit:]] 2b R4=A1\+A0,R5=A1-A0 \(S\); - 4e0: 11 c4 [8|9|a|b][[:xdigit:]] 2f R6=A1\+A0,R7=A1-A0 \(S\); - 4e4: 11 c4 [4-7][[:xdigit:]] 20 R1=A1\+A0,R0=A1-A0 \(S\); - 4e8: 11 c4 [c-f][[:xdigit:]] 24 R3=A1\+A0,R2=A1-A0 \(S\); - 4ec: 11 c4 [4-7][[:xdigit:]] 29 R5=A1\+A0,R4=A1-A0 \(S\); - 4f0: 11 c4 [0-3][[:xdigit:]] 6d R4=A0\+A1,R6=A0-A1 \(S\); - 4f4: 11 c4 [0-3][[:xdigit:]] 42 R0=A0\+A1,R1=A0-A1 \(NS\); - 4f8: 11 c4 [8|9|a|b][[:xdigit:]] 46 R2=A0\+A1,R3=A0-A1 \(NS\); - 4fc: 11 c4 [0-3][[:xdigit:]] 4b R4=A0\+A1,R5=A0-A1 \(NS\); - 500: 11 c4 [8|9|a|b][[:xdigit:]] 4f R6=A0\+A1,R7=A0-A1 \(NS\); - 504: 11 c4 [4-7][[:xdigit:]] 40 R1=A0\+A1,R0=A0-A1 \(NS\); - 508: 11 c4 [c-f][[:xdigit:]] 44 R3=A0\+A1,R2=A0-A1 \(NS\); - 50c: 11 c4 [4-7][[:xdigit:]] 49 R5=A0\+A1,R4=A0-A1 \(NS\); - 510: 11 c4 [0-3][[:xdigit:]] 62 R0=A0\+A1,R1=A0-A1 \(S\); - 514: 11 c4 [8|9|a|b][[:xdigit:]] 66 R2=A0\+A1,R3=A0-A1 \(S\); - 518: 11 c4 [0-3][[:xdigit:]] 6b R4=A0\+A1,R5=A0-A1 \(S\); - 51c: 11 c4 [8|9|a|b][[:xdigit:]] 6f R6=A0\+A1,R7=A0-A1 \(S\); - 520: 11 c4 [4-7][[:xdigit:]] 60 R1=A0\+A1,R0=A0-A1 \(S\); - 524: 11 c4 [c-f][[:xdigit:]] 64 R3=A0\+A1,R2=A0-A1 \(S\); - 528: 11 c4 [4-7][[:xdigit:]] 69 R5=A0\+A1,R4=A0-A1 \(S\); - 52c: 81 c6 d8 01 R0=R0>>>0x5 \(V\); - 530: 81 c6 d9 01 R0=R1>>>0x5 \(V\); - 534: 81 c6 db 05 R2=R3>>>0x5 \(V\); - 538: 81 c6 dd 09 R4=R5>>>0x5 \(V\); - 53c: 81 c6 df 0d R6=R7>>>0x5 \(V\); - 540: 81 c6 d8 03 R1=R0>>>0x5 \(V\); - 544: 81 c6 da 07 R3=R2>>>0x5 \(V\); - 548: 81 c6 dc 0b R5=R4>>>0x5 \(V\); - 54c: 81 c6 de 0f R7=R6>>>0x5 \(V\); - 550: 81 c6 29 40 R0=R1<<0x5 \(V, S\); - 554: 81 c6 2b 44 R2=R3<<0x5 \(V, S\); - 558: 81 c6 2d 48 R4=R5<<0x5 \(V, S\); - 55c: 81 c6 2f 4c R6=R7<<0x5 \(V, S\); - 560: 81 c6 28 42 R1=R0<<0x5 \(V, S\); - 564: 81 c6 2a 46 R3=R2<<0x5 \(V, S\); - 568: 81 c6 2c 4a R5=R4<<0x5 \(V, S\); - 56c: 81 c6 2e 4e R7=R6<<0x5 \(V, S\); - 570: 01 c6 2f 04 R2= ASHIFT R7 BY R5.L\(V\); - 574: 01 c6 11 00 R0= ASHIFT R1 BY R2.L\(V\); - 578: 01 c6 2c 06 R3= ASHIFT R4 BY R5.L\(V\); - 57c: 01 c6 07 0c R6= ASHIFT R7 BY R0.L\(V\); - 580: 01 c6 1a 02 R1= ASHIFT R2 BY R3.L\(V\); - 584: 01 c6 35 08 R4= ASHIFT R5 BY R6.L\(V\); - 588: 01 c6 08 0e R7= ASHIFT R0 BY R1.L\(V\); - 58c: 01 c6 23 04 R2= ASHIFT R3 BY R4.L\(V\); - 590: 01 c6 3e 0a R5= ASHIFT R6 BY R7.L\(V\); - 594: 01 c6 11 40 R0= ASHIFT R1 BY R2.L\(V,S\); - 598: 01 c6 2c 46 R3= ASHIFT R4 BY R5.L\(V,S\); - 59c: 01 c6 07 4c R6= ASHIFT R7 BY R0.L\(V,S\); - 5a0: 01 c6 1a 42 R1= ASHIFT R2 BY R3.L\(V,S\); - 5a4: 01 c6 35 48 R4= ASHIFT R5 BY R6.L\(V,S\); - 5a8: 01 c6 08 4e R7= ASHIFT R0 BY R1.L\(V,S\); - 5ac: 01 c6 23 44 R2= ASHIFT R3 BY R4.L\(V,S\); - 5b0: 01 c6 3e 4a R5= ASHIFT R6 BY R7.L\(V,S\); - 5b4: 81 c6 d9 81 R0=R1 >> 0x5 \(V\); - 5b8: 81 c6 db 85 R2=R3 >> 0x5 \(V\); - 5bc: 81 c6 dd 89 R4=R5 >> 0x5 \(V\); - 5c0: 81 c6 df 8d R6=R7 >> 0x5 \(V\); - 5c4: 81 c6 d8 83 R1=R0 >> 0x5 \(V\); - 5c8: 81 c6 da 87 R3=R2 >> 0x5 \(V\); - 5cc: 81 c6 dc 8b R5=R4 >> 0x5 \(V\); - 5d0: 81 c6 de 8f R7=R6 >> 0x5 \(V\); - 5d4: 81 c6 29 80 R0=R1<<0x5 \(V\); - 5d8: 81 c6 2b 84 R2=R3<<0x5 \(V\); - 5dc: 81 c6 2d 88 R4=R5<<0x5 \(V\); - 5e0: 81 c6 2f 8c R6=R7<<0x5 \(V\); - 5e4: 81 c6 28 82 R1=R0<<0x5 \(V\); - 5e8: 81 c6 2a 86 R3=R2<<0x5 \(V\); - 5ec: 81 c6 2c 8a R5=R4<<0x5 \(V\); - 5f0: 81 c6 2e 8e R7=R6<<0x5 \(V\); - 5f4: 01 c6 11 80 R0=SHIFT R1 BY R2.L\(V\); - 5f8: 01 c6 2c 86 R3=SHIFT R4 BY R5.L\(V\); - 5fc: 01 c6 07 8c R6=SHIFT R7 BY R0.L\(V\); - 600: 01 c6 1a 82 R1=SHIFT R2 BY R3.L\(V\); - 604: 01 c6 35 88 R4=SHIFT R5 BY R6.L\(V\); - 608: 01 c6 08 8e R7=SHIFT R0 BY R1.L\(V\); - 60c: 01 c6 23 84 R2=SHIFT R3 BY R4.L\(V\); - 610: 01 c6 3e 8a R5=SHIFT R6 BY R7.L\(V\); - 614: 06 c4 08 0e R7=MAX\(R1,R0\)\(V\); - 618: 06 c4 0a 00 R0=MAX\(R1,R2\)\(V\); - 61c: 06 c4 25 06 R3=MAX\(R4,R5\)\(V\); - 620: 06 c4 38 0c R6=MAX\(R7,R0\)\(V\); - 624: 06 c4 13 02 R1=MAX\(R2,R3\)\(V\); - 628: 06 c4 2e 08 R4=MAX\(R5,R6\)\(V\); - 62c: 06 c4 01 0e R7=MAX\(R0,R1\)\(V\); - 630: 06 c4 1c 04 R2=MAX\(R3,R4\)\(V\); - 634: 06 c4 37 0a R5=MAX\(R6,R7\)\(V\); - 638: 06 c4 0a 40 R0=MIN\(R1,R2\)\(V\); - 63c: 06 c4 25 46 R3=MIN\(R4,R5\)\(V\); - 640: 06 c4 38 4c R6=MIN\(R7,R0\)\(V\); - 644: 06 c4 13 42 R1=MIN\(R2,R3\)\(V\); - 648: 06 c4 2e 48 R4=MIN\(R5,R6\)\(V\); - 64c: 06 c4 01 4e R7=MIN\(R0,R1\)\(V\); - 650: 06 c4 1c 44 R2=MIN\(R3,R4\)\(V\); - 654: 06 c4 37 4a R5=MIN\(R6,R7\)\(V\); - 658: 04 c2 be 66 R2.H = R7.L \* R6.H, R2 = R7.H \* R6.H; - 65c: 04 c2 08 e1 R4.H = R1.H \* R0.H, R4 = R1.L \* R0.L; - 660: 14 c2 1a a0 R0.H = R3.H \* R2.L \(M\), R0 = R3.L \* R2.L; - 664: 00 c0 13 46 a1 = R2.L \* R3.H, a0 = R2.H \* R3.H; - 668: 01 c0 08 c0 a1 \+= R1.H \* R0.H, a0 = R1.L \* R0.L; - 66c: 01 c0 1b 96 a1 \+= R3.H \* R3.L, a0 -= R3.H \* R3.H; - 670: 10 c0 1a 88 a1 = R3.H \* R2.L \(M\), a0 \+= R3.L \* R2.L; - 674: 90 c0 3c c8 a1 = R7.H \* R4.H \(M\), a0 \+= R7.L \* R4.L \(FU\); - 678: 01 c1 1a c0 a1 \+= R3.H \* R2.H, a0 = R3.L \* R2.L \(IS\); - 67c: 60 c0 37 c8 a1 = R6.H \* R7.H, a0 \+= R6.L \* R7.L \(W32\); - 680: 04 c0 be 66 R2.H = \(a1 = R7.L \* R6.H\), R2.L = \(a0 = R7.H \* R6.H\); - 684: 05 c0 08 e1 R4.H = \(a1 \+= R1.H \* R0.H\), R4.L = \(a0 = R1.L \* R0.L\); - 688: 05 c0 f5 a7 R7.H = \(a1 \+= R6.H \* R5.L\), R7.L = \(a0 = R6.H \* R5.H\); - 68c: 14 c0 3c a8 R0.H = \(a1 = R7.H \* R4.L\) \(M\), R0.L = \(a0 \+= R7.L \* R4.L\); - 690: 94 c0 5a e9 R5.H = \(a1 = R3.H \* R2.H\) \(M\), R5.L = \(a0 \+= R3.L \* R2.L\) \(FU\); - 694: 05 c1 1a e0 R0.H = \(a1 \+= R3.H \* R2.H\), R0.L = \(a0 = R3.L \* R2.L\) \(IS\); - 698: 04 c0 51 c9 R5.H = \(a1 = R2.H \* R1.H\), a0 \+= R2.L \* R1.L; - 69c: 14 c0 d1 c0 R3.H = \(a1 = R2.H \* R1.H\) \(M\), a0 = R2.L \* R1.L; - 6a0: 27 c0 c1 28 R3.H = A1, R3.L = \(a0 \+= R0.L \* R1.L\) \(S2RND\); - 6a4: 25 c1 3e e8 R0.H = \(a1 \+= R7.H \* R6.H\), R0.L = \(a0 \+= R7.L \* R6.L\) \(ISS2\); - 6a8: 0c c0 b7 e0 R3 = \(a1 = R6.H \* R7.H\), R2 = \(a0 = R6.L \* R7.L\); - 6ac: 0d c0 37 e1 R5 = \(a1 \+= R6.H \* R7.H\), R4 = \(a0 = R6.L \* R7.L\); - 6b0: 0d c0 9d f1 R7 = \(a1 \+= R3.H \* R5.H\), R6 = \(a0 -= R3.L \* R5.L\); - 6b4: 1c c0 3c 2e R1 = \(a1 = R7.L \* R4.L\) \(M\), R0 = \(a0 \+= R7.H \* R4.H\); - 6b8: 9c c0 1f e9 R5 = \(a1 = R3.H \* R7.H\) \(M\), R4 = \(a0 \+= R3.L \* R7.L\) \(FU\); - 6bc: 0d c1 1a e0 R1 = \(a1 \+= R3.H \* R2.H\), R0 = \(a0 = R3.L \* R2.L\) \(IS\); - 6c0: 0e c0 37 c9 R5 = \(a1 -= R6.H \* R7.H\), a0 \+= R6.L \* R7.L; - 6c4: 1c c0 b7 d0 R3 = \(a1 = R6.H \* R7.H\) \(M\), a0 -= R6.L \* R7.L; - 6c8: 2f c0 81 28 R3 = A1, R2 = \(a0 \+= R0.L \* R1.L\) \(S2RND\); - 6cc: 2d c1 3e e8 R1 = \(a1 \+= R7.H \* R6.H\), R0 = \(a0 \+= R7.L \* R6.L\) \(ISS2\); - 6d0: 0f c4 18 ca R5=-R3\(V\); - 6d4: 04 c6 2c 06 R3=PACK\(R4.L,R5.L\); - 6d8: 04 c6 26 42 R1=PACK\(R6.L,R4.H\); - 6dc: 04 c6 22 80 R0=PACK\(R2.H,R4.L\); - 6e0: 04 c6 17 ca R5=PACK\(R7.H,R2.H\); - 6e4: 0d cc 50 c0 \(R1,R0\) = SEARCH R2\(LE\) \|\| R2=\[P0\+\+\] \|\| NOP; - 6e8: 02 90 00 00 - 6ec: 0d c4 50 c0 \(R1,R0\) = SEARCH R2\(LE\); - 6f0: 12 cc 02 00 SAA\(R1:0x0,R3:0x2\) \|\| R0=\[I0\+\+\] \|\| R2=\[I1\+\+\]; - 6f4: 00 9c 0a 9c - 6f8: 12 cc 02 20 SAA\(R1:0x0,R3:0x2\) \(R\) \|\| R1=\[I0\+\+\] \|\| R3=\[I1\+\+\]; - 6fc: 01 9c 0b 9c - 700: 03 c8 00 18 mnop \|\| R1=\[I0\+\+\] \|\| R3=\[I1\+\+\]; - 704: 01 9c 0b 9c - 708: 0c cc 13 0e R7.H=R7.L=SIGN\(R2.H\)\*R3.H\+SIGN\(R2.L\)\*R3.L\) \|\| I0\+=M3 \|\| R0=\[I0\]; - 70c: 6c 9e 00 9d - 710: 01 cc 94 88 R2=R2\+\|\+R4,R4=R2-\|-R4\(ASR\) \|\| I0\+=M0\(BREV\) \|\| R1=\[I0\]; - 714: e0 9e 01 9d - 718: 00 c8 11 06 a1 = R2.L \* R1.L, a0 = R2.H \* R1.H \|\| R2.H=W\[I2\+\+\] \|\| \[I3\+\+\]=R3; - 71c: 52 9c 1b 9e - 720: 01 c8 02 48 a1 \+= R0.L \* R2.H, a0 \+= R0.L \* R2.L \|\| R2.L=W\[I2\+\+\] \|\| R0=\[I1--\]; - 724: 32 9c 88 9c - 728: 05 c8 c1 68 R3.H = \(a1 \+= R0.L \* R1.H\), R3.L = \(a0 \+= R0.L \* R1.L\) \|\| R0=\[P0\+\+\] \|\| R1=\[I0\]; - 72c: 00 90 01 9d - 730: 04 ce 01 c2 R1=PACK\(R1.H,R0.H\) \|\| \[I0\+\+\]=R0 \|\| R2.L=W\[I2\+\+\]; - 734: 00 9e 32 9c - 738: 8b c8 9a 2f R6 = \(a0 \+= R3.H \* R2.H\) \(FU\) \|\| I2-=M0 \|\| NOP; - 73c: 72 9e 00 00 diff --git a/binutils-2.17/gas/testsuite/gas/bfin/vector2.s b/binutils-2.17/gas/testsuite/gas/bfin/vector2.s deleted file mode 100755 index 30cca43c..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/vector2.s +++ /dev/null @@ -1,668 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//14 VECTOR OPERATIONS
-//
-
-//Dreg_hi = Dreg_lo = SIGN ( Dreg_hi ) * Dreg_hi + SIGN ( Dreg_lo ) * Dreg_lo ; /* (b) */
-
-r7.h=r7.l=sign(r2.h)*r3.h+sign(r2.l)*r3.l ;
-r0.h=r0.l=sign(r1.h)*r2.h+sign(r1.l)*r2.l ;
-r3.h=r3.l=sign(r4.h)*r5.h+sign(r4.l)*r5.l ;
-r6.h=r6.l=sign(r7.h)*r0.h+sign(r7.l)*r0.l ;
-r1.h=r1.l=sign(r2.h)*r3.h+sign(r2.l)*r3.l ;
-r4.h=r4.l=sign(r5.h)*r6.h+sign(r5.l)*r6.l ;
-r7.h=r7.l=sign(r0.h)*r1.h+sign(r0.l)*r1.l ;
-r2.h=r2.l=sign(r3.h)*r4.h+sign(r3.l)*r4.l ;
-
-//Dual 16-Bit Operation
-//Dreg = VIT_MAX ( Dreg , Dreg ) (ASL) ; /* shift history bits left (b) */
-//Dreg = VIT_MAX ( Dreg , Dreg ) (ASR) ; /* shift history bits right (b) */
-//Single 16-Bit Operation
-//Dreg_lo = VIT_MAX ( Dreg ) (ASL) ; /* shift history bits left (b) */
-//Dreg_lo = VIT_MAX ( Dreg ) (ASR) ; /* shift history bits right (b) */
-r5 = vit_max(r3, r2)(asl) ; /* shift left, dual operation */
-r7 = vit_max (r1, r0) (asr) ; /* shift right, dual operation */
-
-r0 = vit_max(r1, r2)(asl) ; /* shift left, dual operation */
-r3 = vit_max (r4, r5) (asr) ; /* shift right, dual operation */
-r6 = vit_max(r7, r0)(asl) ; /* shift left, dual operation */
-r1 = vit_max (r2, r3) (asr) ; /* shift right, dual operation */
-r4 = vit_max(r5, r6)(asl) ; /* shift left, dual operation */
-r7 = vit_max (r0, r1) (asr) ; /* shift right, dual operation */
-r2 = vit_max(r3, r4)(asl) ; /* shift left, dual operation */
-r5 = vit_max (r6, r7) (asr) ; /* shift right, dual operation */
-
-
-r3.l = vit_max (r1)(asl) ; /* shift left, single operation */
-r3.l = vit_max (r1)(asr) ; /* shift right, single operation */
-
-r0.l = vit_max (r1)(asl) ; /* shift left, single operation */
-r2.l = vit_max (r3)(asr) ; /* shift right, single operation */
-r4.l = vit_max (r5)(asl) ; /* shift left, single operation */
-r6.l = vit_max (r7)(asr) ; /* shift right, single operation */
-r1.l = vit_max (r2)(asl) ; /* shift left, single operation */
-r3.l = vit_max (r4)(asr) ; /* shift right, single operation */
-r5.l = vit_max (r6)(asl) ; /* shift left, single operation */
-r7.l = vit_max (r0)(asr) ; /* shift right, single operation */
-
-//Dreg = ABS Dreg (V) ; /* (b) */
-r3 = abs r1 (v) ;
-
-r0 = abs r0 (v) ;
-r0 = abs r1 (v) ;
-r2 = abs r3 (v) ;
-r4 = abs r5 (v) ;
-r6 = abs r7 (v) ;
-r1 = abs r0 (v) ;
-r3 = abs r2 (v) ;
-r5 = abs r4 (v) ;
-r7 = abs r6 (v) ;
-
-//Dual 16-Bit Operations
-//Dreg = Dreg +|+ Dreg (opt_mode_0) ; /* add | add (b) */
-r5=r3 +|+ r4 ; /* dual 16-bit operations, add|add */
-
-r0=r1 +|+ r2 ;
-r3=r4 +|+ r5 ;
-r6=r7 +|+ r0 ;
-r1=r2 +|+ r3 ;
-r4=r3 +|+ r5 ;
-r6=r3 +|+ r7 ;
-
-r0=r1 +|+ r2 (S);
-r3=r4 +|+ r5 (S);
-r6=r7 +|+ r0 (S);
-r1=r2 +|+ r3 (S);
-r4=r3 +|+ r5 (S);
-r6=r3 +|+ r7 (S);
-
-r0=r1 +|+ r2 (CO);
-r3=r4 +|+ r5 (CO);
-r6=r7 +|+ r0 (CO) ;
-r1=r2 +|+ r3 (CO);
-r4=r3 +|+ r5 (CO);
-r6=r3 +|+ r7 (CO);
-
-r0=r1 +|+ r2 (SCO);
-r3=r4 +|+ r5 (SCO);
-r6=r7 +|+ r0 (SCO);
-r1=r2 +|+ r3 (SCO);
-r4=r3 +|+ r5 (SCO);
-r6=r3 +|+ r7 (SCO);
-
-//Dreg = Dreg –|+ Dreg (opt_mode_0) ; /* subtract | add (b) */
-r6=r0 -|+ r1(s) ; /* same as above, subtract|add with saturation */
-
-r0=r1 -|+ r2 ;
-r3=r4 -|+ r5 ;
-r6=r7 -|+ r0 ;
-r1=r2 -|+ r3 ;
-r4=r3 -|+ r5 ;
-r6=r3 -|+ r7 ;
-
-r0=r1 -|+ r2 (S);
-r3=r4 -|+ r5 (S);
-r6=r7 -|+ r0 (S);
-r1=r2 -|+ r3 (S);
-r4=r3 -|+ r5 (S);
-r6=r3 -|+ r7 (S);
-
-r0=r1 -|+ r2 (CO);
-r3=r4 -|+ r5 (CO);
-r6=r7 -|+ r0 (CO) ;
-r1=r2 -|+ r3 (CO);
-r4=r3 -|+ r5 (CO);
-r6=r3 -|+ r7 (CO);
-
-r0=r1 -|+ r2 (SCO);
-r3=r4 -|+ r5 (SCO);
-r6=r7 -|+ r0 (SCO);
-r1=r2 -|+ r3 (SCO);
-r4=r3 -|+ r5 (SCO);
-r6=r3 -|+ r7 (SCO);
-
-
-//Dreg = Dreg +|– Dreg (opt_mode_0) ; /* add | subtract (b) */
-r0=r2 +|- r1(co) ; /* add|subtract with half-word results crossed over in the destination register */
-
-r0=r1 +|- r2 ;
-r3=r4 +|- r5 ;
-r6=r7 +|- r0 ;
-r1=r2 +|- r3 ;
-r4=r3 +|- r5 ;
-r6=r3 +|- r7 ;
-
-r0=r1 +|- r2 (S);
-r3=r4 +|- r5 (S);
-r6=r7 +|- r0 (S);
-r1=r2 +|- r3 (S);
-r4=r3 +|- r5 (S);
-r6=r3 +|- r7 (S);
-
-r0=r1 +|- r2 (CO);
-r3=r4 +|- r5 (CO);
-r6=r7 +|- r0 (CO) ;
-r1=r2 +|- r3 (CO);
-r4=r3 +|- r5 (CO);
-r6=r3 +|- r7 (CO);
-
-r0=r1 +|- r2 (SCO);
-r3=r4 +|- r5 (SCO);
-r6=r7 +|- r0 (SCO);
-r1=r2 +|- r3 (SCO);
-r4=r3 +|- r5 (SCO);
-r6=r3 +|- r7 (SCO);
-
-//Dreg = Dreg –|– Dreg (opt_mode_0) ; /* subtract | subtract (b) */
-r7=r3 -|- r6(sco) ; /* subtract|subtract with saturation and half-word results crossed over in the destination register */
-
-r0=r1 -|- r2 ;
-r3=r4 -|- r5 ;
-r6=r7 -|- r0 ;
-r1=r2 -|- r3 ;
-r4=r3 -|- r5 ;
-r6=r3 -|- r7 ;
-
-r0=r1 -|- r2 (S);
-r3=r4 -|- r5 (S);
-r6=r7 -|- r0 (S);
-r1=r2 -|- r3 (S);
-r4=r3 -|- r5 (S);
-r6=r3 -|- r7 (S);
-
-r0=r1 -|- r2 (CO);
-r3=r4 -|- r5 (CO);
-r6=r7 -|- r0 (CO) ;
-r1=r2 -|- r3 (CO);
-r4=r3 -|- r5 (CO);
-r6=r3 -|- r7 (CO);
-
-r0=r1 -|- r2 (SCO);
-r3=r4 -|- r5 (SCO);
-r6=r7 -|- r0 (SCO);
-r1=r2 -|- r3 (SCO);
-r4=r3 -|- r5 (SCO);
-r6=r3 -|- r7 (SCO);
-
-//Quad 16-Bit Operations
-//Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg (opt_mode_0,opt_mode_2) ; /* add | add, subtract | subtract; the set of source registers must be the same for each operation (b) */
-r5=r3 +|+ r4, r7=r3-|-r4 ; /* quad 16-bit operations, add|add, subtract|subtract */
-
-r0=r1 +|+ r2, r7=r1 -|- r2;
-r3=r4 +|+ r5, r6=r4 -|- r5;
-r6=r7 +|+ r0, r5=r7 -|- r0;
-r1=r2 +|+ r3, r4=r2 -|- r3;
-r4=r3 +|+ r5, r3=r3 -|- r5;
-r6=r3 +|+ r7, r2=r3 -|- r7;
-
-r0=r1 +|+ r2, r7=r1 -|- r2(S);
-r3=r4 +|+ r5, r6=r4 -|- r5(S);
-r6=r7 +|+ r0, r5=r7 -|- r0(S);
-r1=r2 +|+ r3, r4=r2 -|- r3(S);
-r4=r3 +|+ r5, r3=r3 -|- r5(S);
-r6=r3 +|+ r7, r2=r3 -|- r7(S);
-
-
-r0=r1 +|+ r2, r7=r1 -|- r2(CO);
-r3=r4 +|+ r5, r6=r4 -|- r5(CO);
-r6=r7 +|+ r0, r5=r7 -|- r0(CO);
-r1=r2 +|+ r3, r4=r2 -|- r3(CO);
-r4=r3 +|+ r5, r3=r3 -|- r5(CO);
-r6=r3 +|+ r7, r2=r3 -|- r7(CO);
-
-
-r0=r1 +|+ r2, r7=r1 -|- r2(SCO);
-r3=r4 +|+ r5, r6=r4 -|- r5(SCO);
-r6=r7 +|+ r0, r5=r7 -|- r0(SCO);
-r1=r2 +|+ r3, r4=r2 -|- r3(SCO);
-r4=r3 +|+ r5, r3=r3 -|- r5(SCO);
-r6=r3 +|+ r7, r2=r3 -|- r7(SCO);
-
-r0=r1 +|+ r2, r7=r1 -|- r2(ASR);
-r3=r4 +|+ r5, r6=r4 -|- r5(ASR);
-r6=r7 +|+ r0, r5=r7 -|- r0(ASR);
-r1=r2 +|+ r3, r4=r2 -|- r3(ASR);
-r4=r3 +|+ r5, r3=r3 -|- r5(ASR);
-r6=r3 +|+ r7, r2=r3 -|- r7(ASR);
-
-
-r0=r1 +|+ r2, r7=r1 -|- r2(ASL);
-r3=r4 +|+ r5, r6=r4 -|- r5(ASL);
-r6=r7 +|+ r0, r5=r7 -|- r0(ASL);
-r1=r2 +|+ r3, r4=r2 -|- r3(ASL);
-r4=r3 +|+ r5, r3=r3 -|- r5(ASL);
-r6=r3 +|+ r7, r2=r3 -|- r7(ASL);
-
-
-r0=r1 +|+ r2, r7=r1 -|- r2(S,ASR);
-r3=r4 +|+ r5, r6=r4 -|- r5(S,ASR);
-r6=r7 +|+ r0, r5=r7 -|- r0(S,ASR);
-r1=r2 +|+ r3, r4=r2 -|- r3(S,ASR);
-r4=r3 +|+ r5, r3=r3 -|- r5(S,ASR);
-r6=r3 +|+ r7, r2=r3 -|- r7(S,ASR);
-
-
-r0=r1 +|+ r2, r7=r1 -|- r2(CO,ASR);
-r3=r4 +|+ r5, r6=r4 -|- r5(CO,ASR);
-r6=r7 +|+ r0, r5=r7 -|- r0(CO,ASR);
-r1=r2 +|+ r3, r4=r2 -|- r3(CO,ASR);
-r4=r3 +|+ r5, r3=r3 -|- r5(CO,ASR);
-r6=r3 +|+ r7, r2=r3 -|- r7(CO,ASR);
-
-
-r0=r1 +|+ r2, r7=r1 -|- r2(SCO,ASR);
-r3=r4 +|+ r5, r6=r4 -|- r5(SCO,ASR);
-r6=r7 +|+ r0, r5=r7 -|- r0(SCO,ASR);
-r1=r2 +|+ r3, r4=r2 -|- r3(SCO,ASR);
-r4=r3 +|+ r5, r3=r3 -|- r5(SCO,ASR);
-r6=r3 +|+ r7, r2=r3 -|- r7(SCO,ASR);
-
-r0=r1 +|+ r2, r7=r1 -|- r2(S,ASL);
-r3=r4 +|+ r5, r6=r4 -|- r5(S,ASL);
-r6=r7 +|+ r0, r5=r7 -|- r0(S,ASL);
-r1=r2 +|+ r3, r4=r2 -|- r3(S,ASL);
-r4=r3 +|+ r5, r3=r3 -|- r5(S,ASL);
-r6=r3 +|+ r7, r2=r3 -|- r7(S,ASL);
-
-
-r0=r1 +|+ r2, r7=r1 -|- r2(CO,ASL);
-r3=r4 +|+ r5, r6=r4 -|- r5(CO,ASL);
-r6=r7 +|+ r0, r5=r7 -|- r0(CO,ASL);
-r1=r2 +|+ r3, r4=r2 -|- r3(CO,ASL);
-r4=r3 +|+ r5, r3=r3 -|- r5(CO,ASL);
-r6=r3 +|+ r7, r2=r3 -|- r7(CO,ASL);
-
-
-r0=r1 +|+ r2, r7=r1 -|- r2(SCO,ASL);
-r3=r4 +|+ r5, r6=r4 -|- r5(SCO,ASL);
-r6=r7 +|+ r0, r5=r7 -|- r0(SCO,ASL);
-r1=r2 +|+ r3, r4=r2 -|- r3(SCO,ASL);
-r4=r3 +|+ r5, r3=r3 -|- r5(SCO,ASL);
-r6=r3 +|+ r7, r2=r3 -|- r7(SCO,ASL);
-
-
-//Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (opt_mode_0,opt_mode_2) ; /* add | subtract, subtract | add; the set of source registers must be the same for each operation (b) */
-r5=r3 +|- r4, r7=r3 -|+ r4 ; /* quad 16-bit operations, add|subtract, subtract|add */
-
-r0=r1 +|- r2, r7=r1 -|+ r2;
-r3=r4 +|- r5, r6=r4 -|+ r5;
-r6=r7 +|- r0, r5=r7 -|+ r0;
-r1=r2 +|- r3, r4=r2 -|+ r3;
-r4=r3 +|- r5, r3=r3 -|+ r5;
-r6=r3 +|- r7, r2=r3 -|+ r7;
-
-r0=r1 +|- r2, r7=r1 -|+ r2(S);
-r3=r4 +|- r5, r6=r4 -|+ r5(S);
-r6=r7 +|- r0, r5=r7 -|+ r0(S);
-r1=r2 +|- r3, r4=r2 -|+ r3(S);
-r4=r3 +|- r5, r3=r3 -|+ r5(S);
-r6=r3 +|- r7, r2=r3 -|+ r7(S);
-
-
-r0=r1 +|- r2, r7=r1 -|+ r2(CO);
-r3=r4 +|- r5, r6=r4 -|+ r5(CO);
-r6=r7 +|- r0, r5=r7 -|+ r0(CO);
-r1=r2 +|- r3, r4=r2 -|+ r3(CO);
-r4=r3 +|- r5, r3=r3 -|+ r5(CO);
-r6=r3 +|- r7, r2=r3 -|+ r7(CO);
-
-
-r0=r1 +|- r2, r7=r1 -|+ r2(SCO);
-r3=r4 +|- r5, r6=r4 -|+ r5(SCO);
-r6=r7 +|- r0, r5=r7 -|+ r0(SCO);
-r1=r2 +|- r3, r4=r2 -|+ r3(SCO);
-r4=r3 +|- r5, r3=r3 -|+ r5(SCO);
-r6=r3 +|- r7, r2=r3 -|+ r7(SCO);
-
-r0=r1 +|- r2, r7=r1 -|+ r2(ASR);
-r3=r4 +|- r5, r6=r4 -|+ r5(ASR);
-r6=r7 +|- r0, r5=r7 -|+ r0(ASR);
-r1=r2 +|- r3, r4=r2 -|+ r3(ASR);
-r4=r3 +|- r5, r3=r3 -|+ r5(ASR);
-r6=r3 +|- r7, r2=r3 -|+ r7(ASR);
-
-
-r0=r1 +|- r2, r7=r1 -|+ r2(ASL);
-r3=r4 +|- r5, r6=r4 -|+ r5(ASL);
-r6=r7 +|- r0, r5=r7 -|+ r0(ASL);
-r1=r2 +|- r3, r4=r2 -|+ r3(ASL);
-r4=r3 +|- r5, r3=r3 -|+ r5(ASL);
-r6=r3 +|- r7, r2=r3 -|+ r7(ASL);
-
-
-r0=r1 +|- r2, r7=r1 -|+ r2(S,ASR);
-r3=r4 +|- r5, r6=r4 -|+ r5(S,ASR);
-r6=r7 +|- r0, r5=r7 -|+ r0(S,ASR);
-r1=r2 +|- r3, r4=r2 -|+ r3(S,ASR);
-r4=r3 +|- r5, r3=r3 -|+ r5(S,ASR);
-r6=r3 +|- r7, r2=r3 -|+ r7(S,ASR);
-
-
-r0=r1 +|- r2, r7=r1 -|+ r2(CO,ASR);
-r3=r4 +|- r5, r6=r4 -|+ r5(CO,ASR);
-r6=r7 +|- r0, r5=r7 -|+ r0(CO,ASR);
-r1=r2 +|- r3, r4=r2 -|+ r3(CO,ASR);
-r4=r3 +|- r5, r3=r3 -|+ r5(CO,ASR);
-r6=r3 +|- r7, r2=r3 -|+ r7(CO,ASR);
-
-
-r0=r1 +|- r2, r7=r1 -|+ r2(SCO,ASR);
-r3=r4 +|- r5, r6=r4 -|+ r5(SCO,ASR);
-r6=r7 +|- r0, r5=r7 -|+ r0(SCO,ASR);
-r1=r2 +|- r3, r4=r2 -|+ r3(SCO,ASR);
-r4=r3 +|- r5, r3=r3 -|+ r5(SCO,ASR);
-r6=r3 +|- r7, r2=r3 -|+ r7(SCO,ASR);
-
-r0=r1 +|- r2, r7=r1 -|+ r2(S,ASL);
-r3=r4 +|- r5, r6=r4 -|+ r5(S,ASL);
-r6=r7 +|- r0, r5=r7 -|+ r0(S,ASL);
-r1=r2 +|- r3, r4=r2 -|+ r3(S,ASL);
-r4=r3 +|- r5, r3=r3 -|+ r5(S,ASL);
-r6=r3 +|- r7, r2=r3 -|+ r7(S,ASL);
-
-
-r0=r1 +|- r2, r7=r1 -|+ r2(CO,ASL);
-r3=r4 +|- r5, r6=r4 -|+ r5(CO,ASL);
-r6=r7 +|- r0, r5=r7 -|+ r0(CO,ASL);
-r1=r2 +|- r3, r4=r2 -|+ r3(CO,ASL);
-r4=r3 +|- r5, r3=r3 -|+ r5(CO,ASL);
-r6=r3 +|- r7, r2=r3 -|+ r7(CO,ASL);
-
-
-r0=r1 +|- r2, r7=r1 -|+ r2(SCO,ASL);
-r3=r4 +|- r5, r6=r4 -|+ r5(SCO,ASL);
-r6=r7 +|- r0, r5=r7 -|+ r0(SCO,ASL);
-r1=r2 +|- r3, r4=r2 -|+ r3(SCO,ASL);
-r4=r3 +|- r5, r3=r3 -|+ r5(SCO,ASL);
-r6=r3 +|- r7, r2=r3 -|+ r7(SCO,ASL);
-
-
-
-//Dual 32-Bit Operations
-//Dreg = Dreg + Dreg, Dreg = Dreg - Dreg (opt_mode_1) ; /* add, subtract; the set of source registers must be the same for each operation (b) */
-r2=r0+r1, r3=r0-r1 ; /* 32-bit operations */
-
-r7=r0+r1, r0=r0-r1 ; /* 32-bit operations */
-r6=r1+r2, r1=r1-r2 ; /* 32-bit operations */
-r5=r2+r3, r2=r2-r3 ; /* 32-bit operations */
-r4=r3+r4, r3=r3-r4 ; /* 32-bit operations */
-r3=r4+r5, r4=r4-r5 ; /* 32-bit operations */
-r2=r5+r6, r5=r5-r6 ; /* 32-bit operations */
-r1=r6+r7, r6=r6-r7 ; /* 32-bit operations */
-r0=r7+r0, r7=r7-r0 ; /* 32-bit operations */
-
-r2=r0+r1, r3=r0-r1(s) ; /* dual 32-bit operations with saturation */
-r7=r0+r1, r0=r0-r1 (s); /* 32-bit operations */
-r6=r1+r2, r1=r1-r2 (s); /* 32-bit operations */
-r5=r2+r3, r2=r2-r3 (s); /* 32-bit operations */
-r4=r3+r4, r3=r3-r4(s) ; /* 32-bit operations */
-r3=r4+r5, r4=r4-r5 (s); /* 32-bit operations */
-r2=r5+r6, r5=r5-r6 (s); /* 32-bit operations */
-r1=r6+r7, r6=r6-r7 (s); /* 32-bit operations */
-r0=r7+r0, r7=r7-r0 (s); /* 32-bit operations */
-
-
-
-//Dual 40-Bit Accumulator Operations
-//Dreg = A1 + A0, Dreg = A1 - A0 (opt_mode_1) ; /* add, subtract Accumulators; subtract A0 from A1 (b) */
-r0=a1+a0, r1=a1-a0 ;
-r2=a1+a0, r3=a1-a0 ;
-r4=a1+a0, r5=a1-a0 ;
-r6=a1+a0, r7=a1-a0 ;
-r1=a1+a0, r0=a1-a0 ;
-r3=a1+a0, r2=a1-a0 ;
-r5=a1+a0, r4=a1-a0 ;
-
-r0=a1+a0, r1=a1-a0 (s);
-r2=a1+a0, r3=a1-a0 (s);
-r4=a1+a0, r5=a1-a0 (s);
-r6=a1+a0, r7=a1-a0 (s);
-r1=a1+a0, r0=a1-a0 (s);
-r3=a1+a0, r2=a1-a0 (s);
-r5=a1+a0, r4=a1-a0 (s);
-
-//Dreg = A0 + A1, Dreg = A0 - A1 (opt_mode_1) ; /* add, subtract Accumulators; subtract A1 from A0 (b) */
-r4=a0+a1, r6=a0-a1(s);
-
-r0=a0+a1, r1=a0-a1 ;
-r2=a0+a1, r3=a0-a1 ;
-r4=a0+a1, r5=a0-a1 ;
-r6=a0+a1, r7=a0-a1 ;
-r1=a0+a1, r0=a0-a1 ;
-r3=a0+a1, r2=a0-a1 ;
-r5=a0+a1, r4=a0-a1 ;
-
-r0=a0+a1, r1=a0-a1 (s);
-r2=a0+a1, r3=a0-a1 (s);
-r4=a0+a1, r5=a0-a1 (s);
-r6=a0+a1, r7=a0-a1 (s);
-r1=a0+a1, r0=a0-a1 (s);
-r3=a0+a1, r2=a0-a1 (s);
-r5=a0+a1, r4=a0-a1 (s);
-
-//Constant Shift Magnitude
-//Dreg = Dreg >>> uimm4 (V) ; /* arithmetic shift right, immediate (b) */
-R0 = R0 >>> 5(V);
-
-R0 = R1 >>> 5(V);
-R2 = R3 >>> 5(V);
-R4 = R5 >>> 5(V);
-R6 = R7 >>> 5(V);
-R1 = R0 >>> 5(V);
-R3 = R2 >>> 5(V);
-R5 = R4 >>> 5(V);
-R7 = R6 >>> 5(V);
-
-
-//Dreg = Dreg << uimm4 (V,S) ; /* arithmetic shift left, immediate with saturation (b) */
-
-R0 = R1 << 5(V,S);
-R2 = R3 << 5(V,S);
-R4 = R5 << 5(V,S);
-R6 = R7 << 5(V,S);
-R1 = R0 << 5(V,S);
-R3 = R2 << 5(V,S);
-R5 = R4 << 5(V,S);
-R7 = R6 << 5(V,S);
-
-//Registered Shift Magnitude
-//Dreg = ASHIFT Dreg BY Dreg_lo (V) ; /* arithmetic shift (b) */
-r2=ashift r7 by r5.l (v) ;
-
-R0 = ASHIFT R1 BY R2.L (V);
-R3 = ASHIFT R4 BY R5.L (V);
-R6 = ASHIFT R7 BY R0.L (V);
-R1 = ASHIFT R2 BY R3.L (V);
-R4 = ASHIFT R5 BY R6.L (V);
-R7 = ASHIFT R0 BY R1.L (V);
-R2 = ASHIFT R3 BY R4.L (V);
-R5 = ASHIFT R6 BY R7.L (V);
-
-
-//Dreg = ASHIFT Dreg BY Dreg_lo (V, S) ; /* arithmetic shift with saturation (b) */
-R0 = ASHIFT R1 BY R2.L (V,S);
-R3 = ASHIFT R4 BY R5.L (V,S);
-R6 = ASHIFT R7 BY R0.L (V,S);
-R1 = ASHIFT R2 BY R3.L (V,S);
-R4 = ASHIFT R5 BY R6.L (V,S);
-R7 = ASHIFT R0 BY R1.L (V,S);
-R2 = ASHIFT R3 BY R4.L (V,S);
-R5 = ASHIFT R6 BY R7.L (V,S);
-
-//Constant Shift Magnitude
-//Dreg = Dreg >> uimm4 (V) ; /* logical shift right, immediate (b) */
-R0 = R1 >> 5(V);
-R2 = R3 >> 5(V);
-R4 = R5 >> 5(V);
-R6 = R7 >> 5(V);
-R1 = R0 >> 5(V);
-R3 = R2 >> 5(V);
-R5 = R4 >> 5(V);
-R7 = R6 >> 5(V);
-
-//Dreg = Dreg << uimm4 (V) ; /* logical shift left, immediate (b) */
-R0 = R1 << 5(V);
-R2 = R3 << 5(V);
-R4 = R5 << 5(V);
-R6 = R7 << 5(V);
-R1 = R0 << 5(V);
-R3 = R2 << 5(V);
-R5 = R4 << 5(V);
-R7 = R6 << 5(V);
-
-
-//Registered Shift Magnitude
-//Dreg = LSHIFT Dreg BY Dreg_lo (V) ; /* logical shift (b) */
-
-R0 = LSHIFT R1 BY R2.L (V);
-R3 = LSHIFT R4 BY R5.L (V);
-R6 = LSHIFT R7 BY R0.L (V);
-R1 = LSHIFT R2 BY R3.L (V);
-R4 = LSHIFT R5 BY R6.L (V);
-R7 = LSHIFT R0 BY R1.L (V);
-R2 = LSHIFT R3 BY R4.L (V);
-R5 = LSHIFT R6 BY R7.L (V);
-
-//Dreg = MAX ( Dreg , Dreg ) (V) ; /* dual 16-bit operations (b) */
-r7 = max (r1, r0) (v) ;
-
-R0 = MAX (R1, R2) (V);
-R3 = MAX (R4, R5) (V);
-R6 = MAX (R7, R0) (V);
-R1 = MAX (R2, R3) (V);
-R4 = MAX (R5, R6) (V);
-R7 = MAX (R0, R1) (V);
-R2 = MAX (R3, R4) (V);
-R5 = MAX (R6, R7) (V);
-
-//Dreg = MIN ( Dreg , Dreg ) (V) ; /* dual 16-bit operation (b) */
-R0 = MIN (R1, R2) (V);
-R3 = MIN (R4, R5) (V);
-R6 = MIN (R7, R0) (V);
-R1 = MIN (R2, R3) (V);
-R4 = MIN (R5, R6) (V);
-R7 = MIN (R0, R1) (V);
-R2 = MIN (R3, R4) (V);
-R5 = MIN (R6, R7) (V);
-
-r2.h=r7.l*r6.h, r2.l=r7.h*r6.h ;
-/* simultaneous MAC0 and MAC1 execution, 16-bit results. Both
-results are signed fractions. */
-r4.l=r1.l*r0.l, r4.h=r1.h*r0.h ;
-/* same as above. MAC order is arbitrary. */
-r0.h=r3.h*r2.l (m), r0.l=r3.l*r2.l ;
-
-a1=r2.l*r3.h, a0=r2.h*r3.h ;
-/* both multiply signed fractions into separate Accumulators */
-a0=r1.l*r0.l, a1+=r1.h*r0.h ;
-/* same as above, but sum result into A1. MAC order is arbitrary.
-*/
-a1+=r3.h*r3.l, a0-=r3.h*r3.h ;
-/* sum product into A1, subtract product from A0 */
-a1=r3.h*r2.l (m), a0+=r3.l*r2.l ;
-/* MAC1 multiplies a signed fraction in r3.h by an unsigned fraction
-in r2.l. MAC0 multiplies two signed fractions. */
-a1=r7.h*r4.h (m), a0+=r7.l*r4.l (fu) ;
-/* MAC1 multiplies signed fraction by unsigned fraction. MAC0
-multiplies and accumulates two unsigned fractions. */
-a1+=r3.h*r2.h, a0=r3.l*r2.l (is) ;
-/* both MACs perform signed integer multiplication */
-a1=r6.h*r7.h, a0+=r6.l*r7.l (w32) ;
-/* both MACs multiply signed fractions, sign extended, and saturate
-both Accumulators at bit 31 */
-r2.h=(a1=r7.l*r6.h), r2.l=(a0=r7.h*r6.h) ; /* simultaneous MAC0
-and MAC1 execution, both are signed fractions, both products load
-into the Accumulators,MAC1 into half-word registers. */
-r4.l=(a0=r1.l*r0.l), r4.h=(a1+=r1.h*r0.h) ; /* same as above,
-but sum result into A1. ; MAC order is arbitrary. */
-r7.h=(a1+=r6.h*r5.l), r7.l=(a0=r6.h*r5.h) ; /* sum into A1,
-subtract into A0 */
-r0.h=(a1=r7.h*r4.l) (m), r0.l=(a0+=r7.l*r4.l) ; /* MAC1 multiplies
-a signed fraction by an unsigned fraction. MAC0 multiplies
-two signed fractions. */
-r5.h=(a1=r3.h*r2.h) (m), r5.l=(a0+=r3.l*r2.l) (fu) ; /* MAC1
-multiplies signed fraction by unsigned fraction. MAC0 multiplies
-two unsigned fractions. */
-r0.h=(a1+=r3.h*r2.h), r0.l=(a0=r3.l*r2.l) (is) ; /* both MACs
-perform signed integer multiplication. */
-r5.h=(a1=r2.h*r1.h), a0+=r2.l*r1.l ; /* both MACs multiply
-signed fractions. MAC0 does not copy the accum result. */
-r3.h=(a1=r2.h*r1.h) (m), a0=r2.l*r1.l ; /* MAC1 multiplies
-signed fraction by unsigned fraction and uses all 40 bits of A1.
-MAC0 multiplies two signed fractions. */
-r3.h=a1, r3.l=(a0+=r0.l*r1.l) (s2rnd) ; /* MAC1 copies Accumulator
-to register half. MAC0 multiplies signed fractions. Both
-scale the result and round on the way to the destination register.
-*/
-r0.l=(a0+=r7.l*r6.l), r0.h=(a1+=r7.h*r6.h) (iss2) ; /* both
-MACs process signed integer the way to the destination half-registers.
-*/
-r3=(a1=r6.h*r7.h), r2=(a0=r6.l*r7.l) ; /* simultaneous MAC0 and
-MAC1 execution, both are signed fractions, both products load
-into the Accumulators */
-r4=(a0=r6.l*r7.l), r5=(a1+=r6.h*r7.h) ; /* same as above, but
-sum result into A1. MAC order is arbitrary. */
-r7=(a1+=r3.h*r5.h), r6=(a0-=r3.l*r5.l) ; /* sum into A1, subtract
-into A0 */
-r1=(a1=r7.l*r4.l) (m), r0=(a0+=r7.h*r4.h) ; /* MAC1 multiplies
-a signed fraction by an unsigned fraction. MAC0 multiplies two
-signed fractions. */
-r5=(a1=r3.h*r7.h) (m), r4=(a0+=r3.l*r7.l) (fu) ; /* MAC1 multiplies
-signed fraction by unsigned fraction. MAC0 multiplies two
-unsigned fractions. */
-r1=(a1+=r3.h*r2.h), r0=(a0=r3.l*r2.l) (is) ; /* both MACs perform
-signed integer multiplication */
-r5=(a1-=r6.h*r7.h), a0+=r6.l*r7.l ; /* both MACs multiply
-signed fractions. MAC0 does not copy the accum result */
-r3=(a1=r6.h*r7.h) (m), a0-=r6.l*r7.l ; /* MAC1 multiplies
-signed fraction by unsigned fraction and uses all 40 bits of A1.
-MAC0 multiplies two signed fractions. */
-r3=a1, r2=(a0+=r0.l*r1.l) (s2rnd) ; /* MAC1 moves Accumulator
-to register. MAC0 multiplies signed fractions. Both scale the
-result and round on the way to the destination register. */
-r0=(a0+=r7.l*r6.l), r1=(a1+=r7.h*r6.h) (iss2) ; /* both MACs
-process signed integer operands and scale the result on the way
-to the destination registers. */
-
-r5 =-r3 (v) ; /* R5.H becomes the negative of R3.H and R5.L
-becomes the negative of R3.L If r3 = 0x0004 7FFF the result is r5
-= 0xFFFC 8001 */
-
-r3=pack(r4.l, r5.l) ; /* pack low / low half-words */
-r1=pack(r6.l, r4.h) ; /* pack low / high half-words */
-r0=pack(r2.h, r4.l) ; /* pack high / low half-words */
-r5=pack(r7.h, r2.h) ; /* pack high / high half-words */
-
-(r1,r0) = SEARCH R2 (LE) || R2=[P0++];
-/* search for the last minimum in all but the
-last element of the array */
-(r1,r0) = SEARCH R2 (LE);
-
-saa (r1:0, r3:2) || r0=[i0++] || r2=[i1++] ;
-saa (r1:0, r3:2)(r) || r1=[i0++] || r3=[i1++] ;
-mnop || r1 = [i0++] || r3 = [i1++] ;
-r7.h=r7.l=sign(r2.h)*r3.h + sign(r2.l)*r3.l || i0+=m3 || r0=[i0]
-;
-
-/* Add/subtract two vector values while incrementing an Ireg and
-loading a data register. */
-R2 = R2 +|+ R4, R4 = R2 -|- R4 (ASR) || I0 += M0 (BREV) || R1 = [I0] ;
-/* Multiply and accumulate to Accumulator while loading a data
-register and storing a data register using an Ireg pointer. */
-A1=R2.L*R1.L, A0=R2.H*R1.H || R2.H=W[I2++] || [I3++]=R3 ;
-/* Multiply and accumulate while loading two data registers. One
-load uses an Ireg pointer. */
-A1+=R0.L*R2.H,A0+=R0.L*R2.L || R2.L=W[I2++] || R0=[I1--] ;
-R3.H=(A1+=R0.L*R1.H), R3.L=(A0+=R0.L*R1.L) || R0=[P0++] || R1=[I0] ;
-/* Pack two vector values while storing a data register using an
-Ireg pointer and loading another data register. */
-R1=PACK(R1.H,R0.H) || [I0++]=R0 || R2.L=W[I2++] ;
-
-/* Multiply-Accumulate to a Data register while incrementing an
-Ireg. */
-r6=(a0+=r3.h*r2.h)(fu) || i2-=m0 ;
-/* which the assembler expands into:
-r6=(a0+=r3.h*r2.h)(fu) || i2-=m0 || nop ; */
diff --git a/binutils-2.17/gas/testsuite/gas/bfin/video.d b/binutils-2.17/gas/testsuite/gas/bfin/video.d deleted file mode 100644 index 7f911d1c..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/video.d +++ /dev/null @@ -1,56 +0,0 @@ -#objdump: -dr -#name: video -.*: +file format .* -Disassembly of section .text: - -00000000 <align>: - 0: 0d c6 15 0e R7=ALIGN8\(R5,R2\); - 4: 0d c6 08 4a R5=ALIGN16\(R0,R1\); - 8: 0d c6 05 84 R2=ALIGN24\(R5,R0\); - -0000000c <disalgnexcpt>: - c: 12 c4 00 c0 DISALGNEXCPT; - -00000010 <byteop3p>: - 10: 17 c4 02 0a R5=BYTEOP3P\(R1:0x0,R3:0x2\)\(LO\); - 14: 37 c4 02 00 R0=BYTEOP3P\(R1:0x0,R3:0x2\)\(HI\); - 18: 17 c4 02 22 R1=BYTEOP3P\(R1:0x0,R3:0x2\)\(LO, R\); - 1c: 37 c4 02 24 R2=BYTEOP3P\(R1:0x0,R3:0x2\)\(HI, R\); - -00000020 <dual16>: - 20: 0c c4 [4-7][[:xdigit:]] 45 R5=A1.L\+A1.H,R2=A0.L\+A0.H; - -00000024 <byteop16p>: - 24: 15 c4 82 06 \(R2,R3\)=BYTEOP16P\(R1:0x0,R3:0x2\) ; - 28: 15 c4 82 21 \(R6,R0\)=BYTEOP16P\(R1:0x0,R3:0x2\) \(R\); - -0000002c <byteop1p>: - 2c: 14 c4 02 0e R7=BYTEOP1P\(R1:0x0,R3:0x2\); - 30: 14 c4 02 44 R2=BYTEOP1P\(R1:0x0,R3:0x2\)\(T\); - 34: 14 c4 02 26 R3=BYTEOP1P\(R1:0x0,R3:0x2\)\(R\); - 38: 14 c4 02 6e R7=BYTEOP1P\(R1:0x0,R3:0x2\)\(T, R\); - -0000003c <byteop2p>: - 3c: 16 c4 02 00 R0=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDL\); - 40: 36 c4 02 02 R1=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDH\); - 44: 16 c4 02 44 R2=BYTEOP2P\(R1:0x0,R3:0x2\)\(TL\); - 48: 36 c4 02 46 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(TH\); - 4c: 16 c4 02 28 R4=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDL, R\); - 50: 36 c4 02 2a R5=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDH, R\); - 54: 16 c4 02 6c R6=BYTEOP2P\(R1:0x0,R3:0x2\)\(TL, R\); - 58: 36 c4 02 6e R7=BYTEOP2P\(R1:0x0,R3:0x2\)\(TH, R\); - -0000005c <bytepack>: - 5c: 18 c4 03 0a R5=BYTEPACK\(R0,R3\); - -00000060 <byteop16m>: - 60: 15 c4 82 45 \(R6,R2\)=BYTEOP16M\(R1:0x0,R3:0x2\) ; - 64: 15 c4 02 6a \(R0,R5\)=BYTEOP16M\(R1:0x0,R3:0x2\) \(R\); - -00000068 <saa>: - 68: 12 c4 02 00 SAA\(R1:0x0,R3:0x2\) ; - 6c: 12 c4 02 20 SAA\(R1:0x0,R3:0x2\) \(R\); - -00000070 <byteunpack>: - 70: 18 c4 c0 45 \(R7,R2\) = BYTEUNPACK R1:0x0 ; - 74: 18 c4 90 69 \(R6,R4\) = BYTEUNPACK R3:0x2 \(R\); diff --git a/binutils-2.17/gas/testsuite/gas/bfin/video.s b/binutils-2.17/gas/testsuite/gas/bfin/video.s deleted file mode 100644 index b53eb6c2..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/video.s +++ /dev/null @@ -1,74 +0,0 @@ - .text - .global align -align: - R7 = Align8 (r5, r2); - R5 = ALIGN16 (R0, R1); - r2 = ALIGN24 (r5, r0); - - .global disalgnexcpt -disalgnexcpt: - DISAlgnExcpt; - - .text - .global byteop3p -byteop3p: - R5 = Byteop3p (r1:0, r3:2) (lO); - R0 = BYTEOP3P (R1:0, R3:2) (HI); - R1 = byteop3p (r1:0, r3:2) (LO, r); - r2 = ByteOp3P (r1:0, R3:2) (hi, R); - - .text - .global dual16 -dual16: - R5 = A1.l + A1.h, R2 = a0.l + a0.h; - - .text - .global byteop16p -byteop16p: - (r2, r3) = BYTEOP16P (R1:0, R3:2); - (R6, R0) = byteop16p (r1:0, r3:2) (r); - - .text - .global byteop1p -byteop1p: - R7 = BYTEOP1P (R1:0, R3:2); - r2 = byteop1p (r1:0, r3:2) (t); - R3 = ByteOp1P (r1:0, R3:2) (R); - r7 = byteOP1P (R1:0, r3:2) (T, r); - - .text - .global byteop2p -byteop2p: - R0 = BYTEOP2P (R1:0, R3:2) (RNDL); - r1 = byteop2p (r1:0, r3:2) (rndh); - R2 = Byteop2p (R1:0, R3:2) (tL); - R3 = Byteop2p (r1:0, r3:2) (TH); - r4 = ByTEOP2P (r1:0, R3:2) (Rndl, R); - R5 = byTeOp2p (R1:0, r3:2) (rndH, r); - r6 = BYTEop2p (r1:0, r3:2) (tl, R); - R7 = byteop2p (r1:0, R3:2) (TH, r); - - .text - .global bytepack -bytepack: - R5 = BytePack (R0, R3); - - .text - .global byteop16m -byteop16m: - (R6, R2) = ByteOp16M (r1:0, r3:2); - (r0, r5) = byteop16m (R1:0, R3:2) (r); - - .text - .global saa -saa: - saa(r1:0, r3:2); - SAA (R1:0, R3:2) (r); - - .text - .global byteunpack -byteunpack: - (R7, R2) = byteunpack R1:0; - (R6, R4) = BYTEUNPACK r3:2 (R); - - diff --git a/binutils-2.17/gas/testsuite/gas/bfin/video2.d b/binutils-2.17/gas/testsuite/gas/bfin/video2.d deleted file mode 100644 index 90be24b3..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/video2.d +++ /dev/null @@ -1,148 +0,0 @@ -#objdump: -dr -#name: video2 -.*: +file format .* - -Disassembly of section .text: - -00000000 <.text>: - 0: 0d c6 00 00 R0=ALIGN8\(R0,R0\); - 4: 0d c6 08 00 R0=ALIGN8\(R0,R1\); - 8: 0d c6 01 00 R0=ALIGN8\(R1,R0\); - c: 0d c6 09 00 R0=ALIGN8\(R1,R1\); - 10: 0d c6 11 00 R0=ALIGN8\(R1,R2\); - 14: 0d c6 2c 06 R3=ALIGN8\(R4,R5\); - 18: 0d c6 07 0c R6=ALIGN8\(R7,R0\); - 1c: 0d c6 1a 02 R1=ALIGN8\(R2,R3\); - 20: 0d c6 35 08 R4=ALIGN8\(R5,R6\); - 24: 0d c6 08 0e R7=ALIGN8\(R0,R1\); - 28: 0d c6 23 04 R2=ALIGN8\(R3,R4\); - 2c: 0d c6 3e 0a R5=ALIGN8\(R6,R7\); - 30: 0d c6 00 40 R0=ALIGN16\(R0,R0\); - 34: 0d c6 08 40 R0=ALIGN16\(R0,R1\); - 38: 0d c6 01 40 R0=ALIGN16\(R1,R0\); - 3c: 0d c6 09 40 R0=ALIGN16\(R1,R1\); - 40: 0d c6 11 40 R0=ALIGN16\(R1,R2\); - 44: 0d c6 2c 46 R3=ALIGN16\(R4,R5\); - 48: 0d c6 07 4c R6=ALIGN16\(R7,R0\); - 4c: 0d c6 1a 42 R1=ALIGN16\(R2,R3\); - 50: 0d c6 35 48 R4=ALIGN16\(R5,R6\); - 54: 0d c6 08 4e R7=ALIGN16\(R0,R1\); - 58: 0d c6 23 44 R2=ALIGN16\(R3,R4\); - 5c: 0d c6 3e 4a R5=ALIGN16\(R6,R7\); - 60: 0d c6 00 80 R0=ALIGN24\(R0,R0\); - 64: 0d c6 08 80 R0=ALIGN24\(R0,R1\); - 68: 0d c6 01 80 R0=ALIGN24\(R1,R0\); - 6c: 0d c6 09 80 R0=ALIGN24\(R1,R1\); - 70: 0d c6 11 80 R0=ALIGN24\(R1,R2\); - 74: 0d c6 2c 86 R3=ALIGN24\(R4,R5\); - 78: 0d c6 07 8c R6=ALIGN24\(R7,R0\); - 7c: 0d c6 1a 82 R1=ALIGN24\(R2,R3\); - 80: 0d c6 35 88 R4=ALIGN24\(R5,R6\); - 84: 0d c6 08 8e R7=ALIGN24\(R0,R1\); - 88: 0d c6 23 84 R2=ALIGN24\(R3,R4\); - 8c: 0d c6 3e 8a R5=ALIGN24\(R6,R7\); - 90: 12 c4 00 c0 DISALGNEXCPT; - 94: 17 c4 02 00 R0=BYTEOP3P\(R1:0x0,R3:0x2\)\(LO\); - 98: 37 c4 02 02 R1=BYTEOP3P\(R1:0x0,R3:0x2\)\(HI\); - 9c: 17 c4 02 24 R2=BYTEOP3P\(R1:0x0,R3:0x2\)\(LO, R\); - a0: 37 c4 02 26 R3=BYTEOP3P\(R1:0x0,R3:0x2\)\(HI, R\); - a4: 17 c4 10 08 R4=BYTEOP3P\(R3:0x2,R1:0x0\)\(LO\); - a8: 37 c4 10 0a R5=BYTEOP3P\(R3:0x2,R1:0x0\)\(HI\); - ac: 17 c4 10 2c R6=BYTEOP3P\(R3:0x2,R1:0x0\)\(LO, R\); - b0: 37 c4 10 2e R7=BYTEOP3P\(R3:0x2,R1:0x0\)\(HI, R\); - b4: 0c c4 [0-3][[:xdigit:]] 40 R0=A1.L\+A1.H,R0=A0.L\+A0.H; - b8: 0c c4 [0-3][[:xdigit:]] 42 R0=A1.L\+A1.H,R1=A0.L\+A0.H; - bc: 0c c4 [8|9|a|b][[:xdigit:]] 46 R2=A1.L\+A1.H,R3=A0.L\+A0.H; - c0: 0c c4 [0-3][[:xdigit:]] 4b R4=A1.L\+A1.H,R5=A0.L\+A0.H; - c4: 0c c4 [8|9|a|b][[:xdigit:]] 4f R6=A1.L\+A1.H,R7=A0.L\+A0.H; - c8: 15 c4 d0 01 \(R7,R0\)=BYTEOP16P\(R3:0x2,R1:0x0\) ; - cc: 15 c4 50 04 \(R1,R2\)=BYTEOP16P\(R3:0x2,R1:0x0\) ; - d0: 15 c4 10 02 \(R0,R1\)=BYTEOP16P\(R3:0x2,R1:0x0\) ; - d4: 15 c4 90 06 \(R2,R3\)=BYTEOP16P\(R3:0x2,R1:0x0\) ; - d8: 15 c4 c2 01 \(R7,R0\)=BYTEOP16P\(R1:0x0,R3:0x2\) ; - dc: 15 c4 42 04 \(R1,R2\)=BYTEOP16P\(R1:0x0,R3:0x2\) ; - e0: 15 c4 02 02 \(R0,R1\)=BYTEOP16P\(R1:0x0,R3:0x2\) ; - e4: 15 c4 82 06 \(R2,R3\)=BYTEOP16P\(R1:0x0,R3:0x2\) ; - e8: 15 c4 d0 21 \(R7,R0\)=BYTEOP16P\(R3:0x2,R1:0x0\) \(R\); - ec: 15 c4 50 24 \(R1,R2\)=BYTEOP16P\(R3:0x2,R1:0x0\) \(R\); - f0: 15 c4 10 22 \(R0,R1\)=BYTEOP16P\(R3:0x2,R1:0x0\) \(R\); - f4: 15 c4 90 26 \(R2,R3\)=BYTEOP16P\(R3:0x2,R1:0x0\) \(R\); - f8: 15 c4 c2 21 \(R7,R0\)=BYTEOP16P\(R1:0x0,R3:0x2\) \(R\); - fc: 15 c4 42 24 \(R1,R2\)=BYTEOP16P\(R1:0x0,R3:0x2\) \(R\); - 100: 15 c4 02 22 \(R0,R1\)=BYTEOP16P\(R1:0x0,R3:0x2\) \(R\); - 104: 15 c4 82 26 \(R2,R3\)=BYTEOP16P\(R1:0x0,R3:0x2\) \(R\); - 108: 14 c4 02 06 R3=BYTEOP1P\(R1:0x0,R3:0x2\); - 10c: 14 c4 02 26 R3=BYTEOP1P\(R1:0x0,R3:0x2\)\(R\); - 110: 14 c4 02 46 R3=BYTEOP1P\(R1:0x0,R3:0x2\)\(T\); - 114: 14 c4 02 66 R3=BYTEOP1P\(R1:0x0,R3:0x2\)\(T, R\); - 118: 14 c4 10 00 R0=BYTEOP1P\(R3:0x2,R1:0x0\); - 11c: 14 c4 10 22 R1=BYTEOP1P\(R3:0x2,R1:0x0\)\(R\); - 120: 14 c4 10 44 R2=BYTEOP1P\(R3:0x2,R1:0x0\)\(T\); - 124: 14 c4 10 66 R3=BYTEOP1P\(R3:0x2,R1:0x0\)\(T, R\); - 128: 16 c4 02 06 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDL\); - 12c: 36 c4 02 06 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDH\); - 130: 16 c4 02 46 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(TL\); - 134: 36 c4 02 46 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(TH\); - 138: 16 c4 02 26 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDL, R\); - 13c: 36 c4 02 26 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDH, R\); - 140: 16 c4 02 66 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(TL, R\); - 144: 36 c4 02 66 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(TH, R\); - 148: 16 c4 02 00 R0=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDL\); - 14c: 36 c4 02 02 R1=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDH\); - 150: 16 c4 02 44 R2=BYTEOP2P\(R1:0x0,R3:0x2\)\(TL\); - 154: 36 c4 02 46 R3=BYTEOP2P\(R1:0x0,R3:0x2\)\(TH\); - 158: 16 c4 02 28 R4=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDL, R\); - 15c: 36 c4 02 2a R5=BYTEOP2P\(R1:0x0,R3:0x2\)\(RNDH, R\); - 160: 16 c4 02 6c R6=BYTEOP2P\(R1:0x0,R3:0x2\)\(TL, R\); - 164: 36 c4 02 6e R7=BYTEOP2P\(R1:0x0,R3:0x2\)\(TH, R\); - 168: 16 c4 12 00 R0=BYTEOP2P\(R3:0x2,R3:0x2\)\(RNDL\); - 16c: 36 c4 12 02 R1=BYTEOP2P\(R3:0x2,R3:0x2\)\(RNDH\); - 170: 16 c4 12 44 R2=BYTEOP2P\(R3:0x2,R3:0x2\)\(TL\); - 174: 36 c4 12 46 R3=BYTEOP2P\(R3:0x2,R3:0x2\)\(TH\); - 178: 16 c4 12 28 R4=BYTEOP2P\(R3:0x2,R3:0x2\)\(RNDL, R\); - 17c: 36 c4 12 2a R5=BYTEOP2P\(R3:0x2,R3:0x2\)\(RNDH, R\); - 180: 16 c4 12 6c R6=BYTEOP2P\(R3:0x2,R3:0x2\)\(TL, R\); - 184: 36 c4 12 6e R7=BYTEOP2P\(R3:0x2,R3:0x2\)\(TH, R\); - 188: 18 c4 00 00 R0=BYTEPACK\(R0,R0\); - 18c: 18 c4 13 02 R1=BYTEPACK\(R2,R3\); - 190: 18 c4 2e 08 R4=BYTEPACK\(R5,R6\); - 194: 18 c4 01 0e R7=BYTEPACK\(R0,R1\); - 198: 18 c4 1c 04 R2=BYTEPACK\(R3,R4\); - 19c: 18 c4 37 0a R5=BYTEPACK\(R6,R7\); - 1a0: 15 c4 50 44 \(R1,R2\)=BYTEOP16M\(R3:0x2,R1:0x0\) ; - 1a4: 15 c4 50 64 \(R1,R2\)=BYTEOP16M\(R3:0x2,R1:0x0\) \(R\); - 1a8: 15 c4 10 42 \(R0,R1\)=BYTEOP16M\(R3:0x2,R1:0x0\) ; - 1ac: 15 c4 90 66 \(R2,R3\)=BYTEOP16M\(R3:0x2,R1:0x0\) \(R\); - 1b0: 15 c4 d0 4a \(R3,R5\)=BYTEOP16M\(R3:0x2,R1:0x0\) ; - 1b4: 15 c4 90 6f \(R6,R7\)=BYTEOP16M\(R3:0x2,R1:0x0\) \(R\); - 1b8: 15 c4 40 44 \(R1,R2\)=BYTEOP16M\(R1:0x0,R1:0x0\) ; - 1bc: 15 c4 40 64 \(R1,R2\)=BYTEOP16M\(R1:0x0,R1:0x0\) \(R\); - 1c0: 15 c4 00 42 \(R0,R1\)=BYTEOP16M\(R1:0x0,R1:0x0\) ; - 1c4: 15 c4 80 66 \(R2,R3\)=BYTEOP16M\(R1:0x0,R1:0x0\) \(R\); - 1c8: 15 c4 c0 4a \(R3,R5\)=BYTEOP16M\(R1:0x0,R1:0x0\) ; - 1cc: 15 c4 80 6f \(R6,R7\)=BYTEOP16M\(R1:0x0,R1:0x0\) \(R\); - 1d0: 15 c4 42 44 \(R1,R2\)=BYTEOP16M\(R1:0x0,R3:0x2\) ; - 1d4: 15 c4 42 64 \(R1,R2\)=BYTEOP16M\(R1:0x0,R3:0x2\) \(R\); - 1d8: 15 c4 02 42 \(R0,R1\)=BYTEOP16M\(R1:0x0,R3:0x2\) ; - 1dc: 15 c4 82 66 \(R2,R3\)=BYTEOP16M\(R1:0x0,R3:0x2\) \(R\); - 1e0: 15 c4 c2 4a \(R3,R5\)=BYTEOP16M\(R1:0x0,R3:0x2\) ; - 1e4: 15 c4 82 6f \(R6,R7\)=BYTEOP16M\(R1:0x0,R3:0x2\) \(R\); - 1e8: 15 c4 52 44 \(R1,R2\)=BYTEOP16M\(R3:0x2,R3:0x2\) ; - 1ec: 15 c4 52 64 \(R1,R2\)=BYTEOP16M\(R3:0x2,R3:0x2\) \(R\); - 1f0: 15 c4 12 42 \(R0,R1\)=BYTEOP16M\(R3:0x2,R3:0x2\) ; - 1f4: 15 c4 92 66 \(R2,R3\)=BYTEOP16M\(R3:0x2,R3:0x2\) \(R\); - 1f8: 15 c4 d2 4a \(R3,R5\)=BYTEOP16M\(R3:0x2,R3:0x2\) ; - 1fc: 15 c4 92 6f \(R6,R7\)=BYTEOP16M\(R3:0x2,R3:0x2\) \(R\); - 200: 12 cc 02 00 SAA\(R1:0x0,R3:0x2\) \|\| R0=\[I0\+\+\] \|\| R2=\[I1\+\+\]; - 204: 00 9c 0a 9c - 208: 12 cc 02 20 SAA\(R1:0x0,R3:0x2\) \(R\) \|\| R1=\[I0\+\+\] \|\| R3=\[I1\+\+\]; - 20c: 01 9c 0b 9c - 210: 12 c4 02 00 SAA\(R1:0x0,R3:0x2\) ; - 214: 18 c4 80 4b \(R6,R5\) = BYTEUNPACK R1:0x0 ; - 218: 18 c4 80 6b \(R6,R5\) = BYTEUNPACK R1:0x0 \(R\); - 21c: 18 c4 90 4b \(R6,R5\) = BYTEUNPACK R3:0x2 ; - 220: 18 c4 90 6b \(R6,R5\) = BYTEUNPACK R3:0x2 \(R\); - 224: 18 c4 00 42 \(R0,R1\) = BYTEUNPACK R1:0x0 ; - 228: 18 c4 80 66 \(R2,R3\) = BYTEUNPACK R1:0x0 \(R\); - 22c: 18 c4 10 4b \(R4,R5\) = BYTEUNPACK R3:0x2 ; - 230: 18 c4 90 6f \(R6,R7\) = BYTEUNPACK R3:0x2 \(R\); diff --git a/binutils-2.17/gas/testsuite/gas/bfin/video2.s b/binutils-2.17/gas/testsuite/gas/bfin/video2.s deleted file mode 100755 index 16b0ff11..00000000 --- a/binutils-2.17/gas/testsuite/gas/bfin/video2.s +++ /dev/null @@ -1,220 +0,0 @@ -
-.EXTERN MY_LABEL2;
-.section .text;
-
-//
-//13 VIDEO PIXEL OPERATIONS
-//
-
-//Dreg = ALIGN8 ( Dreg, Dreg ) ; /* overlay 1 byte (b) */
-R0 = ALIGN8(R0, R0);
-R0 = ALIGN8(R0, R1);
-R0 = ALIGN8(R1, R0);
-R0 = ALIGN8(R1, R1);
-R0 = ALIGN8(R1, R2);
-R3 = ALIGN8(R4, R5);
-R6 = ALIGN8(R7, R0);
-R1 = ALIGN8(R2, R3);
-R4 = ALIGN8(R5, R6);
-R7 = ALIGN8(R0, R1);
-R2 = ALIGN8(R3, R4);
-R5 = ALIGN8(R6, R7);
-
-//Dreg = ALIGN16 ( Dreg, Dreg ) ; /* overlay 2 bytes (b) */
-R0 = ALIGN16(R0, R0);
-R0 = ALIGN16(R0, R1);
-R0 = ALIGN16(R1, R0);
-R0 = ALIGN16(R1, R1);
-R0 = ALIGN16(R1, R2);
-R3 = ALIGN16(R4, R5);
-R6 = ALIGN16(R7, R0);
-R1 = ALIGN16(R2, R3);
-R4 = ALIGN16(R5, R6);
-R7 = ALIGN16(R0, R1);
-R2 = ALIGN16(R3, R4);
-R5 = ALIGN16(R6, R7);
-
-//Dreg = ALIGN24 ( Dreg, Dreg ) ; /* overlay 3 bytes (b) */
-R0 = ALIGN24(R0, R0);
-R0 = ALIGN24(R0, R1);
-R0 = ALIGN24(R1, R0);
-R0 = ALIGN24(R1, R1);
-R0 = ALIGN24(R1, R2);
-R3 = ALIGN24(R4, R5);
-R6 = ALIGN24(R7, R0);
-R1 = ALIGN24(R2, R3);
-R4 = ALIGN24(R5, R6);
-R7 = ALIGN24(R0, R1);
-R2 = ALIGN24(R3, R4);
-R5 = ALIGN24(R6, R7);
-
-DISALGNEXCPT ; /* (b) */
-
-/* forward byte order operands */
-//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO) ; /* sum into low bytes (b) */
-//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI) ; /* sum into high bytes (b) */
-/* reverse byte order operands */
-//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO, R) ; /* sum into low bytes (b) */
-//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI, R) ; /* sum into high bytes (b) */
-
-r0 = byteop3p (r1:0, r3:2) (lo) ;
-r1 = byteop3p (r1:0, r3:2) (hi) ;
-r2 = byteop3p (r1:0, r3:2) (lo, r) ;
-r3 = byteop3p (r1:0, r3:2) (hi, r) ;
-r4 = byteop3p (r3:2, r1:0) (lo) ;
-r5 = byteop3p (r3:2, r1:0) (hi) ;
-r6 = byteop3p (r3:2, r1:0) (lo, r) ;
-r7 = byteop3p (r3:2, r1:0) (hi, r) ;
-
-//Dreg = A1.L + A1.H, Dreg = A0.L + A0.H ; /* (b) */
-
-R0 = A1.L + A1.H, R0= A0.L + A0.H ;
-R0 = A1.L + A1.H, R1= A0.L + A0.H ;
-R2 = A1.L + A1.H, R3= A0.L + A0.H ;
-R4 = A1.L + A1.H, R5= A0.L + A0.H ;
-R6 = A1.L + A1.H, R7= A0.L + A0.H ;
-
-/* forward byte order operands */
-//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) ; /* (b) */
-(r7,r0) = BYTEOP16P ( r3:2,r1:0 ) ;
-(r1,r2) = byteop16p (r3:2,r1:0) ;
-(r0,r1) = BYTEOP16P ( r3:2,r1:0 ) ;
-(r2,r3) = byteop16p (r3:2,r1:0) ;
-(r7,r0) = BYTEOP16P (r1:0, r3:2) ;
-(r1,r2) = byteop16p (r1:0,r3:2) ;
-(r0,r1) = BYTEOP16P (r1:0, r3:2) ;
-(r2,r3) = byteop16p (r1:0,r3:2) ;
-
-/* reverse byte order operands */
-//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) (R); /* (b) */
-(r7,r0) = BYTEOP16P ( r3:2,r1:0 )(r) ;
-(r1,r2) = byteop16p (r3:2,r1:0)(r) ;
-(r0,r1) = BYTEOP16P ( r3:2,r1:0 )(r) ;
-(r2,r3) = byteop16p (r3:2,r1:0)(r) ;
-(r7,r0) = BYTEOP16P (r1:0, r3:2)(r) ;
-(r1,r2) = byteop16p (r1:0,r3:2)(r) ;
-(r0,r1) = BYTEOP16P (r1:0, r3:2)(r) ;
-(r2,r3) = byteop16p (r1:0,r3:2)(r) ;
-
-/* forward byte order operands */
-//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) ; /* (b) */
-//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T) ; /* truncated (b)*/
-/* reverse byte order operands */
-//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (R) ; /* (b) */
-//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T, R) ; /* truncated (b) */
-
-r3 = byteop1p (r1:0, r3:2) ;
-r3 = byteop1p (r1:0, r3:2) (r) ;
-r3 = byteop1p (r1:0, r3:2) (t) ;
-r3 = byteop1p (r1:0, r3:2) (t,r) ;
-
-r0 = byteop1p (r3:2,r1:0);
-r1 = byteop1p (r3:2,r1:0)(r) ;
-r2 = byteop1p (r3:2,r1:0)(t) ;
-r3 = byteop1p (r3:2,r1:0)(t,r) ;
-
-/* forward byte order operands */
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL) ;
-/* round into low bytes (b) */
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH) ;
-/* round into high bytes (b) */
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL) ;
-/* truncate into low bytes (b) */
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH) ;
-/* truncate into high bytes (b) */
-/* reverse byte order operands */
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL, R) ;
-/* round into low bytes (b) */
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH, R) ;
-/* round into high bytes (b) */
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL, R) ;
-/* truncate into low bytes (b) */
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH, R) ;
-/* truncate into high bytes (b) */
-
-r3 = byteop2p (r1:0, r3:2) (rndl) ;
-r3 = byteop2p (r1:0, r3:2) (rndh) ;
-r3 = byteop2p (r1:0, r3:2) (tl) ;
-r3 = byteop2p (r1:0, r3:2) (th) ;
-r3 = byteop2p (r1:0, r3:2) (rndl, r) ;
-r3 = byteop2p (r1:0, r3:2) (rndh, r) ;
-r3 = byteop2p (r1:0, r3:2) (tl, r) ;
-r3 = byteop2p (r1:0, r3:2) (th, r) ;
-
-r0 = byteop2p (r1:0, r3:2) (rndl) ;
-r1 = byteop2p (r1:0, r3:2) (rndh) ;
-r2 = byteop2p (r1:0, r3:2) (tl) ;
-r3 = byteop2p (r1:0, r3:2) (th) ;
-r4 = byteop2p (r1:0, r3:2) (rndl, r) ;
-r5 = byteop2p (r1:0, r3:2) (rndh, r) ;
-r6 = byteop2p (r1:0, r3:2) (tl, r) ;
-r7 = byteop2p (r1:0, r3:2) (th, r) ;
-
-r0 = byteop2p (r3:2, r3:2) (rndl) ;
-r1 = byteop2p (r3:2, r3:2) (rndh) ;
-r2 = byteop2p (r3:2, r3:2) (tl) ;
-r3 = byteop2p (r3:2, r3:2) (th) ;
-r4 = byteop2p (r3:2, r3:2) (rndl, r) ;
-r5 = byteop2p (r3:2, r3:2) (rndh, r) ;
-r6 = byteop2p (r3:2, r3:2) (tl, r) ;
-r7 = byteop2p (r3:2, r3:2) (th, r) ;
-
-//Dreg = BYTEPACK ( Dreg, Dreg ) ; /* (b) */
-r0 = bytepack (r0,r0) ;
-r1 = bytepack (r2,r3) ;
-r4 = bytepack (r5,r6) ;
-r7 = bytepack (r0,r1) ;
-r2 = bytepack (r3,r4) ;
-r5 = bytepack (r6,r7) ;
-
-/* forward byte order operands */
-//(Dreg, Dreg) = BYTEOP16M (Dreg_pair, Dreg_pair) ; /* (b */)
-/* reverse byte order operands */
-//(Dreg, Dreg) = BYTEOP16M (Dreg-pair, Dreg-pair) (R) ; /* (b) */
-
-(r1,r2)= byteop16m (r3:2,r1:0) ;
-(r1,r2)= byteop16m (r3:2,r1:0) (r) ;
-(r0,r1)= byteop16m (r3:2,r1:0) ;
-(r2,r3)= byteop16m (r3:2,r1:0) (r) ;
-(r3,r5)= byteop16m (r3:2,r1:0) ;
-(r6,r7)= byteop16m (r3:2,r1:0) (r) ;
-
-(r1,r2)= byteop16m (r1:0,r1:0) ;
-(r1,r2)= byteop16m (r1:0,r1:0) (r) ;
-(r0,r1)= byteop16m (r1:0,r1:0) ;
-(r2,r3)= byteop16m (r1:0,r1:0) (r) ;
-(r3,r5)= byteop16m (r1:0,r1:0) ;
-(r6,r7)= byteop16m (r1:0,r1:0) (r) ;
-
-(r1,r2)= byteop16m (r1:0,r3:2) ;
-(r1,r2)= byteop16m (r1:0,r3:2) (r) ;
-(r0,r1)= byteop16m (r1:0,r3:2) ;
-(r2,r3)= byteop16m (r1:0,r3:2) (r) ;
-(r3,r5)= byteop16m (r1:0,r3:2) ;
-(r6,r7)= byteop16m (r1:0,r3:2) (r) ;
-
-(r1,r2)= byteop16m (r3:2,r3:2) ;
-(r1,r2)= byteop16m (r3:2,r3:2) (r) ;
-(r0,r1)= byteop16m (r3:2,r3:2) ;
-(r2,r3)= byteop16m (r3:2,r3:2) (r) ;
-(r3,r5)= byteop16m (r3:2,r3:2) ;
-(r6,r7)= byteop16m (r3:2,r3:2) (r) ;
-
-//SAA (Dreg_pair, Dreg_pair) ; /* forward byte order operands (b) */
-//SAA (Dreg_pair, Dreg_pair) (R) ; /* reverse byte order operands (b) */
-
-saa(r1:0, r3:2) || r0 = [i0++] || r2 = [i1++] ; /* parallel fill instructions */
-saa (r1:0, r3:2) (R) || r1 = [i0++] || r3 = [i1++] ; /* reverse, parallel fill instructions */
-saa (r1:0, r3:2) ; /* last SAA in a loop, no more fill required */
-
-//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair ; /* (b) */
-//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair (R) ; /* reverse source order (b) */
-
-(r6,r5) = byteunpack r1:0 ; /* non-reversing sources */
-(r6,r5) = byteunpack r1:0 (R) ; /* reversing sources case */
-(r6,r5) = byteunpack r3:2 ; /* non-reversing sources */
-(r6,r5) = byteunpack r3:2 (R) ; /* reversing sources case */
-(r0,r1) = byteunpack r1:0 ; /* non-reversing sources */
-(r2,r3) = byteunpack r1:0 (R) ; /* reversing sources case */
-(r4,r5) = byteunpack r3:2 ; /* non-reversing sources */
-(r6,r7) = byteunpack r3:2 (R) ; /* reversing sources case */
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