diff options
author | Andrew Hsieh <andrewhsieh@google.com> | 2014-06-13 12:38:00 -0700 |
---|---|---|
committer | Andrew Hsieh <andrewhsieh@google.com> | 2014-06-13 12:38:00 -0700 |
commit | 54f1b3cf509cd889905287cb8ce6c5ae33911a21 (patch) | |
tree | e39b1a7fa04db86a8215b7f9d4656d74e394aec0 /binutils-2.25/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-umips-only.od | |
parent | 2a6558a8ecfb81d75215b4ec7dc61113e12cfd5f (diff) | |
download | toolchain_binutils-54f1b3cf509cd889905287cb8ce6c5ae33911a21.tar.gz toolchain_binutils-54f1b3cf509cd889905287cb8ce6c5ae33911a21.tar.bz2 toolchain_binutils-54f1b3cf509cd889905287cb8ce6c5ae33911a21.zip |
Add upstream binutils-2.25 snapshot 4/4 2014
For MIPS -mmsa support
Change-Id: I08c4f002fa7b33dec85ed75956e6ab551bb03c96
Diffstat (limited to 'binutils-2.25/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-umips-only.od')
-rw-r--r-- | binutils-2.25/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-umips-only.od | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-umips-only.od b/binutils-2.25/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-umips-only.od new file mode 100644 index 00000000..b7d7241b --- /dev/null +++ b/binutils-2.25/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-umips-only.od @@ -0,0 +1,111 @@ + +.* file format .* + + +Disassembly of section \.plt: + +# All entries must be microMIPS. +10100000 <_PROCEDURE_LINKAGE_TABLE_>: +.*: 7984 0000 addiu \$3,\$pc,1048576 +.*: ff23 0000 lw \$25,0\(\$3\) +.*: 0535 subu \$2,\$2,\$3 +.*: 2525 srl \$2,\$2,2 +.*: 3302 fffe addiu \$24,\$2,-2 +.*: 0dff move \$15,\$31 +.*: 45f9 jalrs \$25 +.*: 0f83 move \$28,\$3 +.*: 0c00 nop + +10100018 <f_lo_ic@micromipsplt>: +.*: 7903 fffc addiu \$2,\$pc,1048560 +# ^ 0x10200008 +.*: ff22 0000 lw \$25,0\(\$2\) +.*: 4599 jr \$25 +.*: 0f02 move \$24,\$2 + +10100024 <f_lo_dc@micromipsplt>: +.*: 7903 fffa addiu \$2,\$pc,1048552 +# ^ 0x1020000c +.*: ff22 0000 lw \$25,0\(\$2\) +.*: 4599 jr \$25 +.*: 0f02 move \$24,\$2 + +10100030 <f_dc@micromipsplt>: +.*: 7903 fff8 addiu \$2,\$pc,1048544 +# ^ 0x10200010 +.*: ff22 0000 lw \$25,0\(\$2\) +.*: 4599 jr \$25 +.*: 0f02 move \$24,\$2 + +1010003c <f_ic_dc@micromipsplt>: +.*: 7903 fff6 addiu \$2,\$pc,1048536 +# ^ 0x10200014 +.*: ff22 0000 lw \$25,0\(\$2\) +.*: 4599 jr \$25 +.*: 0f02 move \$24,\$2 + +10100048 <f_lo_ic_dc@micromipsplt>: +.*: 7903 fff4 addiu \$2,\$pc,1048528 +# ^ 0x10200018 +.*: ff22 0000 lw \$25,0\(\$2\) +.*: 4599 jr \$25 +.*: 0f02 move \$24,\$2 + +10100054 <f_lo@micromipsplt>: +.*: 7903 fff2 addiu \$2,\$pc,1048520 +# ^ 0x1020001c +.*: ff22 0000 lw \$25,0\(\$2\) +.*: 4599 jr \$25 +.*: 0f02 move \$24,\$2 + +Disassembly of section \.MIPS\.stubs: + +10101000 <_MIPS_STUBS_>: +# Lazy-binding stub for f_ic. +.*: ff3c 8010 lw \$25,-32752\(\$28\) +.*: 0dff move \$15,\$31 +.*: 45d9 jalr \$25 +.*: 3300 0009 li \$24,9 + \.\.\. + +Disassembly of section \.text\.a: + +10102000 <testc>: +.*: .... .... jal [0-9a-f]+ <f_dc@micromipsplt> +.*: 0000 0000 nop +.*: .... .... j [0-9a-f]+ <f_dc@micromipsplt> +.*: 0c00 nop +.*: fc43 8024 lw \$2,-32732\(\$3\) +# ^ global GOT entry for f_ic +.*: .... .... jal [0-9a-f]+ <f_ic_dc@micromipsplt> +.*: 0000 0000 nop +.*: .... .... j [0-9a-f]+ <f_ic_dc@micromipsplt> +.*: 0c00 nop +.*: fc43 8018 lw \$2,-32744\(\$3\) +# ^ local GOT entry for f_ic_dc@micromipsplt +.*: .... .... jal [0-9a-f]+ <f_lo_dc@micromipsplt> +.*: 0000 0000 nop +.*: .... .... j [0-9a-f]+ <f_lo_dc@micromipsplt> +.*: 0c00 nop +.*: fc43 801c lw \$2,-32740\(\$3\) +# ^ local GOT entry for f_lo_ic@micromipsplt +.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@micromipsplt> +.*: 0000 0000 nop +.*: .... .... j [0-9a-f]+ <f_lo_ic_dc@micromipsplt> +.*: 0c00 nop +.*: fc43 8020 lw \$2,-32736\(\$3\) +# ^ local GOT entry for f_lo_ic_dc@micromipsplt +.*: 459f jr \$31 + +Disassembly of section \.text\.c: + +10103000 <testlo>: +.*: 3040 0055 li \$2,85 +# ^ low 16 bits of f_lo@micromipsplt +.*: 3040 0025 li \$2,37 +# ^ low 16 bits of f_lo_dc@micromipsplt +.*: 3040 0019 li \$2,25 +# ^ low 16 bits of f_lo_ic@micromipsplt +.*: 3040 0049 li \$2,73 +# ^ low 16 bits of f_lo_ic_dc@micromipsplt + |