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| author | Andrew Hsieh <andrewhsieh@google.com> | 2014-06-13 12:38:00 -0700 |
|---|---|---|
| committer | Andrew Hsieh <andrewhsieh@google.com> | 2014-06-13 12:38:00 -0700 |
| commit | 54f1b3cf509cd889905287cb8ce6c5ae33911a21 (patch) | |
| tree | e39b1a7fa04db86a8215b7f9d4656d74e394aec0 /binutils-2.25/ld/testsuite/ld-arm/group-relocs.d | |
| parent | 2a6558a8ecfb81d75215b4ec7dc61113e12cfd5f (diff) | |
| download | toolchain_binutils-54f1b3cf509cd889905287cb8ce6c5ae33911a21.tar.gz toolchain_binutils-54f1b3cf509cd889905287cb8ce6c5ae33911a21.tar.bz2 toolchain_binutils-54f1b3cf509cd889905287cb8ce6c5ae33911a21.zip | |
Add upstream binutils-2.25 snapshot 4/4 2014
For MIPS -mmsa support
Change-Id: I08c4f002fa7b33dec85ed75956e6ab551bb03c96
Diffstat (limited to 'binutils-2.25/ld/testsuite/ld-arm/group-relocs.d')
| -rw-r--r-- | binutils-2.25/ld/testsuite/ld-arm/group-relocs.d | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/binutils-2.25/ld/testsuite/ld-arm/group-relocs.d b/binutils-2.25/ld/testsuite/ld-arm/group-relocs.d new file mode 100644 index 00000000..d928261b --- /dev/null +++ b/binutils-2.25/ld/testsuite/ld-arm/group-relocs.d @@ -0,0 +1,67 @@ + +tmpdir/group-relocs: file format elf32-(little|big)arm.* + +Disassembly of section .text: + +00008000 <_start>: + 8000: e28f00bc add r0, pc, #188 ; 0xbc + 8004: e28f0c6e add r0, pc, #28160 ; 0x6e00 + 8008: e28000ec add r0, r0, #236 ; 0xec + 800c: e28f08ff add r0, pc, #16711680 ; 0xff0000 + 8010: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8014: e28000e4 add r0, r0, #228 ; 0xe4 + 8018: e280000c add r0, r0, #12 + 801c: e2800cee add r0, r0, #60928 ; 0xee00 + 8020: e28000f0 add r0, r0, #240 ; 0xf0 + 8024: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8028: e2800cee add r0, r0, #60928 ; 0xee00 + 802c: e28000f0 add r0, r0, #240 ; 0xf0 + 8030: e28f0c6e add r0, pc, #28160 ; 0x6e00 + 8034: e59010c0 ldr r1, \[r0, #192\].* + 8038: e28f08ff add r0, pc, #16711680 ; 0xff0000 + 803c: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8040: e59010b8 ldr r1, \[r0, #184\].* + 8044: e590100c ldr r1, \[r0, #12\] + 8048: e2800cee add r0, r0, #60928 ; 0xee00 + 804c: e59010f0 ldr r1, \[r0, #240\].* + 8050: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8054: e2800cee add r0, r0, #60928 ; 0xee00 + 8058: e59010f0 ldr r1, \[r0, #240\].* + 805c: e1cf26d0 ldrd r2, \[pc, #96\].* + 8060: e28f0c6e add r0, pc, #28160 ; 0x6e00 + 8064: e1c029d0 ldrd r2, \[r0, #144\].* + 8068: e28f08ff add r0, pc, #16711680 ; 0xff0000 + 806c: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8070: e1c028d8 ldrd r2, \[r0, #136\].* + 8074: e1c020dc ldrd r2, \[r0, #12\] + 8078: e2800cee add r0, r0, #60928 ; 0xee00 + 807c: e1c02fd0 ldrd r2, \[r0, #240\].* + 8080: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8084: e2800cee add r0, r0, #60928 ; 0xee00 + 8088: e1c02fd0 ldrd r2, \[r0, #240\].* + 808c: ed9f000c ldc 0, cr0, \[pc, #48\].* + 8090: e28f0c6e add r0, pc, #28160 ; 0x6e00 + 8094: ed900018 ldc 0, cr0, \[r0, #96\].* + 8098: e28f08ff add r0, pc, #16711680 ; 0xff0000 + 809c: e2800c6e add r0, r0, #28160 ; 0x6e00 + 80a0: ed900016 ldc 0, cr0, \[r0, #88\].* + 80a4: ed900003 ldc 0, cr0, \[r0, #12\] + 80a8: e2800cee add r0, r0, #60928 ; 0xee00 + 80ac: ed90003c ldc 0, cr0, \[r0, #240\].* + 80b0: e28008ff add r0, r0, #16711680 ; 0xff0000 + 80b4: e2800cee add r0, r0, #60928 ; 0xee00 + 80b8: ed90003c ldc 0, cr0, \[r0, #240\].* + +000080bc <one_group_needed_alu_pc>: + 80bc: e3a00000 mov r0, #0 + +Disassembly of section alpha: + +0000eef0 <two_groups_needed_alu_pc>: + eef0: e3a00000 mov r0, #0 + +Disassembly of section beta: + +00ffeef0 <three_groups_needed_alu_pc>: + ffeef0: e3a00000 mov r0, #0 +#... |