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authorAndrew Hsieh <andrewhsieh@google.com>2014-06-13 12:38:00 -0700
committerAndrew Hsieh <andrewhsieh@google.com>2014-06-13 12:38:00 -0700
commit54f1b3cf509cd889905287cb8ce6c5ae33911a21 (patch)
treee39b1a7fa04db86a8215b7f9d4656d74e394aec0 /binutils-2.25/gas/testsuite/gas/mips/micromips@24k-triple-stores-2.d
parent2a6558a8ecfb81d75215b4ec7dc61113e12cfd5f (diff)
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Add upstream binutils-2.25 snapshot 4/4 2014
For MIPS -mmsa support Change-Id: I08c4f002fa7b33dec85ed75956e6ab551bb03c96
Diffstat (limited to 'binutils-2.25/gas/testsuite/gas/mips/micromips@24k-triple-stores-2.d')
-rw-r--r--binutils-2.25/gas/testsuite/gas/mips/micromips@24k-triple-stores-2.d32
1 files changed, 32 insertions, 0 deletions
diff --git a/binutils-2.25/gas/testsuite/gas/mips/micromips@24k-triple-stores-2.d b/binutils-2.25/gas/testsuite/gas/mips/micromips@24k-triple-stores-2.d
new file mode 100644
index 00000000..a7aca167
--- /dev/null
+++ b/binutils-2.25/gas/testsuite/gas/mips/micromips@24k-triple-stores-2.d
@@ -0,0 +1,32 @@
+#objdump: -dr
+#as: -mfix-24k -32
+#name: 24K: Triple Store (Range Check)
+#source: 24k-triple-stores-2.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+
+[0-9a-f]+ <.*>:
+ *[0-9a-f]+: 185d 0000 sb v0,0\(sp\)
+ *[0-9a-f]+: 187d 000a sb v1,10\(sp\)
+ *[0-9a-f]+: 189d 001f sb a0,31\(sp\)
+ *[0-9a-f]+: 4680 break
+ *[0-9a-f]+: 385d 0000 sh v0,0\(sp\)
+ *[0-9a-f]+: 387d fff0 sh v1,-16\(sp\)
+ *[0-9a-f]+: 389d ffe0 sh a0,-32\(sp\)
+ *[0-9a-f]+: 4680 break
+ *[0-9a-f]+: c840 sw v0,0\(sp\)
+ *[0-9a-f]+: f87d fff8 sw v1,-8\(sp\)
+ *[0-9a-f]+: c882 sw a0,8\(sp\)
+ *[0-9a-f]+: 4680 break
+ *[0-9a-f]+: 605d 9000 swr v0,0\(sp\)
+ *[0-9a-f]+: 607d 9ff0 swr v1,-16\(sp\)
+ *[0-9a-f]+: 609d 9010 swr a0,16\(sp\)
+ *[0-9a-f]+: 4680 break
+ *[0-9a-f]+: 605d 8000 swl v0,0\(sp\)
+ *[0-9a-f]+: 607d 8008 swl v1,8\(sp\)
+ *[0-9a-f]+: 609d 8010 swl a0,16\(sp\)
+ *[0-9a-f]+: 60bd 8018 swl a1,24\(sp\)
+ *[0-9a-f]+: 60dd 8000 swl a2,0\(sp\)
+ \.\.\.