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author | Andrew Hsieh <andrewhsieh@google.com> | 2014-06-13 12:38:00 -0700 |
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committer | Andrew Hsieh <andrewhsieh@google.com> | 2014-06-13 12:38:00 -0700 |
commit | 54f1b3cf509cd889905287cb8ce6c5ae33911a21 (patch) | |
tree | e39b1a7fa04db86a8215b7f9d4656d74e394aec0 /binutils-2.25/gas/testsuite/gas/arm/armv1-bad.l | |
parent | 2a6558a8ecfb81d75215b4ec7dc61113e12cfd5f (diff) | |
download | toolchain_binutils-54f1b3cf509cd889905287cb8ce6c5ae33911a21.tar.gz toolchain_binutils-54f1b3cf509cd889905287cb8ce6c5ae33911a21.tar.bz2 toolchain_binutils-54f1b3cf509cd889905287cb8ce6c5ae33911a21.zip |
Add upstream binutils-2.25 snapshot 4/4 2014
For MIPS -mmsa support
Change-Id: I08c4f002fa7b33dec85ed75956e6ab551bb03c96
Diffstat (limited to 'binutils-2.25/gas/testsuite/gas/arm/armv1-bad.l')
-rw-r--r-- | binutils-2.25/gas/testsuite/gas/arm/armv1-bad.l | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/binutils-2.25/gas/testsuite/gas/arm/armv1-bad.l b/binutils-2.25/gas/testsuite/gas/arm/armv1-bad.l new file mode 100644 index 00000000..22090d58 --- /dev/null +++ b/binutils-2.25/gas/testsuite/gas/arm/armv1-bad.l @@ -0,0 +1,9 @@ +[^:]*: Assembler messages: +[^:]*:4: Error: invalid pseudo operation -- `str r0,=0x00ff0000' +[^:]*:5: Error: bad expression -- `ldr r0,{r1}' +[^:]*:6: Error: bad instruction `cmpl r0,r0' +[^:]*:7: Error: selected processor does not support ARM mode `strh r0,\[r1\]' +[^:]*:8: Warning: writeback of base register is UNPREDICTABLE +[^:]*:9: Warning: writeback of base register when in register list is UNPREDICTABLE +[^:]*:10: Warning: writeback of base register is UNPREDICTABLE +[^:]*:12: Warning: if writeback register is in list, it must be the lowest reg in the list |