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| author | Ben Cheng <bccheng@google.com> | 2014-03-26 11:03:35 -0700 |
|---|---|---|
| committer | Ben Cheng <bccheng@google.com> | 2014-03-26 11:03:35 -0700 |
| commit | 09797ba54abf3683ea66eedddf6afbe7653f9cb9 (patch) | |
| tree | 8030b2ed79c7463c89d6da294782e9d503c84f50 /binutils-2.24/gas/testsuite/gas/aarch64/system.s | |
| parent | 5a2caf34e4995860baf405552163df288000b7bf (diff) | |
| download | toolchain_binutils-09797ba54abf3683ea66eedddf6afbe7653f9cb9.tar.gz toolchain_binutils-09797ba54abf3683ea66eedddf6afbe7653f9cb9.tar.bz2 toolchain_binutils-09797ba54abf3683ea66eedddf6afbe7653f9cb9.zip | |
Initial checkin of binutils 2.24.
Change-Id: I0dfcbae6608dded6c3586bf5f4ac27e9612e70a2
Diffstat (limited to 'binutils-2.24/gas/testsuite/gas/aarch64/system.s')
| -rw-r--r-- | binutils-2.24/gas/testsuite/gas/aarch64/system.s | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/binutils-2.24/gas/testsuite/gas/aarch64/system.s b/binutils-2.24/gas/testsuite/gas/aarch64/system.s new file mode 100644 index 00000000..234b900a --- /dev/null +++ b/binutils-2.24/gas/testsuite/gas/aarch64/system.s @@ -0,0 +1,74 @@ + .text + drps + + // + // HINTS + // + + nop + yield + wfe + wfi + sev + sevl + + .macro all_hints from=0, to=127 + hint \from + .if \to-\from + all_hints "(\from+1)", \to + .endif + .endm + + all_hints from=0, to=63 + all_hints from=64, to=127 + + // + // SYSL + // + + sysl x7, #3, C15, C7, #7 + + // + // BARRIERS + // + + .macro all_barriers op, from=0, to=15 + \op \from + .if \to-\from + all_barriers \op, "(\from+1)", \to + .endif + .endm + + all_barriers op=dsb, from=0, to=15 + all_barriers op=dmb, from=0, to=15 + all_barriers op=isb, from=0, to=15 + + isb + + // + // PREFETCHS + // + + .macro all_prefetchs op, from=0, to=31 + \op \from, LABEL1 + \op \from, [sp, x15, lsl #0] + \op \from, [x7, w30, uxtw #3] + \op \from, [x3, #24] + .if \to-\from + all_prefetchs \op, "(\from+1)", \to + .endif + .endm + + all_prefetchs op=prfm, from=0, to=31 + + // + // PREFETCHS with named operation + // + + .irp op, pld, pli, pst + .irp l, l1, l2, l3 + .irp t, keep, strm + prfm \op\l\t, [x3, #24] + .endr + .endr + .endr |