diff options
Diffstat (limited to 'arch/parisc/include/asm')
| -rw-r--r-- | arch/parisc/include/asm/assembly.h | 11 | ||||
| -rw-r--r-- | arch/parisc/include/asm/atomic.h | 18 | ||||
| -rw-r--r-- | arch/parisc/include/asm/cacheflush.h | 3 | ||||
| -rw-r--r-- | arch/parisc/include/asm/elf.h | 10 | ||||
| -rw-r--r-- | arch/parisc/include/asm/ftrace.h | 25 | ||||
| -rw-r--r-- | arch/parisc/include/asm/io.h | 51 | ||||
| -rw-r--r-- | arch/parisc/include/asm/irq.h | 2 | ||||
| -rw-r--r-- | arch/parisc/include/asm/page.h | 13 | ||||
| -rw-r--r-- | arch/parisc/include/asm/pdc.h | 4 | ||||
| -rw-r--r-- | arch/parisc/include/asm/pgtable.h | 15 | ||||
| -rw-r--r-- | arch/parisc/include/asm/smp.h | 3 | ||||
| -rw-r--r-- | arch/parisc/include/asm/socket.h | 3 | ||||
| -rw-r--r-- | arch/parisc/include/asm/spinlock.h | 3 | ||||
| -rw-r--r-- | arch/parisc/include/asm/uaccess.h | 1 |
14 files changed, 121 insertions, 41 deletions
diff --git a/arch/parisc/include/asm/assembly.h b/arch/parisc/include/asm/assembly.h index ffb208840ec..89fb40005e3 100644 --- a/arch/parisc/include/asm/assembly.h +++ b/arch/parisc/include/asm/assembly.h @@ -79,6 +79,7 @@ #include <asm/asm-offsets.h> #include <asm/page.h> +#include <asm/types.h> #include <asm/asmregs.h> @@ -129,27 +130,27 @@ /* Shift Left - note the r and t can NOT be the same! */ .macro shl r, sa, t - dep,z \r, 31-\sa, 32-\sa, \t + dep,z \r, 31-(\sa), 32-(\sa), \t .endm /* The PA 2.0 shift left */ .macro shlw r, sa, t - depw,z \r, 31-\sa, 32-\sa, \t + depw,z \r, 31-(\sa), 32-(\sa), \t .endm /* And the PA 2.0W shift left */ .macro shld r, sa, t - depd,z \r, 63-\sa, 64-\sa, \t + depd,z \r, 63-(\sa), 64-(\sa), \t .endm /* Shift Right - note the r and t can NOT be the same! */ .macro shr r, sa, t - extru \r, 31-\sa, 32-\sa, \t + extru \r, 31-(\sa), 32-(\sa), \t .endm /* pa20w version of shift right */ .macro shrd r, sa, t - extrd,u \r, 63-\sa, 64-\sa, \t + extrd,u \r, 63-(\sa), 64-(\sa), \t .endm /* load 32-bit 'value' into 'reg' compensating for the ldil diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h index edbfe25c5fc..ada3e5364d8 100644 --- a/arch/parisc/include/asm/atomic.h +++ b/arch/parisc/include/asm/atomic.h @@ -25,7 +25,7 @@ * Since "a" is usually an address, use one spinlock per cacheline. */ # define ATOMIC_HASH_SIZE 4 -# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ])) +# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) (a))/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ])) extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned; @@ -222,13 +222,13 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) -#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v)))) -#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v)))) +#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)(i)),(v)))) +#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)(i)),(v)))) #define atomic_inc(v) ((void)(__atomic_add_return( 1,(v)))) #define atomic_dec(v) ((void)(__atomic_add_return( -1,(v)))) -#define atomic_add_return(i,v) (__atomic_add_return( ((int)i),(v))) -#define atomic_sub_return(i,v) (__atomic_add_return(-((int)i),(v))) +#define atomic_add_return(i,v) (__atomic_add_return( ((int)(i)),(v))) +#define atomic_sub_return(i,v) (__atomic_add_return(-((int)(i)),(v))) #define atomic_inc_return(v) (__atomic_add_return( 1,(v))) #define atomic_dec_return(v) (__atomic_add_return( -1,(v))) @@ -289,13 +289,13 @@ atomic64_read(const atomic64_t *v) return v->counter; } -#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)i),(v)))) -#define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)i),(v)))) +#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)(i)),(v)))) +#define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)(i)),(v)))) #define atomic64_inc(v) ((void)(__atomic64_add_return( 1,(v)))) #define atomic64_dec(v) ((void)(__atomic64_add_return( -1,(v)))) -#define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)i),(v))) -#define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)i),(v))) +#define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)(i)),(v))) +#define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)(i)),(v))) #define atomic64_inc_return(v) (__atomic64_add_return( 1,(v))) #define atomic64_dec_return(v) (__atomic64_add_return( -1,(v))) diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index b7ca6dc7fdd..724395143f2 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h @@ -97,6 +97,9 @@ void mark_rodata_ro(void); #ifdef CONFIG_PA8X00 /* Only pa8800, pa8900 needs this */ + +#include <asm/kmap_types.h> + #define ARCH_HAS_KMAP void kunmap_parisc(void *addr); diff --git a/arch/parisc/include/asm/elf.h b/arch/parisc/include/asm/elf.h index 7fa675799e6..9c802eb4be8 100644 --- a/arch/parisc/include/asm/elf.h +++ b/arch/parisc/include/asm/elf.h @@ -168,6 +168,16 @@ typedef struct elf64_fdesc { __u64 gp; } Elf64_Fdesc; +#ifdef __KERNEL__ + +#ifdef CONFIG_64BIT +#define Elf_Fdesc Elf64_Fdesc +#else +#define Elf_Fdesc Elf32_Fdesc +#endif /*CONFIG_64BIT*/ + +#endif /*__KERNEL__*/ + /* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */ #define PT_HP_TLS (PT_LOOS + 0x0) diff --git a/arch/parisc/include/asm/ftrace.h b/arch/parisc/include/asm/ftrace.h new file mode 100644 index 00000000000..2fa05dd6aee --- /dev/null +++ b/arch/parisc/include/asm/ftrace.h @@ -0,0 +1,25 @@ +#ifndef _ASM_PARISC_FTRACE_H +#define _ASM_PARISC_FTRACE_H + +#ifndef __ASSEMBLY__ +extern void mcount(void); + +/* + * Stack of return addresses for functions of a thread. + * Used in struct thread_info + */ +struct ftrace_ret_stack { + unsigned long ret; + unsigned long func; + unsigned long long calltime; +}; + +/* + * Primary handler of a function return. + * It relays on ftrace_return_to_handler. + * Defined in entry.S + */ +extern void return_to_handler(void); +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_PARISC_FTRACE_H */ diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h index d3031d1f9d0..1f6d2ae7aba 100644 --- a/arch/parisc/include/asm/io.h +++ b/arch/parisc/include/asm/io.h @@ -174,15 +174,48 @@ static inline void __raw_writeq(unsigned long long b, volatile void __iomem *add *(volatile unsigned long long __force *) addr = b; } -/* readb can never be const, so use __fswab instead of le*_to_cpu */ -#define readb(addr) __raw_readb(addr) -#define readw(addr) le16_to_cpu(__raw_readw(addr)) -#define readl(addr) le32_to_cpu(__raw_readl(addr)) -#define readq(addr) le64_to_cpu(__raw_readq(addr)) -#define writeb(b, addr) __raw_writeb(b, addr) -#define writew(b, addr) __raw_writew(cpu_to_le16(b), addr) -#define writel(b, addr) __raw_writel(cpu_to_le32(b), addr) -#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr) +static inline unsigned char readb(const volatile void __iomem *addr) +{ + return __raw_readb(addr); +} +static inline unsigned short readw(const volatile void __iomem *addr) +{ + return le16_to_cpu(__raw_readw(addr)); +} +static inline unsigned int readl(const volatile void __iomem *addr) +{ + return le32_to_cpu(__raw_readl(addr)); +} +static inline unsigned long long readq(const volatile void __iomem *addr) +{ + return le64_to_cpu(__raw_readq(addr)); +} + +static inline void writeb(unsigned char b, volatile void __iomem *addr) +{ + __raw_writeb(b, addr); +} +static inline void writew(unsigned short w, volatile void __iomem *addr) +{ + __raw_writew(cpu_to_le16(w), addr); +} +static inline void writel(unsigned int l, volatile void __iomem *addr) +{ + __raw_writel(cpu_to_le32(l), addr); +} +static inline void writeq(unsigned long long q, volatile void __iomem *addr) +{ + __raw_writeq(cpu_to_le64(q), addr); +} + +#define readb readb +#define readw readw +#define readl readl +#define readq readq +#define writeb writeb +#define writew writew +#define writel writel +#define writeq writeq #define readb_relaxed(addr) readb(addr) #define readw_relaxed(addr) readw(addr) diff --git a/arch/parisc/include/asm/irq.h b/arch/parisc/include/asm/irq.h index 399c81981ed..dfa26b67f91 100644 --- a/arch/parisc/include/asm/irq.h +++ b/arch/parisc/include/asm/irq.h @@ -49,7 +49,7 @@ extern unsigned long txn_alloc_addr(unsigned int); extern unsigned long txn_affinity_addr(unsigned int irq, int cpu); extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *); -extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest); +extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest); /* soft power switch support (power.c) */ extern struct tasklet_struct power_tasklet; diff --git a/arch/parisc/include/asm/page.h b/arch/parisc/include/asm/page.h index c3941f09a87..7bc5125d7d4 100644 --- a/arch/parisc/include/asm/page.h +++ b/arch/parisc/include/asm/page.h @@ -36,16 +36,7 @@ void clear_user_page(void *page, unsigned long vaddr, struct page *pg); */ #define STRICT_MM_TYPECHECKS #ifdef STRICT_MM_TYPECHECKS -typedef struct { unsigned long pte; -#if !defined(CONFIG_64BIT) - unsigned long future_flags; - /* XXX: it's possible to remove future_flags and change BITS_PER_PTE_ENTRY - to 2, but then strangely the identical 32bit kernel boots on a - c3000(pa20), but not any longer on a 715(pa11). - Still investigating... HelgeD. - */ -#endif -} pte_t; /* either 32 or 64bit */ +typedef struct { unsigned long pte; } pte_t; /* either 32 or 64bit */ /* NOTE: even on 64 bits, these entries are __u32 because we allocate * the pmd and pgd in ZONE_DMA (i.e. under 4GB) */ @@ -111,7 +102,7 @@ extern int npmem_ranges; #define BITS_PER_PMD_ENTRY 2 #define BITS_PER_PGD_ENTRY 2 #else -#define BITS_PER_PTE_ENTRY 3 +#define BITS_PER_PTE_ENTRY 2 #define BITS_PER_PMD_ENTRY 2 #define BITS_PER_PGD_ENTRY BITS_PER_PMD_ENTRY #endif diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h index 430f1aeea0b..4ca510b3c6f 100644 --- a/arch/parisc/include/asm/pdc.h +++ b/arch/parisc/include/asm/pdc.h @@ -49,6 +49,8 @@ #define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */ #define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */ /* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */ +#define PDC_MODEL_OS64 (1 << 0) +#define PDC_MODEL_OS32 (1 << 1) #define PDC_MODEL_IOPDIR_FDC (1 << 2) #define PDC_MODEL_NVA_MASK (3 << 4) #define PDC_MODEL_NVA_SUPPORTED (0 << 4) @@ -341,6 +343,8 @@ #ifdef __KERNEL__ +#include <asm/page.h> /* for __PAGE_OFFSET */ + extern int pdc_type; /* Values for pdc_type */ diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h index 470a4b88124..a27d2e200fb 100644 --- a/arch/parisc/include/asm/pgtable.h +++ b/arch/parisc/include/asm/pgtable.h @@ -50,11 +50,7 @@ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e)) /* This is the size of the initially mapped kernel memory */ -#ifdef CONFIG_64BIT #define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */ -#else -#define KERNEL_INITIAL_ORDER 23 /* 0 to 1<<23 = 8MB */ -#endif #define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER) #if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB) @@ -91,16 +87,25 @@ /* Definitions for 1st level */ #define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD) +#if (PGDIR_SHIFT + PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY) > BITS_PER_LONG +#define BITS_PER_PGD (BITS_PER_LONG - PGDIR_SHIFT) +#else #define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY) +#endif #define PGDIR_SIZE (1UL << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) #define PTRS_PER_PGD (1UL << BITS_PER_PGD) #define USER_PTRS_PER_PGD PTRS_PER_PGD +#ifdef CONFIG_64BIT #define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD) #define MAX_ADDRESS (1UL << MAX_ADDRBITS) - #define SPACEID_SHIFT (MAX_ADDRBITS - 32) +#else +#define MAX_ADDRBITS (BITS_PER_LONG) +#define MAX_ADDRESS (1UL << MAX_ADDRBITS) +#define SPACEID_SHIFT 0 +#endif /* This calculates the number of initial pages we need for the initial * page tables */ diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h index 6ef4b7867b1..21eb45a5262 100644 --- a/arch/parisc/include/asm/smp.h +++ b/arch/parisc/include/asm/smp.h @@ -29,7 +29,8 @@ extern void smp_send_reschedule(int cpu); extern void smp_send_all_nop(void); extern void arch_send_call_function_single_ipi(int cpu); -extern void arch_send_call_function_ipi(cpumask_t mask); +extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); +#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask #endif /* !ASSEMBLY */ diff --git a/arch/parisc/include/asm/socket.h b/arch/parisc/include/asm/socket.h index fba402c95ac..885472bf7b7 100644 --- a/arch/parisc/include/asm/socket.h +++ b/arch/parisc/include/asm/socket.h @@ -54,6 +54,9 @@ #define SO_MARK 0x401f +#define SO_TIMESTAMPING 0x4020 +#define SCM_TIMESTAMPING SO_TIMESTAMPING + /* O_NONBLOCK clashes with the bits used for socket types. Therefore we * have to define SOCK_NONBLOCK to a different value here. */ diff --git a/arch/parisc/include/asm/spinlock.h b/arch/parisc/include/asm/spinlock.h index f3d2090a18d..fae03e136fa 100644 --- a/arch/parisc/include/asm/spinlock.h +++ b/arch/parisc/include/asm/spinlock.h @@ -187,6 +187,9 @@ static __inline__ int __raw_write_can_lock(raw_rwlock_t *rw) return !rw->counter; } +#define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock) +#define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock) + #define _raw_spin_relax(lock) cpu_relax() #define _raw_read_relax(lock) cpu_relax() #define _raw_write_relax(lock) cpu_relax() diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h index 1c6dbb6f6e5..cd4c0b2a8e7 100644 --- a/arch/parisc/include/asm/uaccess.h +++ b/arch/parisc/include/asm/uaccess.h @@ -241,6 +241,7 @@ unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned lo #define __copy_to_user_inatomic __copy_to_user #define __copy_from_user_inatomic __copy_from_user +struct pt_regs; int fixup_exception(struct pt_regs *regs); #endif /* __PARISC_UACCESS_H */ |