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| author | John Fastabend <john.r.fastabend@intel.com> | 2010-10-28 00:59:57 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-10-28 10:19:00 -0700 |
| commit | 9806307a1c5a2a79e268ae4e78b437d38c8adf7f (patch) | |
| tree | 1a4ceada09e85a3cd9083790c6b16a16e99bb928 /drivers/net/ixgbe/ixgbe_dcb_82599.c | |
| parent | affa9dfb04b7e2e3a0b0e6d844ea0c9ed97505f9 (diff) | |
| download | kernel_samsung_smdk4412-9806307a1c5a2a79e268ae4e78b437d38c8adf7f.tar.gz kernel_samsung_smdk4412-9806307a1c5a2a79e268ae4e78b437d38c8adf7f.tar.bz2 kernel_samsung_smdk4412-9806307a1c5a2a79e268ae4e78b437d38c8adf7f.zip | |
ixgbe: DCB, fix TX hang occurring in stress condition with PFC
The DCB credits refill quantum _must_ be greater than half the max
packet size. This is needed to guarantee that TX DMA operations
are not attempted during a pause state. Additionally, the min IFG
must be set correctly for DCB mode. If a DMA operation is
requested unexpectedly during the pause state the HW data
store may be corrupted leading to a DMA hang. The DMA hang
requires a reset to correct. This fixes the HW configuration
to avoid this condition.
Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_dcb_82599.c')
| -rw-r--r-- | drivers/net/ixgbe/ixgbe_dcb_82599.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82599.c b/drivers/net/ixgbe/ixgbe_dcb_82599.c index 67c219f86c3..05f22471507 100644 --- a/drivers/net/ixgbe/ixgbe_dcb_82599.c +++ b/drivers/net/ixgbe/ixgbe_dcb_82599.c @@ -397,6 +397,11 @@ static s32 ixgbe_dcb_config_82599(struct ixgbe_hw *hw) reg &= ~IXGBE_RTTDCS_ARBDIS; IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg); + /* Enable Security TX Buffer IFG for DCB */ + reg = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); + reg |= IXGBE_SECTX_DCB; + IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, reg); + return 0; } |